Master Chief Posted October 6, 2009 Share Posted October 6, 2009 I added code for SBUS (from a MacPro1,1) to my DSDT. It shows in the ioreg, but none of those kexts are shown with kextstat. In my case only com.apple.driver.AppleIntelMeromProfile is loaded from the above mentioned kexts That's because it doesn't match. Let's first have a look at AppleSMBusPCI.kext <key>IONameMatch</key> <array> <string>pci10de,aa2</string> <string>pci8086,3a30</string> </array> No match with our board so we have to fix it by either adding the device id of our SMBUS controller to this kext (pci8086,2930 for P5K PRO) or by changing the device id in our dsdt.dsl Which is what I did. Note: For people who don't know how to get this ID – you can use lspci -nn (Google/Search for it). After this change AppleSMBusPCI.kext will load and initialize properly, daisy chaining AppleSMBusController.kext by setting some properties. And by loading this kext, and setting more properties, the other two kexts will also load. Chief, could you share the code you used for this? It might work on the P5K-VM as well (misses SBUS at 1F,3 too) . If this is out of topic here, please post it at the P5K-VM thread:http://www.insanelymac.com/forum/index.php?showtopic=62111 Would be great if you can share your .dsl file so we can compare with ours Sure. I will add my dsdt.dsl to the P5K PRO thread, when I'm done documenting it (in dsdt.dsl) which will should help other people to get the job done. Thanx for all the research you are doing Thanks man. I really appreciate it from an old rot like you Link to comment Share on other sites More sharing options...
BlackCH Posted October 6, 2009 Share Posted October 6, 2009 Right! I used the code from your dsdt v2.2 at the P5K Pro thread The kexts you said are loaded now. Also got three 'sound assertion' errors but soud seems to work fine. I'll be testing it out Thank you again! Link to comment Share on other sites More sharing options...
DB1 Posted October 6, 2009 Share Posted October 6, 2009 +1 BlackCH result except i'm not using the Chiefs kexts (tried them and worked fine) just iMac 9.1 identifier with p & c states via dsdt. Some great work on this thread thanks to all contributors and a special thanks to the Chief for stretching the boundaries. dsdt.dsl.zip Link to comment Share on other sites More sharing options...
spanakorizo Posted October 7, 2009 Share Posted October 7, 2009 Need to add also sbus DB1, your dsl confuses me a lot, because: i see a sbus device there, so ok i can copy/paste to my dsl, but i see after this device, another one containing smbus info: Device (BUS0) { Name (_CID, "smbus") Name (_ADR, Zero) Device (MKY0) { Name (_ADR, Zero) Name (_CID, "mikey") Method (_DSM, 4, NotSerialized) { also i see a lot of sbus info among to other devices: Store (^^SBUS.SRDB (0xD2, 0x80), Local0) or Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80) and my dsl has not got a single line contains: .SBUS on it! in lspci i see this: 00:1f.3 SMBus [0c05]: Intel Corporation SMBus Controller [8086:2930] (rev 02) in ioreg if i search for smbus or sbus, there is nothing! MasterChief could give me some light here, cause hid dsl looks like mine, and he's also in Quad! so maybe he could upload his dsl /still a lot to do i guess! Link to comment Share on other sites More sharing options...
DB1 Posted October 7, 2009 Share Posted October 7, 2009 Need to add also sbus DB1, your dsl confuses me a lot, because: i see a sbus device there, so ok i can copy/paste to my dsl, but i see after this device, another one containing smbus info: Device (BUS0) { Name (_CID, "smbus") Name (_ADR, Zero) Device (MKY0) { Name (_ADR, Zero) Name (_CID, "mikey") Method (_DSM, 4, NotSerialized) { also i see a lot of sbus info among to other devices: Store (^^SBUS.SRDB (0xD2, 0x80), Local0) or Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80) and my dsl has not got a single line contains: .SBUS on it! in lspci i see this: 00:1f.3 SMBus [0c05]: Intel Corporation SMBus Controller [8086:2930] (rev 02) in ioreg if i search for smbus or sbus, there is nothing! MasterChief could give me some light here, cause hid dsl looks like mine, and he's also in Quad! so maybe he could upload his dsl /still a lot to do i guess! Better to use MasterChief's from the P5K PRO thread as reference to patch yours - his has notation identifying all the patched sections (i'm not that disciplined!), that's what I did to patch in for P5K VM. The SBUS patch is entirely MasterChief's genius work so I could not offer any explanations or help. Link to comment Share on other sites More sharing options...
spanakorizo Posted October 7, 2009 Share Posted October 7, 2009 ok let's w8 for him, after all we are friends now my /sessions of iaslme have like 50 folders of compiled tests! (good that i allways keep backup of my best edited .dsl so far) Link to comment Share on other sites More sharing options...
Master Chief Posted October 7, 2009 Share Posted October 7, 2009 Let's talk about SBUS somewhere else! Let's stop thread hijacking – for which I am terribly sorry. Time to move on! WOOT I just got my Apple HID Keyboard to wake up my hack! More about this in a near future topic here. Link to comment Share on other sites More sharing options...
tapper00` Posted October 7, 2009 Share Posted October 7, 2009 Let's talk about SBUS somewhere else! Let's stop thread hijacking – for which I am terribly sorry. Time to move on! WOOT I just got my Apple HID Keyboard to wake up my hack! More about this in a near future topic here. Master Chief... I have been following this thread for a while, and must say that I am quite impressed with your knowledge of APCI. On another note... Wake from sleep with Apple keyboard is big news. Don't make us wait too long for that info, please. Keep up the good work. Link to comment Share on other sites More sharing options...
Master Chief Posted October 7, 2009 Share Posted October 7, 2009 Master Chief... I have been following this thread for a while, and must say that I am quite impressed with your knowledge of APCI. On another note... Wake from sleep with Apple keyboard is big news. Don't make us wait too long for that info, please. Keep up the good work. Thank you. The Apple keyboard fix is already included with my DSDT v2.4 – available in the P5K PRO thread. Link to comment Share on other sites More sharing options...
Flashe Posted October 8, 2009 Share Posted October 8, 2009 Hello has all, Bitter to have to install snow, I have notice that the suspend activity does not work for me, I ask you if you can help me to resolve this problem. I have nullCPUPowermanagemnt try to have to remove, install disabler and sleepenabler To make works the suspend activity but works always not. Here is my dsdt.dsl makes ,I know if there are modifications has to make or kexts has to install. Fix this problème possible via DSDT ? Thank you very much. dsdt.dsl.zip Link to comment Share on other sites More sharing options...
oldnapalm Posted October 8, 2009 Share Posted October 8, 2009 You should try the method described in this topic http://www.insanelymac.com/forum/index.php?showtopic=168014 Check the differences in the attached file, it has speedstep and sleep fixes applied, plus 6 compilation warnings removed. dsdt.zip Link to comment Share on other sites More sharing options...
Master Chief Posted October 9, 2009 Share Posted October 9, 2009 A lot of people seem to read this so here goes: My hack sleeps after an idle period (auto sleep) and yes I do happen to have one of these buggers (TSSTcorp DVD drive). The "magic" will be revealed with DSDT V2.6 here. Thank you. Have a nice day! Link to comment Share on other sites More sharing options...
FKA Posted October 9, 2009 Author Share Posted October 9, 2009 The Legacy AGPM has been giving me what i'd describe as digital breakup. Windows don't seem to be re-drawing. D. Link to comment Share on other sites More sharing options...
Master Chief Posted October 10, 2009 Share Posted October 10, 2009 The Legacy AGPM has been giving me what i'd describe as digital breakup. Windows don't seem to be re-drawing. D. Interesting. Might this be what I described earlier in this thread (some time ago)? Do you see any (related/suspicious) errors/warning in log files? Do you have a picture showing the problem? A short QuickTime movie (screen recording) would be even better. What's the used model identifier? Where's the kext installed (with or without Extensions.mkext)? Are you using Chameleon V2 RC3 or Boot Think? Link to comment Share on other sites More sharing options...
FKA Posted October 12, 2009 Author Share Posted October 12, 2009 Because Chameleon has serious compatibility issues with certain drives, one being my 1TB SAMSUNG HD103SJ. I've had the 1TB SAMSUNG HD103SJ for 6 months now - No problems at all with Chameleon or PCEFI V10. The Drive has been used as boot drive and currenlt storage! D. Interesting. Might this be what I described earlier in this thread (some time ago)? Do you see any (related/suspicious) errors/warning in log files? Do you have a picture showing the problem? A short QuickTime movie (screen recording) would be even better. What's the used model identifier? Where's the kext installed (with or without Extensions.mkext)? Are you using Chameleon V2 RC3 or Boot Think? Very similar to what you decribled earlyer in the thread (Cant find the exact post# right now.) but this has only occured since using the Legacy AGPM kext nad has gone since I removed it from my mkext. didn't get a screen grab, usingt mkext in EFI partition and bootloader as noted in my sig' . Anywho's I've got some time this week so I'm finnaly going to borrow cst from MP4,1, add to my DSDT and see if I can get GPU throttling using MP4,1 identifyer. D Link to comment Share on other sites More sharing options...
William Parker Posted October 12, 2009 Share Posted October 12, 2009 First my heartfelt gratitude goes out to all the forum members here, whose help has been invaluable, especially Master Chief & FormerlyKnownAs. I have attached here 3 variants of DSDT mods. The first one was done following FormerlyKnownAs first post here. I had no CST evaluation errors to start with & my ACPI dumps yielded 5 SSDTs of which 4 were CPUcXst and the fifth one was CpuPm. I also had the FACP table with _CST support : 00 & C2 Latency : 005A & C3 Latency : 0384. Frankly the high temps were bothering me 60 deg. C on load. I could see stepping in CPU-i. So that was some relief. After a second read through I understood that I needed to enter the latencies from the FACP into the SPSS part. Which is what I did in the Second mod. which brought temps down to 40 on idle and about 50 on load. But I had seen members on this thread getting temps in their 30s. I preferred not to replace ROISOFT's MacPro 3,1 code into my DSDT but I tried just to see and it works with idle temps down to about 34. Am I doing anything wrong by replacing my obtained SSDT tables with these? I see FormerlyKnownAs DSDT attached in the first post have "Method (_PPC, 0, NotSerialized)". Can it be ignored because it returns Zero? Also it has Method (_PCT, 0, NotSerialized) which I don't. Should it be there? And among other things I will be very grateful if someone could point errors in the Speed stepping and related parts, and how to set them right. My sincerest thanks to all who have shared their knowledge here. Archive.zip Link to comment Share on other sites More sharing options...
ErmaC Posted October 12, 2009 Share Posted October 12, 2009 Hi to everybody! I have tried a lot of times to insert the SSDT data inside my DSDT but... no successful... I have dumped the ACPI tables with Everest, and they are present 16 tables SSDT... confused.. Any Idea??? My Board is a ASUS P6T Deluxe v.1 i7 940 12GB RAM Here my original ACPI table (0 patch inside the Tables) Here my actual Patched DSDT My smbios.plist (MacPro4,1) Sorry for my bad English. Fabio Edit: I use Snow for this test. Link to comment Share on other sites More sharing options...
FKA Posted October 12, 2009 Author Share Posted October 12, 2009 First my heartfelt gratitude goes out to all the forum members here, whose help has been invaluable, especially Master Chief & FormerlyKnownAs.I have attached here 3 variants of DSDT mods. The first one was done following FormerlyKnownAs first post here. I had no CST evaluation errors to start with & my ACPI dumps yielded 5 SSDTs of which 4 were CPUcXst and the fifth one was CpuPm. I also had the FACP table with _CST support : 00 & C2 Latency : 005A & C3 Latency : 0384. Frankly the high temps were bothering me 60 deg. C on load. I could see stepping in CPU-i. So that was some relief. After a second read through I understood that I needed to enter the latencies from the FACP into the SPSS part. Which is what I did in the Second mod. which brought temps down to 40 on idle and about 50 on load. But I had seen members on this thread getting temps in their 30s. I preferred not to replace ROISOFT's MacPro 3,1 code into my DSDT but I tried just to see and it works with idle temps down to about 34. Am I doing anything wrong by replacing my obtained SSDT tables with these? I see FormerlyKnownAs DSDT attached in the first post have "Method (_PPC, 0, NotSerialized)". Can it be ignored because it returns Zero? Also it has Method (_PCT, 0, NotSerialized) which I don't. Should it be there? And among other things I will be very grateful if someone could point errors in the Speed stepping and related parts, and how to set them right. My sincerest thanks to all who have shared their knowledge here. Hi William I'm idling at around 40-43 degrees. Also you have your own CST tables you'd be best using them instead of the MP3,1 tables used in your 3rd mod. I'd stick with the 2nd Mod then see if you can follow ab__73's post#71 here to get C states working. D. Link to comment Share on other sites More sharing options...
FKA Posted October 12, 2009 Author Share Posted October 12, 2009 Hi to everybody! I have tried a lot of times to insert the SSDT data inside my DSDT but... no successful... I have dumped the ACPI tables with Everest, and they are present 16 tables SSDT... confused.. Any Idea??? My Board is a ASUS P6T Deluxe v.1 i7 940 12GB RAM Here my original ACPI table (0 patch inside the Tables) Here my actual Patched DSDT Sorry for my bad English. Fabio Edit: I use Snow for this test. Hi Fabio Your SSDT tables 0 to 7 are ist tables for CPU0 to CPU7 Your SSDT tables 8 to 15 are cst tables for CPU0 to CPU7 SSDT 16 is CPUPM It should be quite easy to attach them all to the bottom of your DSDT as described in the 1st post. You can then edit the SPSS and NPSS tables with your desired fid and Vid values. How far have you got on your own? EDIT# > Method for attaching SSDT to DSDT (from 1st post) here D. Link to comment Share on other sites More sharing options...
ErmaC Posted October 12, 2009 Share Posted October 12, 2009 Hi Fabio Your SSDT tables 0 to 7 are ist tables for CPU0 to CPU7 Your SSDT tables 8 to 15 are cst tables for CPU0 to CPU7 SSDT 16 is CPUPM It should be quite easy to attach them all to the bottom of your DSDT as described in the 1st post. You can then edit the SPSS and NPSS tables with your desired fid and Vid values. How far have you got on your own? EDIT# > Method for attaching SSDT to DSDT (from 1st post) here D. Hi again! This is the "better" I made I insert last SSDT Table value next the CPU data I use dropssdt=yes in com.apple.Boot.plist but notthing change.. I'm sure I make some error. Fabio Link to comment Share on other sites More sharing options...
oldnapalm Posted October 12, 2009 Share Posted October 12, 2009 Have you tried to run AppleIntelCPUPowerManagement without any changes to DSDT? I have an Acer Aspire 5920 which also has _CST in SSDT, and SpeedStep works in 10.5.8 with no changes to DSDT, just removing Disabler kext. I tried to copy _CST and _PSS from SSDT dump to DSDT.aml but noticed no difference. Link to comment Share on other sites More sharing options...
mm67 Posted October 13, 2009 Share Posted October 13, 2009 This way I can get P-states and C-states working even if EIST and C-states are disabled in bios. This P-state table is for Q9550. Scope (_PR) { Processor (CPU0, 0x00, 0x00000410, 0x06) {} Processor (CPU1, 0x01, 0x00000410, 0x06) {} Processor (CPU2, 0x02, 0x00000410, 0x06) {} Processor (CPU3, 0x03, 0x00000410, 0x06) {} Name (CFGD, 0x040383F2) Name (PDC0, 0x80000000) } Scope (_PR.CPU0) { Method (_CST, 0, NotSerialized) { If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10 )))) { Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x9D, 0x03E8 } }) } If (And (PDC0, 0x0300)) { If (And (CFGD, 0x20)) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address ,) }, 0x02, One, 0x01F4 } }) } } If (And (CFGD, 0x20)) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, One, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 } }) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x10, 0x00, 0x0000000000000199, ,) }, ResourceTemplate () { Register (FFixedHW, 0x10, 0x00, 0x0000000000000198, ,) } }) } Method (_PSS, 0, NotSerialized) { Return (Package (0x06) { Package (0x06) { 0xB0F, Zero, 0xA, 0xA, 0x4820, 0x4820 }, Package (0x06) { 0xA68, Zero, 0xA, 0xA, 0x81E, 0x81E }, Package (0x06) { 0x9C2, Zero, 0xA, 0xA, 0x471C, 0x471C }, Package (0x06) { 0x91B, Zero, 0xA, 0xA, 0x71A, 0x71A }, Package (0x06) { 0x875, Zero, 0xA, 0xA, 0x4618, 0x4618 }, Package (0x06) { 0x7CE, Zero, 0xA, 0xA, 0x616, 0x616 } }) } } Scope (_PR.CPU1) { Method (_CST, 0, NotSerialized) { Return (^^CPU0._CST ()) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (^^CPU0._PCT ()) } Method (_PSS, 0, NotSerialized) { Return (^^CPU0._PSS ()) } } Scope (_PR.CPU2) { Method (_CST, 0, NotSerialized) { Return (^^CPU0._CST ()) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (^^CPU0._PCT ()) } Method (_PSS, 0, NotSerialized) { Return (^^CPU0._PSS ()) } } Scope (_PR.CPU3) { Method (_CST, 0, NotSerialized) { Return (^^CPU0._CST ()) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (^^CPU0._PCT ()) } Method (_PSS, 0, NotSerialized) { Return (^^CPU0._PSS ()) } } With EIST and C-states disabled Windows makes cpu run hot (idling around 50) but in OSX cpu is idling around 35 degrees. Hi William I'm idling at around 40-43 degrees. Also you have your own CST tables you'd be best using them instead of the MP3,1 tables used in your 3rd mod. I'd stick with the 2nd Mod then see if you can follow ab__73's post#71 here to get C states working. D. I get same temperatures when I am using CST tables from my own bios. If I use MP 3,1 CST tables temps go down to 35 and IOrRegistryExplorer has CSTInfo key which is missing when using my own tables. Link to comment Share on other sites More sharing options...
FKA Posted October 13, 2009 Author Share Posted October 13, 2009 Hi again! This is the "better" I made I insert last SSDT Table value next the CPU data I use dropssdt=yes in com.apple.Boot.plist but notthing change.. I'm sure I make some error. Fabio Hi Fabio I only had success with this by adding ALL of the SSDT tables to the DSDT. For speedstep you will need to edit the values in the NPSS and SPSS sections. In your case this means adding all 16 SSDT tables. I'm sure you can leave out the information for CPU cores that are not in use but to make it as easy as possible for you, simply append the SSDT tables to the end of your DSDT starting with SSDT 0 then SSDT 1 .... etc As oldnapalm says - some people don't need to add SSDT tables at all as that information must already be being passed to the OS. D Link to comment Share on other sites More sharing options...
mm67 Posted October 13, 2009 Share Posted October 13, 2009 Same dsdt.aml works great even on Ubuntu, gives 6 P-states and C-states 1 and 2 even when with EIST and all C-states disabled from bios. Just noticed that with linux dmesg one can see which C-states are loaded. Link to comment Share on other sites More sharing options...
William Parker Posted October 13, 2009 Share Posted October 13, 2009 @mm67 This way I can get P-states and C-states working even if EIST and C-states are disabled in bios. This P-state table is for Q9550. Scope (_PR) { Processor (CPU0, 0x00, 0x00000410, 0x06) {} Processor (CPU1, 0x01, 0x00000410, 0x06) {} Processor (CPU2, 0x02, 0x00000410, 0x06) {} Processor (CPU3, 0x03, 0x00000410, 0x06) {} Name (CFGD, 0x040383F2) Name (PDC0, 0x80000000) } Scope (_PR.CPU0) { Method (_CST, 0, NotSerialized) { If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10 )))) { Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x9D, 0x03E8 } }) } If (And (PDC0, 0x0300)) { If (And (CFGD, 0x20)) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address ,) }, 0x02, One, 0x01F4 } }) } } If (And (CFGD, 0x20)) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, One, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 } }) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x10, 0x00, 0x0000000000000199, ,) }, ResourceTemplate () { Register (FFixedHW, 0x10, 0x00, 0x0000000000000198, ,) } }) } Method (_PSS, 0, NotSerialized) { Return (Package (0x06) { Package (0x06) { 0xB0F, Zero, 0xA, 0xA, 0x4820, 0x4820 }, Package (0x06) { 0xA68, Zero, 0xA, 0xA, 0x81E, 0x81E }, Package (0x06) { 0x9C2, Zero, 0xA, 0xA, 0x471C, 0x471C }, Package (0x06) { 0x91B, Zero, 0xA, 0xA, 0x71A, 0x71A }, Package (0x06) { 0x875, Zero, 0xA, 0xA, 0x4618, 0x4618 }, Package (0x06) { 0x7CE, Zero, 0xA, 0xA, 0x616, 0x616 } }) } } Scope (_PR.CPU1) { Method (_CST, 0, NotSerialized) { Return (^^CPU0._CST ()) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (^^CPU0._PCT ()) } Method (_PSS, 0, NotSerialized) { Return (^^CPU0._PSS ()) } } Scope (_PR.CPU2) { Method (_CST, 0, NotSerialized) { Return (^^CPU0._CST ()) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (^^CPU0._PCT ()) } Method (_PSS, 0, NotSerialized) { Return (^^CPU0._PSS ()) } } Scope (_PR.CPU3) { Method (_CST, 0, NotSerialized) { Return (^^CPU0._CST ()) } Method (_PPC, 0, NotSerialized) { Return (Zero) } Method (_PCT, 0, NotSerialized) { Return (^^CPU0._PCT ()) } Method (_PSS, 0, NotSerialized) { Return (^^CPU0._PSS ()) } } With EIST and C-states disabled Windows makes cpu run hot (idling around 50) but in OSX cpu is idling around 35 degrees. I get same temperatures when I am using CST tables from my own bios. If I use MP 3,1 CST tables temps go down to 35 and IOrRegistryExplorer has CSTInfo key which is missing when using my own tables. Hi, Have you seen the post AB__75 post #71 that FormerlyKnownAs suggested? Maybe because of the hardcoded memory addresses the C-states do not reflect in the ioregexplorer. I tried making a fresh 10.5.4 install to run the Voodoo Kernel. Did not work. So presently exploring alternative ways to find hardcoded addresses of the C-states. Will be grateful if you share some insight. Thank you. Link to comment Share on other sites More sharing options...
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