jalavoui Posted Monday at 12:36 AM Share Posted Monday at 12:36 AM (edited) did you apply last patch. the log show other value if none of this work you will have to find where the calculation fails can be here or from previous call or wrong value here (there's a wg patch for this) this is a calculation issue. check wg after all this you now are pro at patches Edited Monday at 12:58 AM by jalavoui Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 12:51 AM Author Share Posted Monday at 12:51 AM (edited) With pixel patch, black screen mouse squared x.log Edited Monday at 12:52 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 12:57 AM Author Share Posted Monday at 12:57 AM (edited) . Edited Monday at 12:26 PM by ASUS Vivobook Link to comment Share on other sites More sharing options...
jalavoui Posted Monday at 12:59 AM Share Posted Monday at 12:59 AM (edited) check also wg from github well you can see my hacks also if you want. theyre old code from icl frame Edited Monday at 01:00 AM by jalavoui Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 01:04 AM Author Share Posted Monday at 01:04 AM (edited) 7 minutes ago, jalavoui said: check also wg from github well you can see my hacks also if you want. theyre old code from icl frame Fix the invalid maximum link rate issue on some laptops (Dell XPS 15 9570, etc.) Add the enable-dpcd-max-link-rate-fix property to IGPU, otherwise a kernel panic would happen due to a division-by-zero. Or instead of this property, use the boot-arg -igfxmlr. Starting from v1.3.7, it also fixes the invalid max link rate value read from the extended DPCD buffer. This fixes the kernel panic on new laptops, such as Dell Inspiron 7590 with Sharp display. Starting from v1.4.4, it probes the maximum link rate value automatically if the property dpcd-max-link-rate is not specified, and it now supports Ice Lake platforms. You could also manually specify a maximum link rate value via the dpcd-max-link-rate for the builtin display. Typically use 0x14 for 4K display and 0x0A for 1080p display. All possible values are 0x06 (RBR), 0x0A (HBR), 0x14 (HBR2) and 0x1E (HBR3). If an invalid value is specified or property dpcd-max-link-rate is not specified, the driver will probe the maximum link rate from DPCD instead. If the probed value is not supported by the driver (which should rarely happen), you need to manually specify a valid one, otherwise the graphics driver will trigger a kernel panic due to a division-by-zero later. MAX_LINK_RATE value is valid Edited Monday at 01:06 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
jalavoui Posted Monday at 01:07 AM Share Posted Monday at 01:07 AM (edited) dam wg code to check still the problem started with pipe 0 error. can this be a matter of putting the right values in con zero patch? i doubt a bit Edited Monday at 01:18 AM by jalavoui 1 Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 01:11 AM Author Share Posted Monday at 01:11 AM (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 6001 ][hwCRTCToIODetailedTi] pixelClock = 787400000 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 6096 ][hwCRTCToIODetailedTi] return (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] Current: (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] active h=2560, v=1600 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] scaled h=0, v=0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] pixelClock 787400000 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] scalerFlags 0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] signalConfig 0 Maybe my pixelclock should be this Link to comment Share on other sites More sharing options...
jalavoui Posted Monday at 01:18 AM Share Posted Monday at 01:18 AM (edited) check linux log for some values was on page 2 and so 785400 = 0xBFBF8 the patch can be changed Edited Monday at 01:26 AM by jalavoui Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 01:21 AM Author Share Posted Monday at 01:21 AM (edited) linux log pixel clock 785400 kHz syslog.txt Edited Monday at 01:22 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 01:30 AM Author Share Posted Monday at 01:30 AM The patch was this so... find 84 c0 0f 84 dd 00 00 00 48 ff 05 80 7d 0e 00 49 8b 85 18 01 00 00 rep 84 c0 49 c7 85 18 01 00 00 00 e9 05 11 90 90 49 8b 85 18 01 00 00 the rep value is the previous pixel value 0x1105E900 = 285 600 000 Link to comment Share on other sites More sharing options...
jalavoui Posted Monday at 01:32 AM Share Posted Monday at 01:32 AM (edited) 0x1105E900 84 c0 49 c7 85 18 01 00 00 00 e9 05 11 90 90 49 8b 85 18 01 00 00 0xBFBF8 = 785 400 84 c0 49 c7 85 18 01 00 00 f8 fb 0b 00 90 90 49 8b 85 18 01 00 00 Edited Monday at 01:33 AM by jalavoui Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 01:45 AM Author Share Posted Monday at 01:45 AM (edited) x.log Edited Monday at 06:18 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 01:52 AM Author Share Posted Monday at 01:52 AM (edited) Mac calculate a different current value 0xC03C8 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 6001 ][hwCRTCToIODetailedTi] pixelClock = 787400000 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 6096 ][hwCRTCToIODetailedTi] return (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] Current: (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] active h=2560, v=1600 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] scaled h=0, v=0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] pixelClock 787400000 Edited Monday at 01:55 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
jalavoui Posted Monday at 01:58 AM Share Posted Monday at 01:58 AM (edited) the {&kextG11FBT, f10, r10, arrsize(f10), 1} prevents edp code to load(). try but might give kp as it calls other display functions out of ideas for now the wrong value might come from agdc idk if wg as something for this. it does have some validatetimings functions check try play with this from wg so you can change Edited Monday at 02:33 AM by jalavoui Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 02:02 AM Author Share Posted Monday at 02:02 AM (edited) - {&kextG11FBT, f10, r10, arrsize(f10), 1}, already in use - Calculated -> DataM1=0x7e0017e3, DataN1=0x800000, LinkM1=0x1fd, LinkN1=0x80000 this calculation is different from linux log - have tried 787400000 pixelclock (0xC03C8) of the current Mac value also ... nothing changed x.log Edited Monday at 07:23 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 06:22 AM Author Share Posted Monday at 06:22 AM (edited) (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8786 ][SetupTimings ] timing ha=-1767492602, va=-4638712 __text:0000000000071F5E __text:0000000000071F5E ; =============== S U B R O U T I N E ======================================= __text:0000000000071F5E __text:0000000000071F5E ; Attributes: bp-based frame __text:0000000000071F5E __text:0000000000071F5E ; AppleIntelBaseController::SetupTimings(AppleIntelFramebuffer *, AppleIntelDisplayPath *, IODetailedTimingInformationV2 const*, CRTCParams *) __text:0000000000071F5E __ZN24AppleIntelBaseController12SetupTimingsEP21AppleIntelFramebufferP21AppleIntelDisplayPathPK29IODetailedTimingInformationV2P10CRTCParams proc near __text:0000000000071F5E ; CODE XREF: AppleIntelBaseController::hwSetMode(AppleIntelFramebuffer *,AppleIntelDisplayPath *,IODetailedTimingInformationV2 const*)+2E9↓p __text:0000000000071F5E ; AppleIntelBaseController::hwSetStream(AppleIntelFramebuffer *,AppleIntelDisplayPath *,IODetailedTimingInformationV2 const*)+E8↓p __text:0000000000071F5E ; DATA XREF: ... __text:0000000000071F5E __text:0000000000071F5E var_50 = dword ptr -50h __text:0000000000071F5E var_48 = qword ptr -48h __text:0000000000071F5E var_40 = qword ptr -40h __text:0000000000071F5E var_38 = qword ptr -38h __text:0000000000071F5E var_30 = qword ptr -30h __text:0000000000071F5E __text:0000000000071F5E ; __unwind { __text:0000000000071F5E push rbp __text:0000000000071F5F mov rbp, rsp __text:0000000000071F62 push r15 __text:0000000000071F64 push r14 __text:0000000000071F66 push r13 __text:0000000000071F68 push r12 __text:0000000000071F6A push rbx __text:0000000000071F6B sub rsp, 28h __text:0000000000071F6F mov r15, r8 __text:0000000000071F72 mov r14, rcx __text:0000000000071F75 mov rbx, rsi __text:0000000000071F78 inc cs:qword_1572B0 __text:0000000000071F7F mov edi, 8 __text:0000000000071F84 mov esi, 6 __text:0000000000071F89 call _IntelLogEnabled __text:0000000000071F8E test al, al __text:0000000000071F90 jz short loc_71FDC __text:0000000000071F92 inc cs:qword_1572C0 __text:0000000000071F99 mov eax, [rbx+1DCh] __text:0000000000071F9F mov [rsp+50h+var_38], r15 __text:0000000000071FA4 mov [rsp+50h+var_40], r14 __text:0000000000071FA9 mov [rsp+50h+var_48], rbx __text:0000000000071FAE mov [rsp+50h+var_50], eax __text:0000000000071FB1 lea rdx, aLibraryCachesC_10 ; "/Library/Caches/com.apple.xbs/Sources/G"... __text:0000000000071FB8 lea r8, aSetuptimings ; "SetupTimings" __text:0000000000071FBF lea r9, aFbDPTimingPPar ; "(fb%d:%p, timing=%p, params=%p)\n" __text:0000000000071FC6 mov ecx, 2250h __text:0000000000071FCB mov edi, 8 __text:0000000000071FD0 mov esi, 6 __text:0000000000071FD5 xor eax, eax __text:0000000000071FD7 call _IntelLog __text:0000000000071FDC __text:0000000000071FDC loc_71FDC: ; CODE XREF: AppleIntelBaseController::SetupTimings(AppleIntelFramebuffer *,AppleIntelDisplayPath *,IODetailedTimingInformationV2 const*,CRTCParams *)+32↑j __text:0000000000071FDC mov edi, 8 __text:0000000000071FE1 mov esi, 6 __text:0000000000071FE6 call _IntelLogEnabled __text:0000000000071FEB test al, al __text:0000000000071FED jz short loc_72030 __text:0000000000071FEF inc cs:qword_1572D0 __text:0000000000071FF6 mov eax, [r14+40h] __text:0000000000071FFA mov ecx, [r14+50h] __text:0000000000071FFE mov dword ptr [rsp+50h+var_48], ecx __text:0000000000072002 mov [rsp+50h+var_50], eax __text:0000000000072005 lea rdx, aLibraryCachesC_10 ; "/Library/Caches/com.apple.xbs/Sources/G"... __text:000000000007200C lea r8, aSetuptimings ; "SetupTimings" __text:0000000000072013 lea r9, aTimingHaDVaD ; "timing ha=%d, va=%d\n" __text:000000000007201A mov ecx, 2252h __text:000000000007201F mov edi, 8 __text:0000000000072024 mov esi, 6 __text:0000000000072029 xor eax, eax __text:000000000007202B call _IntelLog Edited Monday at 06:28 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 06:43 AM Author Share Posted Monday at 06:43 AM (edited) Look at this function : __text:000000000006F748 __text:000000000006F748 ; =============== S U B R O U T I N E ======================================= __text:000000000006F748 __text:000000000006F748 ; Attributes: bp-based frame __text:000000000006F748 __text:000000000006F748 ; __int64 __fastcall AppleIntelBaseController::hwUpdateRegCache(AppleIntelBaseController *__hidden this, AppleIntelFramebuffer *, AppleIntelDisplayPath *) __text:000000000006F748 __ZN24AppleIntelBaseController16hwUpdateRegCacheEP21AppleIntelFramebufferP21AppleIntelDisplayPath proc near __text:000000000006F748 ; CODE XREF: AppleIntelFramebuffer::prepareToExitSleep(void)+3A8↑p __text:000000000006F748 ; AppleIntelBaseController::hwGetCRTC(AppleIntelFramebuffer *,AppleIntelDisplayPath *)+73↓p __text:000000000006F748 ; DATA XREF: ... __text:000000000006F748 ; __unwind { __text:000000000006F748 push rbp __text:000000000006F749 mov rbp, rsp __text:000000000006F74C push r15 __text:000000000006F74E push r14 __text:000000000006F750 push r12 __text:000000000006F752 push rbx __text:000000000006F753 inc cs:qword_156D08 __text:000000000006F75A mov r14, rdx __text:000000000006F75D mov rbx, rdi __text:000000000006F760 lea r12, [rdi+0C40h] __text:000000000006F767 mov rdi, [rdi+0C40h] ; this __text:000000000006F76E mov esi, 0C7208h ; unsigned __int64 __text:000000000006F773 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F778 mov [rbx+0D78h], eax __text:000000000006F77E mov rdi, [rbx+0C40h] ; this __text:000000000006F785 mov esi, offset loc_C720C ; unsigned __int64 __text:000000000006F78A call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F78F mov [rbx+0D7Ch], eax __text:000000000006F795 mov rdi, [rbx+0C40h] ; this __text:000000000006F79C mov esi, 0C7204h ; unsigned __int64 __text:000000000006F7A1 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F7A6 mov [rbx+0D80h], eax __text:000000000006F7AC inc cs:qword_155768 __text:000000000006F7B3 mov r15d, [r14+3640h] __text:000000000006F7BA shl r15d, 0Ch __text:000000000006F7BE mov rdi, [rbx+0C40h] ; this __text:000000000006F7C5 lea esi, [r15+60000h] ; unsigned __int64 __text:000000000006F7CC call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F7D1 mov [r14+138h], eax __text:000000000006F7D8 mov rdi, [rbx+0C40h] ; this __text:000000000006F7DF lea esi, [r15+60004h] ; unsigned __int64 __text:000000000006F7E6 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F7EB mov [r14+13Ch], eax __text:000000000006F7F2 mov rdi, [rbx+0C40h] ; this __text:000000000006F7F9 lea esi, [r15+60008h] ; unsigned __int64 __text:000000000006F800 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F805 mov [r14+140h], eax __text:000000000006F80C mov rdi, [rbx+0C40h] ; this __text:000000000006F813 lea esi, loc_6000C[r15] ; unsigned __int64 __text:000000000006F81A call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F81F mov [r14+144h], eax __text:000000000006F826 mov rdi, [rbx+0C40h] ; this __text:000000000006F82D lea esi, [r15+60010h] ; unsigned __int64 __text:000000000006F834 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F839 mov [r14+148h], eax __text:000000000006F840 mov rdi, [rbx+0C40h] ; this __text:000000000006F847 lea esi, [r15+60014h] ; unsigned __int64 __text:000000000006F84E call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F853 mov [r14+14Ch], eax __text:000000000006F85A mov rdi, [rbx+0C40h] ; this __text:000000000006F861 lea esi, [r15+60028h] ; unsigned __int64 __text:000000000006F868 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F86D mov [r14+15Ch], eax __text:000000000006F874 mov rdi, [rbx+0C40h] ; this __text:000000000006F87B lea esi, [r15+60030h] ; unsigned __int64 __text:000000000006F882 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F887 mov [r14+168h], eax __text:000000000006F88E mov rdi, [rbx+0C40h] ; this __text:000000000006F895 lea esi, [r15+60034h] ; unsigned __int64 __text:000000000006F89C call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F8A1 mov [r14+16Ch], eax __text:000000000006F8A8 mov rdi, [rbx+0C40h] ; this __text:000000000006F8AF lea esi, [r15+60040h] ; unsigned __int64 __text:000000000006F8B6 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F8BB mov [r14+160h], eax __text:000000000006F8C2 mov rdi, [rbx+0C40h] ; this __text:000000000006F8C9 lea esi, [r15+60044h] ; unsigned __int64 __text:000000000006F8D0 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F8D5 mov [r14+164h], eax __text:000000000006F8DC mov rdi, [rbx+0C40h] ; this __text:000000000006F8E3 lea esi, [r15+60400h] ; unsigned __int64 __text:000000000006F8EA call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F8EF mov [r14+12Ch], eax __text:000000000006F8F6 mov rdi, [rbx+0C40h] ; this __text:000000000006F8FD lea esi, [r15+60404h] ; unsigned __int64 __text:000000000006F904 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F909 mov [r14+130h], eax __text:000000000006F910 mov rdi, [rbx+0C40h] ; this __text:000000000006F917 lea esi, loc_60410[r15] ; unsigned __int64 __text:000000000006F91E call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F923 mov [r14+134h], eax __text:000000000006F92A mov rdi, [rbx+0C40h] ; this __text:000000000006F931 lea esi, loc_70008[r15] ; unsigned __int64 __text:000000000006F938 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F93D mov [r14+154h], eax __text:000000000006F944 mov rdi, [rbx+0C40h] ; this __text:000000000006F94B mov esi, [r14+34h] ; unsigned __int64 __text:000000000006F94F call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F954 mov [r14+18Ch], eax __text:000000000006F95B mov rdi, [rbx+0C40h] ; this __text:000000000006F962 lea esi, loc_70030[r15] ; unsigned __int64 __text:000000000006F969 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F96E mov [r14+158h], eax __text:000000000006F975 mov rdi, [rbx+0C40h] ; this __text:000000000006F97C add r15d, 6001Ch __text:000000000006F983 mov rsi, r15 ; unsigned __int64 __text:000000000006F986 call __ZN31AppleIntelRegisterAccessManager14ReadRegister32Em ; AppleIntelRegisterAccessManager::ReadRegister32(ulong) __text:000000000006F98B mov [r14+150h], eax __text:000000000006F992 mov rdi, [r14+32C8h] ; this __text:000000000006F999 test rdi, rdi __text:000000000006F99C jz short loc_6F9AA __text:000000000006F99E inc cs:qword_156D10 __text:000000000006F9A5 call __ZN15AppleIntelPlane19updateRegisterCacheEv ; Some of my dumped linux registers are coincident to this fun : PIPE_DDI_FUNC_CTL_A (0x00060400): 0x8a000006 (enabled, no port, DP SST, 8 bpc, -VSync, -HSync, EDP A ON, x4) .... HTOTAL_A (0x00060000): 0x0a9f09ff (2560 active, 2720 total) HBLANK_A (0x00060004): 0x0a9f09ff (2560 start, 2720 end) HSYNC_A (0x00060008): 0x0a4f0a2f (2608 start, 2640 end) VTOTAL_A (0x0006000c): 0x06d5063f (1600 active, 1750 total) VBLANK_A (0x00060010): 0x06d50000 (1 start, 1750 end) VSYNC_A (0x00060014): 0x06480642 (1603 start, 1609 end) VSYNCSHIFT_A (0x00060028): 0x00000000 PIPEA_DATA_M1 (0x00060030): 0x7e5d159e (TU 64, val 0x5d159e 6100382) PIPEA_DATA_N1 (0x00060034): 0x00800000 (val 0x800000 8388608) PIPEA_LINK_M1 (0x00060040): 0x0007c1cd (val 0x7c1cd 508365) PIPEA_LINK_N1 (0x00060044): 0x00080000 (val 0x80000 524288) .... PCH_PP_CONTROL (0x000c7204): 0x00000067 (blacklight enabled, power down on reset, panel on) PCH_PP_ON_DELAYS (0x000c7208): 0x07d00001 In the requests array I think I should add this req, there are register important to me... it isn't this the method to solve them? {"__ZN24AppleIntelBaseController16hwUpdateRegCacheEP21AppleIntelFramebufferP21AppleIntelDisplayPath",releaseDoorbell}, Here the log after adding this request.. boot to full black screen, with no mouse visible (i think something has changed but i don't understand what) x.log But ine log show always these values... (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8833 ][SetupTimings ] TRANS_HTOTAL = 0x33843405 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8834 ][SetupTimings ] TRANS_HBLANK = 0x33843405 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8835 ][SetupTimings ] TRANS_HSYNC = 0x35053585 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8836 ][SetupTimings ] TRANS_VTOTAL = 0x17871807 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8837 ][SetupTimings ] TRANS_VBLANK = 0x17871807 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8838 ][SetupTimings ] TRANS_VSYNC = 0x8070807 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8839 ][SetupTimings ] TRANS_VSYNCSHIFT = 0x0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8872 ][SetupParams ] FB0: pipe A (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8878 ][SetupParams ] TRANS_CLK_SEL = 0x10000000 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8886 ][SetupParams ] PIPE_SRCSZ = 0x9ff063f (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp :15960 ][isVSCSDPForColorimet] FB0: return = 0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 8960 ][SetupParams ] TRANS_MSA_MISC = 0x25 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 9084 ][SetupParams ] TRANS_DDI_FUNC_CTL = 0x8a000006 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 9085 ][SetupParams ] TRANS_DDI_FUNC_CTL2 = 0x0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 9158 ][SetupParams ] TRANS_CONF = 0x80000024 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 9159 ][SetupParams ] PIPE_MISC = 0x800810 Edited Monday at 12:31 PM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 08:04 AM Author Share Posted Monday at 08:04 AM (edited) . Edited Monday at 09:28 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 08:24 AM Author Share Posted Monday at 08:24 AM (edited) . Edited Monday at 09:22 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 09:12 AM Author Share Posted Monday at 09:12 AM (edited) Look up, I think I discovered something interesting about registers but don't know if it is useful.. seems that nothing change if applying that request... there Is also always the agdc problem.. Edited Monday at 09:59 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 10:16 AM Author Share Posted Monday at 10:16 AM (edited) By putting pixel clock like agdc statement trying to equalize the values (first pixel patch to 285600000) got this log... I have disabled DataM and LinkM size check patches also...igfb starts at 11:08:43 x.log Edited Monday at 10:18 AM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 10:53 AM Author Share Posted Monday at 10:53 AM (edited) Disabling CRT patch got the old problem, I putted always the pixel clock patch equals to agdc value, disabled DataM and LinkM size check patches... I'm trying some different configs to understand better your work... (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 5910 ][hwCRTCToIODetailedTi] FB0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelController.cpp : 5925 ][hwCRTCToIODetailedTi] Pipe0 not enabled (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] Current: (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] active h=0, v=0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] scaled h=0, v=0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] pixelClock 0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] scalerFlags 0 (AppleIntelTGLGraphicsFramebuffer) [IGFB][DEBUG][DISPLAY ][AppleIntelFB.cpp : 2675 ][getCurrentDisplayMod] signalConfig 0 it could be the fulcrum of the discussion... and this is the place where start the misfact... and there are no call to " __ZN21AppleIntelFramebuffer21getCurrentDisplayModeEPiS0_ proc near so It seems that this method it is called externally from the framebuffer.... __text:0000000000049FDA __ZN21AppleIntelFramebuffer21getCurrentDisplayModeEPiS0_ proc near ..... __text:000000000004A00D test al, al __text:000000000004A00F jz short loc_4A057 ..... __text:000000000004A066 test al, al __text:000000000004A068 jz short loc_4A0AD ..... __text:000000000004A0CA test al, al __text:000000000004A0CC jz short loc_4A128 ..... __text:000000000004A139 test rdi, rdi __text:000000000004A13C jz short loc_4A16D ..... __text:000000000004A16D loc_4A16D: ; CODE XREF: AppleIntelFramebuffer::getCurrentDisplayMode(int *,int *)+162↑j __text:000000000004A16D cmp dword ptr [r13+4250h], 0FFFFFFFBh __text:000000000004A175 jnz loc_4A424 __text:000000000004A17B inc cs:qword_1500B8 __text:000000000004A182 inc cs:qword_14F7D0 __text:000000000004A189 cmp byte ptr [r13+44DEh], 0 __text:000000000004A191 jz loc_4A424 __text:000000000004A197 inc cs:qword_1500B0 __text:000000000004A19E cmp qword ptr [r13+4260h], 0 __text:000000000004A1A6 jz loc_4A424 __text:000000000004A1AC mov [rbp+var_38], r14 __text:000000000004A1B0 inc cs:qword_1500A8 __text:000000000004A1B7 mov rdi, [r13+1D0h] __text:000000000004A1BE lea rdx, [rbp+var_F8] __text:000000000004A1C5 mov rsi, r13 __text:000000000004A1C8 call __ZN24AppleIntelBaseController35hwCRTCToIODetailedTimingInformationEP21AppleIntelFramebufferP29IODetailedTimingInformationV2 ; AppleIntelBaseController::hwCRTCToIODetailedTimingInformation(AppleIntelFramebuffer *,IODetailedTimingInformationV2 *) __text:000000000004A1CD mov edi, 8 __text:000000000004A1D2 mov esi, 6 __text:000000000004A1D7 call _IntelLogEnabled __text:000000000004A1DC test al, al __text:000000000004A1DE jz short loc_4A25B __text:000000000004A1E0 inc cs:qword_1500C8 __text:000000000004A1E7 mov eax, [rbp+var_B8] __text:000000000004A1ED mov [rbp+var_30], rax __text:000000000004A1F1 mov r11d, [rbp+var_A8] __text:000000000004A1F8 mov ebx, [rbp+var_E4] __text:000000000004A1FE mov r14d, [rbp+var_E0] __text:000000000004A205 mov r12d, [rbp+var_DC] __text:000000000004A20C mov r10d, [rbp+var_D8] __text:000000000004A213 sub rsp, 8 __text:000000000004A217 lea rdx, aLibraryCachesC_7 ; "/Library/Caches/com.apple.xbs/Sources/G"... __text:000000000004A21E lea r8, aGetcurrentdisp ; "getCurrentDisplayMode" __text:000000000004A225 lea r9, aCurrentActiveH ; "Current:\n active h=%d, v=%d\n scaled h"... __text:000000000004A22C mov ecx, 0A73h __text:000000000004A231 mov edi, 8 __text:000000000004A236 mov esi, 6 __text:000000000004A23B mov eax, 0 __text:000000000004A240 push r10 __text:000000000004A242 push rbx __text:000000000004A243 push [rbp+var_D0] __text:000000000004A249 push r12 __text:000000000004A24B push r14 __text:000000000004A24D push r11 __text:000000000004A24F push [rbp+var_30] __text:000000000004A252 call _IntelLog __text:000000000004A257 add rsp, 40h ..... __text:000000000006BC2E ; AppleIntelBaseController::hwCRTCToIODetailedTimingInformation(AppleIntelFramebuffer *, IODetailedTimingInformationV2 *) __text:000000000006BC2E __ZN24AppleIntelBaseController35hwCRTCToIODetailedTimingInformationEP21AppleIntelFramebufferP29IODetailedTimingInformationV2 proc near __text:000000000006BC2E ; CODE XREF: AppleIntelFramebuffer::getCurrentDisplayMode(int *,int *)+1EE↑p __text:000000000006BC2E ; DATA XREF: __llvm_prf_data:0000000000179A48↓o __text:000000000006BC2E __text:000000000006BC2E var_40 = qword ptr -40h __text:000000000006BC2E var_29 = byte ptr -29h __text:000000000006BC2E __text:000000000006BC2E ; __unwind { __text:000000000006BC2E push rbp __text:000000000006BC2F mov rbp, rsp __text:000000000006BC32 push r15 __text:000000000006BC34 push r14 __text:000000000006BC36 push r13 __text:000000000006BC38 push r12 __text:000000000006BC3A push rbx __text:000000000006BC3B sub rsp, 18h __text:000000000006BC3F inc cs:qword_156248 __text:000000000006BC46 inc cs:qword_155220 __text:000000000006BC4D inc cs:qword_15A158 __text:000000000006BC54 mov r15, rdx __text:000000000006BC57 mov rbx, rsi __text:000000000006BC5A mov r14, rdi __text:000000000006BC5D cmp dword ptr [rsi+3FD8h], 0FFFFFFFFh __text:000000000006BC64 jz short loc_6BC7D __text:000000000006BC66 inc cs:qword_155228 __text:000000000006BC6D inc cs:qword_15A160 __text:000000000006BC74 lea rax, [rbx+4A08h] __text:000000000006BC7B jmp short loc_6BC8B __text:000000000006BC7D ; --------------------------------------------------------------------------- __text:000000000006BC7D __text:000000000006BC7D loc_6BC7D: ; CODE XREF: AppleIntelBaseController::hwCRTCToIODetailedTimingInformation(AppleIntelFramebuffer *,IODetailedTimingInformationV2 *)+36↑j __text:000000000006BC7D inc cs:qword_15A168 __text:000000000006BC84 lea rax, [rbx+49F0h] __text:000000000006BC8B __text:000000000006BC8B loc_6BC8B: ; CODE XREF: AppleIntelBaseController::hwCRTCToIODetailedTimingInformation(AppleIntelFramebuffer *,IODetailedTimingInformationV2 *)+4D↑j __text:000000000006BC8B mov r12, [rax] __text:000000000006BC8E test r12, r12 __text:000000000006BC91 jz loc_6BD85 __text:000000000006BC97 mov edi, 8 __text:000000000006BC9C mov esi, 6 __text:000000000006BCA1 call _IntelLogEnabled __text:000000000006BCA6 test al, al __text:000000000006BCA8 jz short loc_6BCE5 __text:000000000006BCAA inc cs:qword_156270 __text:000000000006BCB1 mov eax, [rbx+1DCh] __text:000000000006BCB7 mov dword ptr [rsp+40h+var_40], eax __text:000000000006BCBA lea rdx, aLibraryCachesC_10 ; "/Library/Caches/com.apple.xbs/Sources/G"... __text:000000000006BCC1 lea r8, aHwcrtctoiodeta ; "hwCRTCToIODetailedTimingInformation" __text:000000000006BCC8 lea r9, aFbD ; "FB%d\n" __text:000000000006BCCF mov ecx, 1716h __text:000000000006BCD4 mov edi, 8 __text:000000000006BCD9 mov esi, 6 __text:000000000006BCDE xor eax, eax __text:000000000006BCE0 call _IntelLog __text:000000000006BCE5 __text:000000000006BCE5 loc_6BCE5: ; CODE XREF: AppleIntelBaseController::hwCRTCToIODetailedTimingInformation(AppleIntelFramebuffer *,IODetailedTimingInformationV2 *)+7A↑j __text:000000000006BCE5 mov rdi, [r14+9B8h] __text:000000000006BCEC call _IORecursiveLockLock __text:000000000006BCF1 cmp dword ptr [r12+154h], 0 __text:000000000006BCFA js loc_6BDD2 __text:000000000006BD00 inc cs:qword_156278 __text:000000000006BD07 mov esi, 0A0h ; size_t __text:000000000006BD0C mov rdi, r15 ; void * __text:000000000006BD0F call _bzero __text:000000000006BD14 mov edi, 8 __text:000000000006BD19 mov esi, 6 __text:000000000006BD1E call _IntelLogEnabled __text:000000000006BD23 test al, al __text:000000000006BD25 jz short loc_6BD6B __text:000000000006BD27 inc cs:qword_156288 __text:000000000006BD2E inc cs:qword_155768 __text:000000000006BD35 mov eax, [r12+3640h] __text:000000000006BD3D mov dword ptr [rsp+40h+var_40], eax __text:000000000006BD40 lea rdx, aLibraryCachesC_10 ; "/Library/Caches/com.apple.xbs/Sources/G"... __text:000000000006BD47 lea r8, aHwcrtctoiodeta ; "hwCRTCToIODetailedTimingInformation" __text:000000000006BD4E lea r9, aPipeXNotEnable ; "Pipe%x not enabled\n" __text:000000000006BD55 mov ecx, 1725h __text:000000000006BD5A mov edi, 8 __text:000000000006BD5F mov esi, 6 __text:000000000006BD64 xor eax, eax __text:000000000006BD66 call _IntelLog x.log Edited Monday at 12:32 PM by ASUS Vivobook Link to comment Share on other sites More sharing options...
jalavoui Posted Monday at 01:52 PM Share Posted Monday at 01:52 PM (edited) try go back to the connectors patch that shows a black screen with square mouse pointer. that might help avoid pipe0 error then u fix the rest the conn patch really needs a review check this code it as wrapConnectionProbe() to help. it's based on wg adapted to tgl kern_gen11.cpp your tgl is using pg3 not pg2 as linux. on my card it uses both pg2 and pg3 same as linux the aux seems not to get called on tgl maybe this matters Edited Monday at 02:22 PM by jalavoui Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 02:37 PM Author Share Posted Monday at 02:37 PM (edited) Recap, with these requests and with these patches I see the mouse, now I can try the last file you posted (the probe) RouteRequestPlus requests[] = { {"__ZN16AppleIntelScaler13disableScalerEb",disableScaler, this->odisableScaler}, {"__ZN15AppleIntelPlane11enablePlaneEb",enablePlane, this->oenablePlane}, {"__ZN16AppleIntelScaler17programPipeScalerEP21AppleIntelDisplayPath",programPipeScaler, this->oprogramPipeScaler}, {"__ZN15AppleIntelPlane19updateRegisterCacheEv",AppleIntelPlaneupdateRegisterCache, this->oAppleIntelPlaneupdateRegisterCache}, {"__ZN16AppleIntelScaler19updateRegisterCacheEv",AppleIntelScalerupdateRegisterCache, this->oAppleIntelScalerupdateRegisterCache}, {"__ZN21AppleIntelFramebuffer17prepareToExitWakeEv",releaseDoorbell}, //****** {"__ZN19AppleIntelPowerWell4initEP24AppleIntelBaseController",releaseDoorbell}, {"__ZN31AppleIntelRegisterAccessManager14ReadRegister32Em",raReadRegister32, this->oraReadRegister32}, {"__ZN19AppleIntelPowerWell19enableDisplayEngineEv",releaseDoorbell}, {"__ZN19AppleIntelPowerWell21hwSetPowerWellStatePGEbj",releaseDoorbell}, {"__ZN19AppleIntelPowerWell20disableDisplayEngineEv",releaseDoorbell}, {"__ZN19AppleIntelPowerWell22hwSetPowerWellStateAuxEbj",releaseDoorbell}, //****** {"__ZN24AppleIntelBaseController15hwWaitForVBlankEP21AppleIntelFramebufferj",releaseDoorbell}, //****** {"__ZN24AppleIntelBaseController16hwUpdateRegCacheEP21AppleIntelFramebufferP21AppleIntelDisplayPath",releaseDoorbell}, {"__ZN24AppleIntelBaseController35hwCRTCToIODetailedTimingInformationEP21AppleIntelFramebufferP29IODetailedTimingInformationV2", releaseDoorbell}, }; LookupPatchPlus const patches[] = {// tgl debug kext {&kextG11FBT, f2, r2, arrsize(f2), 1}, {&kextG11FBT, f6a, r6a, arrsize(f6a), 1}, //jala crt {&kextG11FBT, f6b, r6b, arrsize(f6b), 1}, //jala agdc {&kextG11FBT, f6e, r6e, arrsize(f6e), 1}, //jala pixelclock {&kextG11FBT, f7, r7, arrsize(f7), 1}, {&kextG11FBT, f10, r10, arrsize(f10), 1}, {&kextG11FBT, f13, r13, arrsize(f13), 1}, {&kextG11FBT, f13b, r13b, arrsize(f13b), 1}, {&kextG11FBT, f15, r15, arrsize(f15), 1}, {&kextG11FBT, f19, r19, arrsize(f19), 1}, {&kextG11FBT, f20, r20, arrsize(f20), 1}, }; Edited Monday at 03:02 PM by ASUS Vivobook Link to comment Share on other sites More sharing options...
Stezza88 Posted Monday at 02:54 PM Author Share Posted Monday at 02:54 PM (edited) And this is the log with the wrapConnectionProbe fun, always same result powerWell = PG3 fRefCountPG[3] = 1 Enabling PG3 hardware ... powerWell = PG3 RefCountPG[3] = 0 Disabling PG3 hardware x.log Edited Monday at 04:38 PM by ASUS Vivobook Link to comment Share on other sites More sharing options...
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