Mastachief Posted September 12 Share Posted September 12 Its not supposed to hang, its supposed to panic, take a look below at mine Link to comment Share on other sites More sharing options...
jalavoui Posted September 12 Share Posted September 12 (edited) guys who as this dam lcd display with the driver uses this "feature" that we don't need i'm checking linux code i think we need to get rid of this bs and use part of old icl code SO I'LL W8 FOR INTEL Edited September 12 by jalavoui Link to comment Share on other sites More sharing options...
ArtikDiamond Posted September 12 Share Posted September 12 @Mastachiefis there a feature in nblue to disable dgpus? Like -wegnoegpu but for nblue. Without that macOS will try to use our dgpu and we can't test it... Link to comment Share on other sites More sharing options...
BitBass Posted September 12 Share Posted September 12 (edited) 7 hours ago, ArtikDiamond said: Wait a second! Me and some other people managed to boot, install and use macOS normally, you should try too Sure, but some guidance would be appreciated. Let's take it somewhere else though, so we don't muddy the thread with non-dev talk. Edited September 12 by BitBass Link to comment Share on other sites More sharing options...
jalavoui Posted September 12 Share Posted September 12 (edited) a feature in nblue to disable dgpus? i think can be done with opencore injection. i write about it but dont remenber where. i do hope someone get xcode and try a few patches so we can get this done as for non devs just try install it and post logs this patch isnt helping doing a review as it seems tobe setting state to zero need to fix this code plus add extra if (conditon) setportmode(0) return 0 uint32_t AppleIntelPortHAL::probePortMode() { uint64_t rmmio = getMember<uint64_t>(this, 0x9B0); unsigned int uVar3 = *reinterpret_cast<volatile uint32_t *>(rmmio + 0x1638a0); unsigned int *puVar2 = getMember<unsigned int*>(this, 0x548); unsigned long PVar5; unsigned long uVar4; if (getMember<uint64_t>(this, 0x1be0) != 0) { unsigned int uVar2 = *reinterpret_cast<volatile uint32_t *>(rmmio + 0xc4000); unsigned int uVar3 = *reinterpret_cast<volatile uint32_t *>(rmmio + 0x44470); switch(*puVar2) { case 0: uVar4 = (unsigned long)(uVar2 >> 0x10 & 1); break; case 1: uVar4 = (unsigned long)(uVar2 >> 0x11 & 1); break; default: uVar4 = 0; break; case 3: uVar4 = (unsigned long)((uVar3 >> 0x10 | uVar2 >> 0x18 | uVar3) & 1); break; case 4: uVar4 = (unsigned long)((uVar3 >> 0x11 | uVar3 >> 1 | uVar2 >> 0x19) & 1); break; case 5: uVar4 = (unsigned long)((uVar3 >> 0x12 | uVar3 >> 2 | uVar2 >> 0x1a) & 1); break; case 6: uVar4 = (unsigned long)((uVar3 >> 0x13 | uVar3 >> 3 | uVar2 >> 0x1b) & 1); break; case 7: uVar4 = (unsigned long)((uVar3 >> 0x14 | uVar3 >> 4 | uVar2 >> 0x1c) & 1); break; case 8: uVar4 = (unsigned long)((uVar3 >> 0x15 | uVar3 >> 5 | uVar2 >> 0x1d) & 1); } if (uVar4==0) { //setPortMode)((AppleIntelPort *)this,0); if (*(char *)(*(long *)(puVar2 + 0x14) & 8) == 0) { //(*this->vt->resetSoftwareState)(this); *getMember<uint64_t*>(this, 0x114)=0; *getMember<uint64_t*>(this, 0x11c)=0x2000000; *getMember<uint64_t*>(this, 0x124)=0; *getMember<uint64_t*>(this, 0x12c)=0; *getMember<uint64_t*>(this, 0x134)=0; *getMember<uint64_t*>(this, 0x140)=0; *getMember<uint64_t*>(this, 0x550)=0; bzero(getMember<uint64_t*>(this, 0x140),0x400); bzero(getMember<uint64_t*>(this, 0xc),0x108); bzero(getMember<uint64_t*>(this, 0x558),0x1c); } *puVar2 = 0; return 0; } } switch(*puVar2) { case 0: case 1: PVar5 = 1; break; case 2: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 & 0x40) == 0) { if ((uVar3 & 0x20) != 0) { LAB_000b2d13: PVar5 = 3; } } else { LAB_000b2d3d: PVar5 = 2; } } break; case 3: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 >> 0xe & 1) != 0) { goto LAB_000b2d3d; } if ((uVar3 >> 0xd & 1) != 0) { goto LAB_000b2d13; } } break; case 4: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 >> 0x16 & 1) != 0) { goto LAB_000b2d3d; } if ((uVar3 >> 0x15 & 1) != 0) { goto LAB_000b2d13; } } break; case 5: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 >> 0x1e & 1) != 0) { goto LAB_000b2d3d; } if ((uVar3 >> 0x1d & 1) != 0) { goto LAB_000b2d13; } } break; default: PVar5 = 0; } LAB_000b2d4a: return PVar5; }; Edited September 12 by jalavoui Link to comment Share on other sites More sharing options...
ArtikDiamond Posted September 12 Share Posted September 12 Me and ben are stuck because of the dgpu unfortunately... Link to comment Share on other sites More sharing options...
jalavoui Posted September 12 Share Posted September 12 (edited) tooke me 3 seconds to find this try the opencore device injection patch that was waht i ment https://dortania.github.io/OpenCore-Install-Guide/extras/spoof.html this part is what i used and tested it works very well to disable the dgpu but make sure you put the right path if working the device will vanish from ioreg do this using opencore config tool Edited September 12 by jalavoui Link to comment Share on other sites More sharing options...
jkbuha Posted September 12 Share Posted September 12 (edited) 35 minutes ago, jalavoui said: tooke me 3 seconds to find this try the opencore device injection patch that was waht i ment https://dortania.github.io/OpenCore-Install-Guide/extras/spoof.html i've used that spoof method previously to inject the 9A49 platform-id instead of my native one, but same results. Did you intend to use it for another purpose? Edit: got it, the injection method is to disable dGPU. note that might work for ˜50% of dGPUs, for the rest you will need to apply an ACPI _PS3 or _OFF call depending on your BIOS. My github has more details on how to do it precisely, it follows the OC-Little method... Edited September 12 by jkbuha Link to comment Share on other sites More sharing options...
benmacfreak Posted September 12 Share Posted September 12 2 hours ago, jalavoui said: a feature in nblue to disable dgpus? i think can be done with opencore injection. i write about it but dont remenber where. i do hope someone get xcode and try a few patches so we can get this done as for non devs just try install it and post logs this patch isnt helping doing a review as it seems tobe setting state to zero need to fix this code plus add extra if (conditon) setportmode(0) return 0 uint32_t AppleIntelPortHAL::probePortMode() { uint64_t rmmio = getMember<uint64_t>(this, 0x9B0); unsigned int uVar3 = *reinterpret_cast<volatile uint32_t *>(rmmio + 0x1638a0); unsigned int *puVar2 = getMember<unsigned int*>(this, 0x548); unsigned long PVar5; unsigned long uVar4; if (getMember<uint64_t>(this, 0x1be0) != 0) { unsigned int uVar2 = *reinterpret_cast<volatile uint32_t *>(rmmio + 0xc4000); unsigned int uVar3 = *reinterpret_cast<volatile uint32_t *>(rmmio + 0x44470); switch(*puVar2) { case 0: uVar4 = (unsigned long)(uVar2 >> 0x10 & 1); break; case 1: uVar4 = (unsigned long)(uVar2 >> 0x11 & 1); break; default: uVar4 = 0; break; case 3: uVar4 = (unsigned long)((uVar3 >> 0x10 | uVar2 >> 0x18 | uVar3) & 1); break; case 4: uVar4 = (unsigned long)((uVar3 >> 0x11 | uVar3 >> 1 | uVar2 >> 0x19) & 1); break; case 5: uVar4 = (unsigned long)((uVar3 >> 0x12 | uVar3 >> 2 | uVar2 >> 0x1a) & 1); break; case 6: uVar4 = (unsigned long)((uVar3 >> 0x13 | uVar3 >> 3 | uVar2 >> 0x1b) & 1); break; case 7: uVar4 = (unsigned long)((uVar3 >> 0x14 | uVar3 >> 4 | uVar2 >> 0x1c) & 1); break; case 8: uVar4 = (unsigned long)((uVar3 >> 0x15 | uVar3 >> 5 | uVar2 >> 0x1d) & 1); } if (uVar4==0) { //setPortMode)((AppleIntelPort *)this,0); if (*(char *)(*(long *)(puVar2 + 0x14) & 8) == 0) { //(*this->vt->resetSoftwareState)(this); *getMember<uint64_t*>(this, 0x114)=0; *getMember<uint64_t*>(this, 0x11c)=0x2000000; *getMember<uint64_t*>(this, 0x124)=0; *getMember<uint64_t*>(this, 0x12c)=0; *getMember<uint64_t*>(this, 0x134)=0; *getMember<uint64_t*>(this, 0x140)=0; *getMember<uint64_t*>(this, 0x550)=0; bzero(getMember<uint64_t*>(this, 0x140),0x400); bzero(getMember<uint64_t*>(this, 0xc),0x108); bzero(getMember<uint64_t*>(this, 0x558),0x1c); } *puVar2 = 0; return 0; } } switch(*puVar2) { case 0: case 1: PVar5 = 1; break; case 2: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 & 0x40) == 0) { if ((uVar3 & 0x20) != 0) { LAB_000b2d13: PVar5 = 3; } } else { LAB_000b2d3d: PVar5 = 2; } } break; case 3: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 >> 0xe & 1) != 0) { goto LAB_000b2d3d; } if ((uVar3 >> 0xd & 1) != 0) { goto LAB_000b2d13; } } break; case 4: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 >> 0x16 & 1) != 0) { goto LAB_000b2d3d; } if ((uVar3 >> 0x15 & 1) != 0) { goto LAB_000b2d13; } } break; case 5: PVar5 = 0; if (uVar3 != 0xffffffff) { if ((uVar3 >> 0x1e & 1) != 0) { goto LAB_000b2d3d; } if ((uVar3 >> 0x1d & 1) != 0) { goto LAB_000b2d13; } } break; default: PVar5 = 0; } LAB_000b2d4a: return PVar5; }; i have an apple dev account and sequoia on my laptop, BUT im unsure what to do to patch the kext, i can build it but unsure HOW to patch the code though.. Link to comment Share on other sites More sharing options...
jkbuha Posted September 13 Share Posted September 13 16 hours ago, jalavoui said: i deleted old sources and binarys to clean the thread. latest nblue binary work with icl framebuffer (few posts back) as for tgl this are latest sources - hope some devs helps by publishing new code NootedBlue-master.zip 410.74 kB · 12 downloads HookCase-master.zip 191 kB · 6 downloads ok, let me try and contribute here. after some configuration, have successfully set up the source code, and built both kexts under xcode. happy to start looking at which functions need to be looked at/uncommented first. just let me know which are the most important ones to start. 1 Link to comment Share on other sites More sharing options...
ArtikDiamond Posted September 13 Share Posted September 13 22 hours ago, jalavoui said: tooke me 3 seconds to find this try the opencore device injection patch that was waht i ment https://dortania.github.io/OpenCore-Install-Guide/extras/spoof.html this part is what i used and tested it works very well to disable the dgpu but make sure you put the right path if working the device will vanish from ioreg do this using opencore config tool I tried both yesterday and today, but igfxutils can't detect my dGPU... Link to comment Share on other sites More sharing options...
jalavoui Posted September 15 Share Posted September 15 (edited) while i was playing with those apple internal kexts i managed to load the icl framebuufer. the log is huge depending on IGLogLevel=8 number but the advantage of getting proper logs + usage of many parameters not present on production version is huge here's the bin and logs. you need hookcase + previous sle_internal installed to /L/E now it's so clear why many cards dont work - all is in the new logs Edited September 22 by jalavoui 3 Link to comment Share on other sites More sharing options...
jkbuha Posted September 16 Share Posted September 16 this latest version doesnt detect the iGPU (46a6 or 9a49), and remains looping in text mode without any second boot. no KPs, no blank screen Link to comment Share on other sites More sharing options...
benmacfreak Posted September 16 Share Posted September 16 1 hour ago, jkbuha said: this latest version doesnt detect the iGPU (46a6 or 9a49), and remains looping in text mode without any second boot. no KPs, no blank screen i get the same with my laptop 9a68 device ID Link to comment Share on other sites More sharing options...
jalavoui Posted September 17 Share Posted September 17 (edited) theory then in code DDIx is "index" after this auto portindex we get pipes idk where bus id is used checking icl v tgs then the rest of code fails trying to apply this patch Edited September 17 by jalavoui Link to comment Share on other sites More sharing options...
Mastachief Posted September 17 Share Posted September 17 (edited) From Hackintool BUSID and IndexSection Below is from the BUSID Section: Proven by ApplelntelFramcbufferControllor::MapFBToPort, by a call to ApplelntelFramebufferController::getGMBuslDfromPort. This is GMBUS (Graphic Management Bus) ID described in Gen 9 https://cdrdv2-public.intel.com/ 690989/intel-gfx-prm-osrc-hsw-display.pdf Gen 11 https://cdrdv2-public.intel.com/ 705833/intel-gfx-prm-osrc-tgl-vol-12-display-engine.pdf The use could be found in Intel Linux Graphics Driver source code: https://github.com/torvalds/linux/blob/6481d5ed076e69db83ca75e751ad492a6fb669a7/drivers/gpu/drm/i915/intel_lrc.c https://github.com/torvalds/linux/blob/6481d5ed076e69db83ca75e751ad492a6fb669a7/drivers/gpu/drm/i915/i915_reg.h However, it should be noted that Apple identifiers are slightly different from Linux driver. In Linux 0 means disabled, however, for Apple it has some special meaning and is used for internal display. Other than that the values are the same: • GMBUS_PIN_DPC (4) HDMIC • GMBUS_PIN_DPB (5) SDVO, HDMIB • GMBUS_PIN_DPD (6) HDMID • GMBUS_PIN_VGADDC (2) VGA untilBroadwell inclusive. So basically you could use 4, 5, 6 for arbitrary HDMI or DisplayPort displays. Since 5 supports SDVO (https://en.wikipedia.org/wiki/Seriat_Digital_Video_Out), it may also be used to support DVI displays. Starting with Skylake VGA works via SOVO too (instead of a dedicated GMBUS_PIN_VGAODC id). Below is from the Index Section: Watch out, this is really messy (see ApplelntelFramebutferController::MapFBToPort}. I am not fully sure why this exists, and recommend setting index to array index (i.e. the sequential number from 0). The only accepted values are 0, 1, 2, 3, and-1 (0xFF). When index is equal to arrayindex the logic is simple: Port with index 0 is always considered built-in {of LVOS type) regardless of any other values. Ports with indexes 1-3 are checked against type, HDMI will allow the use of digital audio, otherwise DP is assumed. Port with index 0xFF is ignored and skipped. When index!= array index port type will be read from connector[index].type Say, we have 2 active ports: 0 - [1] buslD 4 type LVDS 1 - [2] buslD 5 type DP 2 - [3] buslD 6 type HDMI 3 - [-1] buslD 0 type Dummy This will result in 2 framebuffers which types will be shifted: 0 - buslD 4 type DP 1 - buslD 5 type HDMI In fact BuslD values are also read as connector[index].buslD, but are later mapped back via ApplelntelFramebufferController::getGMBuslDfromPort by looking up a connector with the specified index. The lookup will stop as soon as a special marker connector (-1) is found. To illustrate, if we have 2 active ports: 0 - [1] buslD 4 type LVDS 1 - [2] buslD 5 typoDP 2 - [-1] buslD 6 type HDMI 3 - I·1] buslD 0 type Dummy The result will be 2 framebuffers which types and the second buslD will be shifted: 0 - buslD 4 typoDP 1 - buslD 6 typeHDMI It is also used for port-number calculation. - LVDS displays (more precisely, displays withCNConnectorAlwaysConnected flag set) get port-number 0. - Other displays go through index - port-number mapping: 1 - 5, 2 - 6, 3 - 7, or fallback to 0. By following the above guide, thats how i came up with the Device properties for Intel Plus Graphics G7 and the alldata connectors patch using whatevergreen. instead of Zero the connectors i just assign different ID's to null them out. as the connector information differed between cannonlake and icelake, there were differences with the alldata, it was half the actual amount of values. <key>PciRoot(0x0)/Pci(0x2,0x0)</key> <dict> <key>AAPL,GfxYTile</key> <data>AQAAAA==</data> <key>AAPL,ig-platform-id</key> <data>AABSig==</data> <key>AAPL,slot-name</key> <string>Internal@0,2,0</string> <key>AAPL00,override-no-connect</key> <data>AP///////wAw5HycAAAAAAAfAQSVIhNgA2+xp1VMniUMUFQAAAABAQEBAQEBAQEBAQEBAQEBLjaAoHA4H0AwIDUAWMIQAAAaHySAoHA4H0AwIDUAWMIQAAAaAAAAAAAAAAAAAAAAAAAAAAAAAAAAAgAMOv8KPH0SFCR9AAAAAEY=</data> <key>complete-modeset</key> <data>AQAAAA==</data> <key>device-id</key> <data>U4oAAA==</data> <key>device_type</key> <string>VGA compatible controller</string> <key>disable-agdc</key> <data>AAAAAA==</data> <key>dpcd-max-link-rate</key> <data>CgAAAA==</data> <key>enable-cdclk-frequency-fix</key> <data>AQAAAA==</data> <key>enable-dbuf-early-optimizer</key> <data>AQAAAA==</data> <key>enable-dpcd-max-link-rate-fix</key> <data>AQAAAA==</data> <key>enable-dvmt-calc-fix</key> <data>AQAAAA==</data> <key>force-online</key> <data>AQAAAA==</data> <key>framebuffer-con0-alldata</key> <data>AAAAAAAAAAAAAAAAAAAAAAIAAAAYAAAA</data> <key>framebuffer-con0-enable</key> <data>AQAAAA==</data> <key>framebuffer-con1-alldata</key> <data>AgAAAAAAAAABAAAAAQAAAAAEAADBAgAA</data> <key>framebuffer-con1-enable</key> <data>AQAAAA==</data> <key>framebuffer-con2-alldata</key> <data>AwAAAAoAAAABAAAAAQAAAAAEAADBAgAA</data> <key>framebuffer-con2-enable</key> <data>AQAAAA==</data> <key>framebuffer-patch-enable</key> <data>AQAAAA==</data> <key>framebuffer-unifiedmem</key> <data>AAAAgA==</data> <key>model</key> <string>Intel Iris Xe Graphics</string> </dict> Edited September 17 by Mastachief 1 Link to comment Share on other sites More sharing options...
jalavoui Posted September 17 Share Posted September 17 (edited) tks. for future ref i found the condition that is used to match port number to gmbus in code this value is used if not zero the requestes it calls are wonder why i dont see this log line anywere Edited September 17 by jalavoui 2 Link to comment Share on other sites More sharing options...
jalavoui Posted September 20 Share Posted September 20 (edited) by changing the icl connectors with DDI zero up to 2 + some extra nblue patches the agdc policy no longer hangs i.e. no more junk logs in /library/logs the pipe 0 or 1 setting also matters when crt function is called the bus number allows i2c comm. i used 8 and got some strange reading (sould be bus zero not 8 anyway) can't follow linux logic blindly but instead check how apple code handles this connectors info this are icl/tgl tcon changes (maybe need port to icl for proper power support?) i just disabled hwreg patch in nblue - it is no longer needed. this was the 1st patch i've wrote to make display boot Edited September 22 by jalavoui 2 Link to comment Share on other sites More sharing options...
ArtikDiamond Posted September 23 Share Posted September 23 On 9/16/2024 at 3:33 PM, benmacfreak said: i get the same with my laptop 9a68 device ID Same Link to comment Share on other sites More sharing options...
jalavoui Posted September 28 Share Posted September 28 (edited) this is a icl validation function void __thiscall AppleIntelBaseController::WriteRegister32(AppleIntelBaseController *this,ulong param_1,uint param_2) { char cVar1; undefined8 uVar2; uint uVar3; undefined8 uVar4; char *pcVar5; undefined8 in_stack_ffffffffffffffc8; undefined4 uVar6; uVar6 = (undefined4)((ulong)in_stack_ffffffffffffffc8 >> 0x20); _DAT_001935c0 = _DAT_001935c0 + 1; if ((*(byte *)(*(long *)&(this->m_AppleIntelBaseController).field_0xce0 + 0xb2) & 1) != 0) { _DAT_001935d0 = _DAT_001935d0 + 1; if (param_1 < 0x2000) { _DAT_001935d8 = _DAT_001935d8 + 1; } else { _DAT_001935e0 = _DAT_001935e0 + 1; if ((param_1 < 0x40000) || ((_DAT_001935d8 = _DAT_001935d8 + 1, 0x1bffff < param_1 && (_DAT_001935e8 = _DAT_001935e8 + 1, param_1 < 0x240000)))) { _DAT_001935c8 = _DAT_001935c8 + 1; cVar1 = _IntelLogEnabled(2,0xf); if (cVar1 == '\0') { return; } _DAT_001935f8 = _DAT_001935f8 + 1; pcVar5 = "0x%lx MMIO dropped for 2D only part\n"; uVar2 = 0x517; uVar4 = 2; goto LAB_0006af7d; } } } uVar3 = (uint)param_1; if (*(int *)&(this->m_AppleIntelBaseController).field_0xc20 - 4 <= param_1) { _DAT_00193600 = _DAT_00193600 + 1; cVar1 = _IntelLogEnabled(1,0xf); if (cVar1 == '\0') { return; } _DAT_00193610 = _DAT_00193610 + 1; param_1 = CONCAT44(uVar6,uVar3); pcVar5 = "Invalid register access at offset = %x. Returning without register access\n"; uVar2 = 0x520; uVar4 = 1; LAB_0006af7d: _IntelLog(uVar4,0xf, "/Library/Caches/com.apple.xbs/Sources/GPUDriversIntel/GPUDriversIntel-16.0.32/IONDRV/ ICLLP/AppleIntelFramebuffer/AppleIntelController.cpp" ,uVar2,"WriteRegister32",pcVar5,param_1); return; } if (param_1 == 0x6f800) { _DAT_00193618 = _DAT_00193618 + 1; *(uint *)&(this->m_AppleIntelBaseController).field_0xbfc = param_2; goto LAB_0006aed9; } if ((long)param_1 < 0x64318) { if ((long)param_1 < 0x4b488) { if ((long)param_1 < 0x4442c) { if ((long)param_1 < 0x44414) { if ((long)param_1 < 0x44408) { if (((param_1 == 0x44200) || (param_1 == 0x44400)) || (param_1 == 0x44404)) goto LAB_0006b70b; } else if (((param_1 == 0x44408) || (param_1 == 0x4440c)) || (param_1 == 0x44410)) goto LAB_0006b70b; } else if ((long)param_1 < 0x44420) { if (((param_1 == 0x44414) || (param_1 == 0x44418)) || (param_1 == 0x4441c)) goto LAB_0006b70b; } else if (((param_1 == 0x44420) || (param_1 == 0x44424)) || (param_1 == 0x44428)) goto LAB_0006b70b; } else if ((long)param_1 < 0x4ac00) { if ((long)param_1 < 0x4a404) { if (((param_1 == 0x4442c) || (param_1 == 0x44500)) || (param_1 == 0x4a400)) goto LAB_0006b70b; } else if (((param_1 == 0x4a404) || (param_1 == 0x4a484)) || (param_1 == 0x4a488)) goto LAB_0006b70b; } else if ((long)param_1 < 0x4ac88) { if (((param_1 == 0x4ac00) || (param_1 == 0x4ac04)) || (param_1 == 0x4ac84)) goto LAB_0006b70b; } else if ((long)param_1 < 0x4b404) { if ((param_1 == 0x4ac88) || (param_1 == 0x4b400)) goto LAB_0006b70b; } else if ((param_1 == 0x4b404) || (param_1 == 0x4b484)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64114) { if ((long)param_1 < 0x64014) { if ((long)param_1 < 0x62a70) { if (((param_1 == 0x4b488) || (param_1 == 0x60a70)) || (param_1 == 0x61a70)) goto LAB_0006b70b; } else if (((param_1 == 0x62a70) || (param_1 == 0x63a70)) || (param_1 == 0x64010)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64020) { if (((param_1 == 0x64014) || (param_1 == 0x64018)) || (param_1 == 0x6401c)) goto LAB_0006b70b; } else if (((param_1 == 0x64020) || (param_1 == 0x64024)) || (param_1 == 0x64110)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64214) { if ((long)param_1 < 0x64120) { if (((param_1 == 0x64114) || (param_1 == 0x64118)) || (param_1 == 0x6411c)) goto LAB_0006b70b; } else if (((param_1 == 0x64120) || (param_1 == 0x64124)) || (param_1 == 0x64210)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64220) { if (((param_1 == 0x64214) || (param_1 == 0x64218)) || (param_1 == 0x6421c)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64310) { if ((param_1 == 0x64220) || (param_1 == 0x64224)) goto LAB_0006b70b; } else if ((param_1 == 0x64310) || (param_1 == 0x64314)) goto LAB_0006b70b; goto LAB_0006aed9; } if ((long)param_1 < 0x7069c) { if ((long)param_1 < 0x64518) { if ((long)param_1 < 0x64418) { if ((long)param_1 < 0x64324) { if (((param_1 == 0x64318) || (param_1 == 0x6431c)) || (param_1 == 0x64320)) goto LAB_0006b70b; } else if (((param_1 == 0x64324) || (param_1 == 0x64410)) || (param_1 == 0x64414)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64424) { if (((param_1 == 0x64418) || (param_1 == 0x6441c)) || (param_1 == 0x64420)) goto LAB_0006b70b; } else if (((param_1 == 0x64424) || (param_1 == 0x64510)) || (param_1 == 0x64514)) goto LAB_0006b70b; } else if ((long)param_1 < 0x70084) { if ((long)param_1 < 0x64524) { if (((param_1 == 0x64518) || (param_1 == 0x6451c)) || (param_1 == 0x64520)) goto LAB_0006b70b; } else if (((param_1 == 0x64524) || (param_1 == 0x6fa70)) || (param_1 == 0x70080)) goto LAB_0006b70b; } else if ((long)param_1 < 0x701d0) { if (((param_1 == 0x70084) || (param_1 == 0x70088)) || (param_1 == 0x7019c)) goto LAB_0006b70b; } else if ((long)param_1 < 0x701d8) { if ((param_1 == 0x701d0) || (param_1 == 0x701d4)) goto LAB_0006b70b; } else if ((param_1 == 0x701d8) || (param_1 == 0x701dc)) goto LAB_0006b70b; } else if ((long)param_1 < 0x7219c) { if ((long)param_1 < 0x711d4) { if ((long)param_1 < 0x71088) { if (((param_1 == 0x7069c) || (param_1 == 0x71080)) || (param_1 == 0x71084)) { LAB_0006b70b: _DAT_00193628 = _DAT_00193628 + 1; goto LAB_0006b712; } } else if (((param_1 == 0x71088) || (param_1 == 0x7119c)) || (param_1 == 0x711d0)) goto LAB_0006b70b; } else if ((long)param_1 < 0x7169c) { if (((param_1 == 0x711d4) || (param_1 == 0x711d8)) || (param_1 == 0x711dc)) goto LAB_0006b70b; } else if ((long)param_1 < 0x72084) { if ((param_1 == 0x7169c) || (param_1 == 0x72080)) goto LAB_0006b70b; } else if ((param_1 == 0x72084) || (param_1 == 0x72088)) goto LAB_0006b70b; } else if ((long)param_1 < 0xc5100) { if ((long)param_1 < 0x721d8) { if (((param_1 == 0x7219c) || (param_1 == 0x721d0)) || (param_1 == 0x721d4)) goto LAB_0006b70b; } else if (((param_1 == 0x721d8) || (param_1 == 0x721dc)) || (param_1 == 0x7269c)) goto LAB_0006b70b; } else if ((long)param_1 < 0xc510c) { if (((param_1 == 0xc5100) || (param_1 == 0xc5104)) || (param_1 == 0xc5108)) goto LAB_0006b70b; } else if ((long)param_1 < 0xc8258) { if ((param_1 == 0xc510c) || (param_1 == 0xc5110)) goto LAB_0006b70b; } else if ((param_1 == 0xc8258) || ((undefined *)param_1 == &DAT_00190010)) goto LAB_0006b70b; LAB_0006aed9: _DAT_00193950 = _DAT_00193950 + 1; cVar1 = _IntelLogEnabled(8,0xf); if (cVar1 != '\0') { _DAT_00193960 = _DAT_00193960 + 1; _IntelLog(8,0xf, "/Library/Caches/com.apple.xbs/Sources/GPUDriversIntel/GPUDriversIntel-16.0.32/IONDRV/ ICLLP/AppleIntelFramebuffer/AppleIntelController.cpp" ,0x595,"WriteRegister32","WR 0x%08X = 0x%08X\n",CONCAT44(uVar6,uVar3),param_2); } LAB_0006b712: _DAT_00193620 = _DAT_00193620 + 1; captureMMIO(this,uVar3,param_2); _DAT_00193558 = _DAT_00193558 + 1; *(uint *)(*(long *)&(this->m_AppleIntelBaseController).field_0x9b0 + param_1) = param_2; return; } the code register red/write in tgl is this functions dont have such validations and are maybe ment for DG1 only displays ? maybe this card work - Intel Corporation DG1 [Iris Xe Graphics] [8086:4908] - that's why they crash at bootdisplay setup ? so who as this kind of display and can figure it out ? i just left nblue with the minimun patches for it tobe tested (power and connectors) as for icl it currently works but with wrong sleep/wake code Edited September 28 by jalavoui 3 Link to comment Share on other sites More sharing options...
benmacfreak Posted September 29 Share Posted September 29 11 hours ago, jalavoui said: this is a icl validation function void __thiscall AppleIntelBaseController::WriteRegister32(AppleIntelBaseController *this,ulong param_1,uint param_2) { char cVar1; undefined8 uVar2; uint uVar3; undefined8 uVar4; char *pcVar5; undefined8 in_stack_ffffffffffffffc8; undefined4 uVar6; uVar6 = (undefined4)((ulong)in_stack_ffffffffffffffc8 >> 0x20); _DAT_001935c0 = _DAT_001935c0 + 1; if ((*(byte *)(*(long *)&(this->m_AppleIntelBaseController).field_0xce0 + 0xb2) & 1) != 0) { _DAT_001935d0 = _DAT_001935d0 + 1; if (param_1 < 0x2000) { _DAT_001935d8 = _DAT_001935d8 + 1; } else { _DAT_001935e0 = _DAT_001935e0 + 1; if ((param_1 < 0x40000) || ((_DAT_001935d8 = _DAT_001935d8 + 1, 0x1bffff < param_1 && (_DAT_001935e8 = _DAT_001935e8 + 1, param_1 < 0x240000)))) { _DAT_001935c8 = _DAT_001935c8 + 1; cVar1 = _IntelLogEnabled(2,0xf); if (cVar1 == '\0') { return; } _DAT_001935f8 = _DAT_001935f8 + 1; pcVar5 = "0x%lx MMIO dropped for 2D only part\n"; uVar2 = 0x517; uVar4 = 2; goto LAB_0006af7d; } } } uVar3 = (uint)param_1; if (*(int *)&(this->m_AppleIntelBaseController).field_0xc20 - 4 <= param_1) { _DAT_00193600 = _DAT_00193600 + 1; cVar1 = _IntelLogEnabled(1,0xf); if (cVar1 == '\0') { return; } _DAT_00193610 = _DAT_00193610 + 1; param_1 = CONCAT44(uVar6,uVar3); pcVar5 = "Invalid register access at offset = %x. Returning without register access\n"; uVar2 = 0x520; uVar4 = 1; LAB_0006af7d: _IntelLog(uVar4,0xf, "/Library/Caches/com.apple.xbs/Sources/GPUDriversIntel/GPUDriversIntel-16.0.32/IONDRV/ ICLLP/AppleIntelFramebuffer/AppleIntelController.cpp" ,uVar2,"WriteRegister32",pcVar5,param_1); return; } if (param_1 == 0x6f800) { _DAT_00193618 = _DAT_00193618 + 1; *(uint *)&(this->m_AppleIntelBaseController).field_0xbfc = param_2; goto LAB_0006aed9; } if ((long)param_1 < 0x64318) { if ((long)param_1 < 0x4b488) { if ((long)param_1 < 0x4442c) { if ((long)param_1 < 0x44414) { if ((long)param_1 < 0x44408) { if (((param_1 == 0x44200) || (param_1 == 0x44400)) || (param_1 == 0x44404)) goto LAB_0006b70b; } else if (((param_1 == 0x44408) || (param_1 == 0x4440c)) || (param_1 == 0x44410)) goto LAB_0006b70b; } else if ((long)param_1 < 0x44420) { if (((param_1 == 0x44414) || (param_1 == 0x44418)) || (param_1 == 0x4441c)) goto LAB_0006b70b; } else if (((param_1 == 0x44420) || (param_1 == 0x44424)) || (param_1 == 0x44428)) goto LAB_0006b70b; } else if ((long)param_1 < 0x4ac00) { if ((long)param_1 < 0x4a404) { if (((param_1 == 0x4442c) || (param_1 == 0x44500)) || (param_1 == 0x4a400)) goto LAB_0006b70b; } else if (((param_1 == 0x4a404) || (param_1 == 0x4a484)) || (param_1 == 0x4a488)) goto LAB_0006b70b; } else if ((long)param_1 < 0x4ac88) { if (((param_1 == 0x4ac00) || (param_1 == 0x4ac04)) || (param_1 == 0x4ac84)) goto LAB_0006b70b; } else if ((long)param_1 < 0x4b404) { if ((param_1 == 0x4ac88) || (param_1 == 0x4b400)) goto LAB_0006b70b; } else if ((param_1 == 0x4b404) || (param_1 == 0x4b484)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64114) { if ((long)param_1 < 0x64014) { if ((long)param_1 < 0x62a70) { if (((param_1 == 0x4b488) || (param_1 == 0x60a70)) || (param_1 == 0x61a70)) goto LAB_0006b70b; } else if (((param_1 == 0x62a70) || (param_1 == 0x63a70)) || (param_1 == 0x64010)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64020) { if (((param_1 == 0x64014) || (param_1 == 0x64018)) || (param_1 == 0x6401c)) goto LAB_0006b70b; } else if (((param_1 == 0x64020) || (param_1 == 0x64024)) || (param_1 == 0x64110)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64214) { if ((long)param_1 < 0x64120) { if (((param_1 == 0x64114) || (param_1 == 0x64118)) || (param_1 == 0x6411c)) goto LAB_0006b70b; } else if (((param_1 == 0x64120) || (param_1 == 0x64124)) || (param_1 == 0x64210)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64220) { if (((param_1 == 0x64214) || (param_1 == 0x64218)) || (param_1 == 0x6421c)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64310) { if ((param_1 == 0x64220) || (param_1 == 0x64224)) goto LAB_0006b70b; } else if ((param_1 == 0x64310) || (param_1 == 0x64314)) goto LAB_0006b70b; goto LAB_0006aed9; } if ((long)param_1 < 0x7069c) { if ((long)param_1 < 0x64518) { if ((long)param_1 < 0x64418) { if ((long)param_1 < 0x64324) { if (((param_1 == 0x64318) || (param_1 == 0x6431c)) || (param_1 == 0x64320)) goto LAB_0006b70b; } else if (((param_1 == 0x64324) || (param_1 == 0x64410)) || (param_1 == 0x64414)) goto LAB_0006b70b; } else if ((long)param_1 < 0x64424) { if (((param_1 == 0x64418) || (param_1 == 0x6441c)) || (param_1 == 0x64420)) goto LAB_0006b70b; } else if (((param_1 == 0x64424) || (param_1 == 0x64510)) || (param_1 == 0x64514)) goto LAB_0006b70b; } else if ((long)param_1 < 0x70084) { if ((long)param_1 < 0x64524) { if (((param_1 == 0x64518) || (param_1 == 0x6451c)) || (param_1 == 0x64520)) goto LAB_0006b70b; } else if (((param_1 == 0x64524) || (param_1 == 0x6fa70)) || (param_1 == 0x70080)) goto LAB_0006b70b; } else if ((long)param_1 < 0x701d0) { if (((param_1 == 0x70084) || (param_1 == 0x70088)) || (param_1 == 0x7019c)) goto LAB_0006b70b; } else if ((long)param_1 < 0x701d8) { if ((param_1 == 0x701d0) || (param_1 == 0x701d4)) goto LAB_0006b70b; } else if ((param_1 == 0x701d8) || (param_1 == 0x701dc)) goto LAB_0006b70b; } else if ((long)param_1 < 0x7219c) { if ((long)param_1 < 0x711d4) { if ((long)param_1 < 0x71088) { if (((param_1 == 0x7069c) || (param_1 == 0x71080)) || (param_1 == 0x71084)) { LAB_0006b70b: _DAT_00193628 = _DAT_00193628 + 1; goto LAB_0006b712; } } else if (((param_1 == 0x71088) || (param_1 == 0x7119c)) || (param_1 == 0x711d0)) goto LAB_0006b70b; } else if ((long)param_1 < 0x7169c) { if (((param_1 == 0x711d4) || (param_1 == 0x711d8)) || (param_1 == 0x711dc)) goto LAB_0006b70b; } else if ((long)param_1 < 0x72084) { if ((param_1 == 0x7169c) || (param_1 == 0x72080)) goto LAB_0006b70b; } else if ((param_1 == 0x72084) || (param_1 == 0x72088)) goto LAB_0006b70b; } else if ((long)param_1 < 0xc5100) { if ((long)param_1 < 0x721d8) { if (((param_1 == 0x7219c) || (param_1 == 0x721d0)) || (param_1 == 0x721d4)) goto LAB_0006b70b; } else if (((param_1 == 0x721d8) || (param_1 == 0x721dc)) || (param_1 == 0x7269c)) goto LAB_0006b70b; } else if ((long)param_1 < 0xc510c) { if (((param_1 == 0xc5100) || (param_1 == 0xc5104)) || (param_1 == 0xc5108)) goto LAB_0006b70b; } else if ((long)param_1 < 0xc8258) { if ((param_1 == 0xc510c) || (param_1 == 0xc5110)) goto LAB_0006b70b; } else if ((param_1 == 0xc8258) || ((undefined *)param_1 == &DAT_00190010)) goto LAB_0006b70b; LAB_0006aed9: _DAT_00193950 = _DAT_00193950 + 1; cVar1 = _IntelLogEnabled(8,0xf); if (cVar1 != '\0') { _DAT_00193960 = _DAT_00193960 + 1; _IntelLog(8,0xf, "/Library/Caches/com.apple.xbs/Sources/GPUDriversIntel/GPUDriversIntel-16.0.32/IONDRV/ ICLLP/AppleIntelFramebuffer/AppleIntelController.cpp" ,0x595,"WriteRegister32","WR 0x%08X = 0x%08X\n",CONCAT44(uVar6,uVar3),param_2); } LAB_0006b712: _DAT_00193620 = _DAT_00193620 + 1; captureMMIO(this,uVar3,param_2); _DAT_00193558 = _DAT_00193558 + 1; *(uint *)(*(long *)&(this->m_AppleIntelBaseController).field_0x9b0 + param_1) = param_2; return; } the code register red/write in tgl is this functions dont have such validations and are maybe ment for DG1 only displays ? maybe this card work - Intel Corporation DG1 [Iris Xe Graphics] [8086:4908] - that's why they crash at bootdisplay setup ? so who as this kind of display and can figure it out ? i just left nblue with the minimun patches for it tobe tested (power and connectors) as for icl it currently works but with wrong sleep/wake code i horrribly only have my 9a68:8086 laptop jala, sorry man.. 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Mastachief Posted September 30 Share Posted September 30 (edited) 4906 doesnt exist? or may be a variation of one of these...https://dgpu-docs.intel.com/devices/hardware-table.html This is the Gen 12.1 Listing. --> https://www.techpowerup.com/gpu-specs/?mfgr=Intel&architecture=Generation 12.1&sort=generation Edited September 30 by Mastachief 1 Link to comment Share on other sites More sharing options...
naiclub Posted September 30 Share Posted September 30 Spoiler Is this graphics card compatible? Link to comment Share on other sites More sharing options...
Mastachief Posted September 30 Share Posted September 30 2 hours ago, naiclub said: Hide contents Is this graphics card compatible? No, Intel UHD Graphics 770 Never will work (4680). Intel UHD Graphics 770 is based on Intel's 12.2 Architecture instead of the DG1 12.1 architecture. Only Tigerlake, DG1, and Rocketlake has a chance by hacking the Iris XE driver for DG1 class cards to bypass compat checks. 1 Link to comment Share on other sites More sharing options...
naiclub Posted September 30 Share Posted September 30 2 hours ago, Mastachief said: No, Intel UHD Graphics 770 Never will work (4680). Intel UHD Graphics 770 is based on Intel's 12.2 Architecture instead of the DG1 12.1 architecture. Only Tigerlake, DG1, and Rocketlake has a chance by hacking the Iris XE driver for DG1 class cards to bypass compat checks. Is it possible to reverse engineer?🥲 Link to comment Share on other sites More sharing options...
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