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dgsga
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Hi @PMheart

Can you check _cpuid_set_info 10.15.2

Intel Core i9-9980XE Skylake X

FakeCPUID

0x050654

 

 

#1

Base: _cpuid_set_info
Comment: FakeCPUID - Model 0xE (0x5E, SKL), 10.15.2
Count: 1
Enabled: YES
Find: 89C1C0E9 04FEC1
Identifier: kernel
Limit: 0
Mask: (LEAVE THIS EMPTY)
MatchKernel: 
Replace: B90E0000 00880D
ReplaceMask: (LEAVE THIS EMPTY)
Skip: 0

#2

Base: _cpuid_set_info
Comment: FakeCPUID - Ext 0x5 (0x5E, SKL), 10.15.2
Count: 1
Enabled: YES
Find: 89C1C1E9 1089
Identifier: kernel
Limit: 0
Mask: (LEAVE THIS EMPTY)
MatchKernel: 
Replace: B9050000 0080
ReplaceMask: (LEAVE THIS EMPTY)
Skip: 0

Can you check for 10.15.2.

Thanks PMheart.

Edited by nmano
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Hi @nmano, could you please explain why do you use patches for XCPM support for Xeons in a separate topic? OpenCore should have these builtin as explained in https://github.com/acidanthera/bugtracker/issues/365. We got a question from a user who found this and got very confused as this is definitely not what we designed.

  • Cpuid1Data/Cpuid1Mask are a replacement for xcpm_bootstrap patch (and FakeCPUID), and they should really be <d4 06 03 00 (fake id)…> <ff ff ff ff… all zeroes> correspondingly.
  • AppleXcpmCfgLock and AppleXcpmExtraMsrs should cover all the other patches

Perhaps something went wrong? Could you please provide us with the details?

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@nmano why do you need of those Patches?

Your CPU inserted on an ASUS x299 Sage 10g does not need any pathcing for it..only msr unlock to enable in motherboard bios
gigabyte x299 should also be unlocked (x299 designare ex was)

 

 

 

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3 hours ago, vit9696 said:

Hi @nmano, could you please explain why do you use patches for XCPM support for Xeons in a separate topic? OpenCore should have these builtin as explained in https://github.com/acidanthera/bugtracker/issues/365. We got a question from a user who found this and got very confused as this is definitely not what we designed.

  • Cpuid1Data/Cpuid1Mask are a replacement for xcpm_bootstrap patch (and FakeCPUID), and they should really be <d4 06 03 00 (fake id)…> <ff ff ff ff… all zeroes> correspondingly.
  • AppleXcpmCfgLock and AppleXcpmExtraMsrs should cover all the other patches

Perhaps something went wrong? Could you please provide us with the details?

Then it turns out cpu emulation is not working ?

2020-01-10 в 16.14.20.png

NO-Patch .png

+Patch-xcpm_bootstrap .png

Архив.zip

Edited by pitrysha
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8 hours ago, vit9696 said:

Hi @nmano, could you please explain why do you use patches for XCPM support for Xeons in a separate topic? OpenCore should have these builtin as explained in https://github.com/acidanthera/bugtracker/issues/365. We got a question from a user who found this and got very confused as this is definitely not what we designed.

  • Cpuid1Data/Cpuid1Mask are a replacement for xcpm_bootstrap patch (and FakeCPUID), and they should really be <d4 06 03 00 (fake id)…> <ff ff ff ff… all zeroes> correspondingly.
  • AppleXcpmCfgLock and AppleXcpmExtraMsrs should cover all the other patches

Perhaps something went wrong? Could you please provide us with the details?

Thanks @vit9696

Cpuid1Data-> 54060500 00000000 00000000 00000000

Cpuid1Mask->D4060300 00000000 00000000 00000000

Still I have to fix

ProcessorType not work properly.

If I run Geekbench 5 restart my system before report.

This topic for X99 XCPM patches get CPU p-States and CPU C3-Cores.

 

 

681793834_ScreenShot2020-01-10at1_12_36PM.png.3591bfdfb4d35aaecae686c26cbb6d15.png

 

imageproxy.php?img=&key=c17464ef1b1b51c71711755598_ScreenShot2020-01-10at1_17_34PM.thumb.png.c27b5f0b3f0ebdd253d4487a9f9a3da8.png

Edited by nmano
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@pitrysha, thanks for the test, this makes good sense to me.

 

@nmano, you do not understand what Cpuid1Data and Cpuid1Mask are, your values are garbage. See what @pitrysha did.

Cpuid1Data D4060300 00000000 00000000 00000000

Cpuid1Mask FFFFFFFF 00000000 00000000 00000000

 

As for ProcessorType, you set 0xF01, but it is only compatible with 8, 10, 14, or 18 cores.

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Attached are some bootlogs achieved with opencore 0.53 debug version

I have used two different rigs (AMD rigs) thanks to @iCanaro of macos86.it for his working 3950x system

3950x is working

3970x is not working
I would like to understand if also for opencore devs these logs seem similar as it seems to me..so problem is not related with bootloader itself but maybe some missing patches

 

Inside also a clover debug log

 

Thank you for your time and skills!

debug_OC 3950x_3970x_clover 3970x.zip

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@fabiosun, from the logs it looks like boot failed at boot.efi stage. Most likely due to memory allocation failure. Unfortunately we do not know any resolution at the moment and we also have no plans to perform any investigation as AMD is not a priority for us for the time being.

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1 hour ago, vit9696 said:

@pitrysha, thanks for the test, this makes good sense to me.

 

@nmano, you do not understand what Cpuid1Data and Cpuid1Mask are, your values are garbage. See what @pitrysha did.

Cpuid1Data D4060300 00000000 00000000 00000000

Cpuid1Mask FFFFFFFF 00000000 00000000 00000000

 

As for ProcessorType, you set 0xF01, but it is only compatible with 8, 10, 14, or 18 cores.

C3060300 for Haswell
D4060300 for Broadwell
Found on the Internet

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1 hour ago, fabiosun said:

@pitrysha

@nmano cpu is not of a type you say above and it is working without faking a bad  cpu type

 

If  do not enable the CPU Emulate or Patch _xcpm_bootstrap © Pike R. Alpha, the system will not boot. Сan enable PMDrvr.text instead. How right?

Архив.zip

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3 hours ago, vit9696 said:

@pitrysha, thanks for the test, this makes good sense to me.

 

@nmano, you do not understand what Cpuid1Data and Cpuid1Mask are, your values are garbage. See what @pitrysha did.

Cpuid1Data D4060300 00000000 00000000 00000000

Cpuid1Mask FFFFFFFF 00000000 00000000 00000000

 

As for ProcessorType, you set 0xF01, but it is only compatible with 8, 10, 14, or 18 cores.

I try Like this still CPU Type not work.

Geekbench 5 - worked now

Cpuid1Data  D4060300 00000000 00000000 00000000  

Cpuid1Mask  FFFFFFFF 00000000 00000000 00000000 

1495265211_ScreenShot2020-01-10at5_45_10PM.thumb.png.13331b08e118b48574fef42b83ca8284.png

 

933914941_ScreenShot2020-01-10at5_13_18PM.thumb.png.f04f0266f493350f34a3781dba1bc236.png

 

1937333053_ScreenShot2020-01-10at5_14_20PM.thumb.png.c357bfeec12137920f1be167e75c2773.png

 

Edited by nmano
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Anyone have an idea why my OC stalls out when I connect a second bootable SATA SSD to the motherboard? Used with just one SATA drive, I can boot perfectly into Mojave in about 13 seconds and everything work perfectly. If I connect a second SSD with Windows or another MacOS install, OC takes over 4 minutes to reach the picker menu. I also can't boot up Windows if I try. If I use a Clover USB stick, I can see and boot from both drives fast and without issue.

 

Here is my EFI folder

Here is a log of a fast, single drive boot.

Here is a log of a stalled, dual drive boot.

 

I added the photo of my monitor because there is more info displayed at the point it gets stuck than what's written to the log. How could I get the log to write even more? I have debug target set to <75>

 

This EFI and config were made following the Vanilla Desktop Guide to the best of my abilities. I also tried this without the UsbKbDxe.efi and I tried swapping the VBoxHfs.efi for HFSPlus.efi with no change.

Thank you for any insight!

OC Driver ApfsDriverLoader.efi.JPG

Edited by hoffsta
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12 hours ago, pitrysha said:

If  do not enable the CPU Emulate or Patch _xcpm_bootstrap © Pike R. Alpha, the system will not boot. Сan enable PMDrvr.text instead. How right?

Архив.zip

pictures you attached is a normal beahviour for your Haswell EP CPU (v3 xeon)
you can use  kext or normal patching with the help of bootloader you want to use as suggested in previous message

V4 xeon are Broadwell EP and can work well the same using proper Patches and fakecpuid or using automatic bootloader way to patch it

Higher and modern cpu as 7980xe or 9980 xe are different and they could need only an unlocked CFG lock parameter in motherboard bios to work
I think @nmano cpu problem with geekbench is a different problem, maybe with some failure in components of his rig

 

Edited by Guest
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Skylake X->Skylake U 0x0406E3
Cpuid1Data   <->  E3060400 00000000 00000000 00000000 
Cpuid1Mask  <->   FFFFFFFF 00000000 00000000 00000000 
Haswell-E->Haswell 0x0306C3
Cpuid1Data   <->  C3060300 00000000 00000000 00000000
Cpuid1Mask  <->   FFFFFFFF 00000000 00000000 00000000 
  
Broadwell-E->Broadwell 0x0306D4
Cpuid1Data   <-> D4060300 00000000 00000000 00000000
Cpuid1Mask  <->  FFFFFFFF 00000000 00000000 00000000

Thanks Team.

Edited by nmano
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32 minutes ago, nmano said:


 

Haswell-E->Haswell 0x0306C3
Cpuid1Data   <->  C3060300 00000000 00000000 00000000
Cpuid1Mask  <->   FFFFFFFF 00000000 00000000 00000000 
  
Broadwell-E->Broadwell 0x0306D4
Cpuid1Data   <-> D4060300 00000000 00000000 00000000
Cpuid1Mask  <->  FFFFFFFF 00000000 00000000 00000000

Thanks Team.

For your x299 processor, see the information here.

https://pikeralpha.wordpress.com/2017/08/18/xeon-microcode-found-in-imac-pro-firmware/

Cpuid1Data   <->  E3060500 00000000 00000000 00000000
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I test with clover its worked open core not yet.

CPU ->Type 0x0F01

Cpu-type 010f

88107496_ScreenShot2020-01-11at7_33_57AM.thumb.png.cc062fbb3e77b93304cc1bdb13ce9561.png

 

I have 8 Memory Slots but I can see 4 Slots

PlatformFeature  0x20

 

1394364877_ScreenShot2020-01-11at8_14_18AM.thumb.png.bed0ba4af039eff55e2accb8d425e535.png

Edited by nmano
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Hi, i recently moved to opencore but I have been having some weird crashes. It happens randomly at any time without any warning or error messages after hard reboot. I managed to grab a picture when it happened: 

 

 

IMG_20200111_122355.jpg

 

Everything works on my machine, don't know if it's nvram related or some missing configuration.

 

System specs:

MB: MSI B250I Gaming Pro AC

CPU: i7 7700

GPU: HD630

RAM: 16GB DDR4 2400

NVME: Samsung 970 Pro 1TB

WIFI: TP Link AC1300 Archer T6E

BT: Asus BT400 USB

 

EFI.zip

Edited by rottenpants
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14 hours ago, rottenpants said:

Hi, i recently moved to opencore but I have been having some weird crashes. It happens randomly at any time without any warning or error messages after hard reboot. I managed to grab a picture when it happened: 

 

 

IMG_20200111_122355.jpg

 

Everything works on my machine, don't know if it's nvram related or some missing configuration.

 

System specs:

MB: MSI B250I Gaming Pro AC

CPU: i7 7700

GPU: HD630

RAM: 16GB DDR4 2400

NVME: Samsung 970 Pro 1TB

WIFI: TP Link AC1300 Archer T6E

BT: Asus BT400 USB

 

EFI.zip

 

get an AMD GPU (RX 560/570/580 or Vega 56/64), disable the damn HD630, then use MacPro7,1 SMBIOS

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Thank you OpenCore Developers for implementing the latest XCPM patch.

I would like to give some context here for other users, still working on the X99 platform.

 

With the new  

AppleXcpmForceBoost

you dont need the performance patches anymore, that were needed to get a decent system running. So with the other XCPM patches, no kernel patches are required anymore... everything is covered by the XCPM Quirks.

This might be useful in the documentation as well.

So basically I can get rid of the following patch I have used so far (and that patch also needed constant updates):

 

Comment    String  <-> XCPM Performance fix by @PMheart 
Disabled   Boolean <-> No
Find       Data<-> C1E30848 63D389D0 48C1EA20 
MatchOS    String <-> 10.14.x,10.15.x
Replace    Data<->C1E308B8 00FF0000 31D29090 

 

it seems now that the only kext-patch in the Kernel section for X99 boards is the IOPCIFamily one, without it the system will not boot due to kernel panic.

Comment         String  <-> 5960XPatch 10.14 by PMHeart
Disabled        Boolean <-> No
Find            Data<-> 483D0000 0040
InfoPlistPatch  Boolean <-> No
MatchOS         String <-> 10.14.x,10.15.x
Name            String<-> IOPCIFamily
Replace         Data<-> 483D0000 0080

Would it make sense to implement this as a Quirk as well?

 

Mike

 

Edit:

After some more testing, AppleXcpmForceBoost is not needed. The other XCPM Quirks do the job perfectly.

My conclusion is that AppleXcpmForceBoost is not needed for X99 systems most likely, in my case even caused problems around sleep.

 

Thanks, Mike

 

Edited by Mike Ranger
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What would be the appropriate way to disable Discrete GPU on my laptop with _OSI Darwin, current SSDT:

DefinitionBlock("", "SSDT", 2, "V330", "_DDGPU", 0)
{
    External (_SB_.PCI0.RP01.PEGP.HGOF, MethodObj)
    Device(RMD1)
    {
        Name(_HID, "RMD10000")
        Method(_INI)
        {
            If (CondRefOf (\_SB.PCI0.RP01.PEGP.HGOF))
            {
                \_SB.PCI0.RP01.PEGP.HGOF (Zero)
            }
        }
    }
}

Also the SSDT to combine Dual Batteries would be appreciated as well:

// Lenovo V330-15IKB Dual Battery Support SSDT with Hotswap capability
// Note: you must enable config.plist /ACPI/DSDT/Patches related to BAT0 & BAT1 to have working dual battery

DefinitionBlock ("", "SSDT", 2, "V330", "_BATC", 0)
{
    External(_SB.PCI0.LPCB.EC0, DeviceObj)
    Scope(_SB.PCI0.LPCB.EC0)
    {
        External(BAT0, DeviceObj)
        External(BAT0._HID, IntObj)
        External(BAT0._STA, MethodObj)
        External(BAT0._BIF, MethodObj)
        External(BAT0._BST, MethodObj)
        External(BAT1, DeviceObj)
        External(BAT1._HID, IntObj)
        External(BAT1._STA, MethodObj)
        External(BAT1._BIF, MethodObj)
        External(BAT1._BST, MethodObj)
        
        Device(BATC)
        {
            Name(_HID, EisaId ("PNP0C0A"))
            Name(_UID, 0x02)

            Method(_INI)
            {
                // disable original battery objects by setting invalid _HID
                ^^BAT0._HID = 0
                ^^BAT1._HID = 0
            }

            Method(CVWA, 3)
            // Convert mW to mA (or mWh to mAh)
            // Arg0 is mW or mWh (or mA/mAh in the case Arg2==0)
            // Arg1 is mV (usually design voltage)
            // Arg2 is whether conversion is needed (non-zero for convert)
            // return is mA or mAh
            {
                If (Arg2)
                {
                    Arg0 = (Arg0 * 1000) / Arg1
                }
                Return(Arg0)
            }

            Method(_STA)
            {
                // call original _STA for BAT0 and BAT1
                // result is bitwise OR between them
                Return(^^BAT0._STA() | ^^BAT1._STA())
            }

            Name(B0CO, 0x00) // BAT0 0/1 needs conversion to mAh
            Name(B1CO, 0x00) // BAT1 0/1 needs conversion to mAh
            Name(B0DV, 0x00) // BAT0 design voltage
            Name(B1DV, 0x00) // BAT1 design voltage

            Method(_BST)
            {
                // Local0 BAT0._BST
                // Local1 BAT1._BST
                // Local2 BAT0._STA
                // Local3 BAT1._STA
                // Local4/Local5 scratch

                // gather battery data from BAT0
                Local0 = ^^BAT0._BST()
                Local2 = ^^BAT0._STA()
                If (0x1f == Local2)
                {
                    // check for invalid remaining capacity
                    Local4 = DerefOf(Local0[2])
                    If (!Local4 || Ones == Local4) { Local2 = 0; }
                }
                // gather battery data from BAT1
                Local1 = ^^BAT1._BST()
                Local3 = ^^BAT1._STA()
                If (0x1f == Local3)
                {
                    // check for invalid remaining capacity
                    Local4 = DerefOf(Local1[2])
                    If (!Local4 || Ones == Local4) { Local3 = 0; }
                }
                // find primary and secondary battery
                If (0x1f != Local2 && 0x1f == Local3)
                {
                    // make primary use BAT1 data
                    Local0 = Local1 // BAT1._BST result
                    Local2 = Local3 // BAT1._STA result
                    Local3 = 0  // no secondary battery
                }
                // combine batteries into Local0 result if possible
                If (0x1f == Local2 && 0x1f == Local3)
                {
                    // _BST 0 - Battery State - if one battery is charging, then charging, else discharging
                    Local4 = DerefOf(Local0[0])
                    Local5 = DerefOf(Local1[0])
                    If (Local4 == 2 || Local5 == 2)
                    {
                        // 2 = charging
                        Local0[0] = 2
                    }
                    ElseIf (Local4 == 1 || Local5 == 1)
                    {
                        // 1 = discharging
                        Local0[0] = 1
                    }
                    ElseIf (Local4 == 5 || Local5 == 5)
                    {
                        // critical and discharging
                        Local0[0] = 5
                    }
                    ElseIf (Local4 == 4 || Local5 == 4)
                    {
                        // critical
                        Local0[0] = 4
                    }
                    // if none of the above, just leave as BAT0 is

                    // Note: Following code depends on _BIF being called before _BST to set B0CO and B1CO

                    // _BST 1 - Battery Present Rate - Add BAT0 and BAT1 values
                    Local0[1] = CVWA(DerefOf(Local0[1]), B0DV, B0CO) + CVWA(DerefOf(Local1[1]), B1DV, B1CO)
                    // _BST 2 - Battery Remaining Capacity - Add BAT0 and BAT1 values
                    Local0[2] = CVWA(DerefOf(Local0[2]), B0DV, B0CO) + CVWA(DerefOf(Local1[2]), B1DV, B1CO)
                    // _BST 3 - Battery Present Voltage - Average BAT0 and BAT1 values
                    Local0[3] = (DerefOf(Local0[3]) + DerefOf(Local1[3])) / 2
                }
                Return(Local0)
            } // _BST

            Method(_BIF)
            {
                // Local0 BAT0._BIF
                // Local1 BAT1._BIF
                // Local2 BAT0._STA
                // Local3 BAT1._STA
                // Local4/Local5 scratch

                // gather and validate data from BAT0
                Local0 = ^^BAT0._BIF()
                Local2 = ^^BAT0._STA()
                If (0x1f == Local2)
                {
                    // check for invalid design capacity
                    Local4 = DerefOf(Local0[1])
                    If (!Local4 || Ones == Local4) { Local2 = 0; }
                    // check for invalid max capacity
                    Local4 = DerefOf(Local0[2])
                    If (!Local4 || Ones == Local4) { Local2 = 0; }
                    // check for invalid design voltage
                    Local4 = DerefOf(Local0[4])
                    If (!Local4 || Ones == Local4) { Local2 = 0; }
                }
                // gather and validate data from BAT1
                Local1 = ^^BAT1._BIF()
                Local3 = ^^BAT1._STA()
                If (0x1f == Local3)
                {
                    // check for invalid design capacity
                    Local4 = DerefOf(Local1[1])
                    If (!Local4 || Ones == Local4) { Local3 = 0; }
                    // check for invalid max capacity
                    Local4 = DerefOf(Local1[2])
                    If (!Local4 || Ones == Local4) { Local3 = 0; }
                    // check for invalid design voltage
                    Local4 = DerefOf(Local1[4])
                    If (!Local4 || Ones == Local4) { Local3 = 0; }
                }
                // find primary and secondary battery
                If (0x1f != Local2 && 0x1f == Local3)
                {
                    // make primary use BAT1 data
                    Local0 = Local1 // BAT1._BIF result
                    Local2 = Local3 // BAT1._STA result
                    Local3 = 0  // no secondary battery
                }
                // combine batteries into Local0 result if possible
                If (0x1f == Local2 && 0x1f == Local3)
                {
                    // _BIF 0 - Power Unit - 0 = mWh | 1 = mAh
                    // set B0CO/B1CO if convertion to amps needed
                    B0CO = !DerefOf(Local0[0])
                    B1CO = !DerefOf(Local1[0])
                    // set _BIF[0] = 1 => mAh
                    Local0[0] = 1
                    // _BIF 4 - Design Voltage - store value for each Battery in mV
                    B0DV = DerefOf(Local0[4]) // cache BAT0 voltage
                    B1DV = DerefOf(Local1[4]) // cache BAT1 voltage
                    // _BIF 1 - Design Capacity - add BAT0 and BAT1 values
                    Local0[1] = CVWA(DerefOf(Local0[1]), B0DV, B0CO) + CVWA(DerefOf(Local1[1]), B1DV, B1CO)
                    // _BIF 2 - Last Full Charge Capacity - add BAT0 and BAT1 values
                    Local0[2] = CVWA(DerefOf(Local0[2]), B0DV, B0CO) + CVWA(DerefOf(Local1[2]), B1DV, B1CO)
                    // _BIF 3 - Battery Technology - leave BAT0 value
                    // _BIF 4 - Design Voltage - average BAT0 and BAT1 values
                    Local0[4] = (B0DV + B1DV) / 2
                    // _BIF 5 - Design Capacity Warning - add BAT0 and BAT1 values
                    Local0[5] = CVWA(DerefOf(Local0[5]), B0DV, B0CO) + CVWA(DerefOf(Local1[5]), B1DV, B1CO)
                    // _BIF 6 - Design Capacity of Low - add BAT0 and BAT1 values
                    Local0[6] = CVWA(DerefOf(Local0[6]), B0DV, B0CO) + CVWA(DerefOf(Local1[6]), B1DV, B1CO)
                    // _BIF 7+ - Leave BAT0 values for now
                }
                Return(Local0)
            } // _BIF
        } // BATC
    }
}

Thanks !

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13 hours ago, justin said:

 

get an AMD GPU (RX 560/570/580 or Vega 56/64), disable the damn HD630, then use MacPro7,1 SMBIOS

 

Yeah i was thinking about that yesterday. I dont know if i should get a vega 64 card or a newer 5700 navi card.

 

Do you think that the hd630 is causing the issue?

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