USB Port map confusion

[mengshi]

I am running a Haswell i5 on a series 9 motherboard (H97 and Z97) using Mac Pro 7,1 SMBIOS in order to get my RX580 working in accelerated mode. Using opencore 0.6.9. Already upgraded to Big Sur 11.4.

 

I am trying to use corpnewt's USBMap to do a remap.

 

A bit of confusion here.... Dortania states:

 

1. SMBIOSes that do not need the ACPI renames:

• iMac18,x and newer
• MacPro7,1 and newer
• Macmini8,1 and newer
• MacBook9,x and newer
• MacBookAir8,x and newer
• MacBookPro13,x and newer

 

2. EHC1 to EH01: Needed for Broadwell and older SMBIOS. EHC2 to EH02: Needed for Broadwell and older SMBIOS

 

So questions:

 

1. Should I do the above rename in opencore?

 

2. Should I tick xhciportlimit=true for the remap and then to false after the remap?

 

3. Should I also use FakePCIID_XHCIMux because it can routing USB 2.0 to the EHCI controllers? (and because it is a haswell/series 9 combo)

 

 

[Guest 5T33Z0]

You shoud use the Terminal to find out if you need any at all:

ioreg -l -p IOService -w0 | grep -i XHC1

Replace the red part with other terms. If there are matches for XHCI, EHC1, EHC2 you need renames before creating your own USBPort mappings.

[mengshi]

Ok Solved my problems. Mapped "near"perfectly using newtcorp's USBMAP script. It is not quite as automated as claimed. Needed to edit the plist to make the count correct. Mainly blank ports. It should have included a feature to delete unused ports. I did not exclude the empty ports properly.

 

For the series 9 chipset, I did rename EHC. I did set xhciportlimit=true

 

No matter what I do, I lose 2 physical USB 3.0 ports which become USB 2.0 ports. (It has to do with the chipset with EHC0 and EHC1 and XHCI. Unfortunately not a lot of info on how to solve this and it really doesn't affect me. )

 

So in case if anyone cannot get it correct, have a look at the plist inside USBMap.kext. Use propertree to delete etc.

Edited May 29, 2021 by mengshi

[mengshi]

Update - Perfection!

 

Researched further and found that for the 9 series of chipset, I needed FakePCIID_XHCIMux.kext and FakePCIID.kext.

 

My process to get perfection (on the Gigabyte H97-HD3 which has 4 physical USB 3.0 and 2 physical USB 2.0 at the rear, 2 USB 3.0 and 2 USB 2.0 at the front (from an onboard header)), Haswell CPU running as Mac Pro 7,1

 

1. Rename EHC1 to EH01; rename EHC2 to EH02, rename XHCI to XHC; rename XHC1 to XHC.

2. Initially untick XhciPortLimit

3. Remove USBInjectAll.kext

.

4. Reboot

.

5. Run corpnewt's USBMap script. This time all 6 SS ports show up numbered nicely 1-6, with USB 2.0 detected on EHC. Plug in a USB 3.0 to each port to register.

6. This time USBMap is correct. Just generate the kext and no need editing.

7. Pot the above USBMap.kext in the correct OC folder, re-tick XhciPortLimit and reboot.

 

 

PERFECTION!

Edited May 30, 2021 by mengshi

[vamose]

Unable to map the ports.

 

I have tried to run the command

ioreg -l -p IOService -w0 | grep -i XHC1

for all the ports as displayed when I have got the usbinjectall.kext and xhciportlimit=true 

I get all kind of messages, copy attached.

 

Upon using the corpnewt / USBMap to map the port and replace usbinjectall.kext with the new USBPorts.kext. There is no change I still get the error.

 

Have tried renaming, but no luck.  Renamed EHC1 to EH01, EHC2 to EH02 no change to XHC.

 

 

imac15,1

Opencore 0.6.9

 

outputEH01.txt outputEH02.txt outputXHC.txt

[mengshi]

On 5/30/2021 at 11:47 AM, mengshi said:

Update - Perfection!

 

Researched further and found that for the 9 series of chipset, I needed FakePCIID_XHCIMux.kext and FakePCIID.kext.

 

My process to get perfection (on the Gigabyte H97-HD3 which has 4 physical USB 3.0 and 2 physical USB 2.0 at the rear, 2 USB 3.0 and 2 USB 2.0 at the front (from an onboard header)), Haswell CPU running as Mac Pro 7,1

 

1. Rename EHC1 to EH01; rename EHC2 to EH02, rename XHCI to XHC; rename XHC1 to XHC.

2. Initially untick XhciPortLimit

3. Remove USBInjectAll.kext

.

4. Reboot

.

5. Run corpnewt's USBMap script. This time all 6 SS ports show up numbered nicely 1-6, with USB 2.0 detected on EHC. Plug in a USB 3.0 to each port to register.

6. This time USBMap is correct. Just generate the kext and no need editing.

7. Pot the above USBMap.kext in the correct OC folder, re-tick XhciPortLimit and reboot.

 

 

PERFECTION!

 

 

 

I have tried many methods. This is the only way IMHO. Consider this: There are 6 physical USB 3.0 ports (4 at the rear and 2 at the front of the casing via an onboard USB 3.0 header) and 2 x USB 2.0 ports at the rear and 2 at the front via an on board USB 2.0 header. The Wifi/BT card takes another USB 2.0 header.

 

The 6 physical USB 3.0 ports would have taken the count to 12 and there is NO WAY to fit 4 into 3! (Apart from the brilliant FakePCIID_XHCIMux.kext rerouting the USB 2 to EHCI01/02). That is the reason using any other methods commonly described will result in either 1 or 2 ports MIA.

 

(BTW, if hackintool is showing the above, can be SSDT/kext file generated be used instead of USBMap? - not worth crashing my system just to accomplish the same thing).

 

 

 

 

 

 

 

[Slice]

On 5/29/2021 at 7:13 AM, mengshi said:

 

 

A bit of confusion here.... Dortania states:

 

1. SMBIOSes that do not need the ACPI renames:

• iMac18,x and newer

 

I am sorry what is it about? What I need for my iMac17,1?

[mengshi]

11 hours ago, Slice said:

I am sorry what is it about? What I need for my iMac17,1?

 

 

 

USB port mapping..... You can get all your USB 2 and 3 ports working?

[Slice]

3 hours ago, mengshi said:

 

 

 

USB port mapping..... You can get all your USB 2 and 3 ports working?

I have all needed ports working using Legacy_USB3.kext.

[mengshi]

So just to confirm everything.... I am using Gigabyte Z97-HD3:

 

There are 4 physical USB 2.0 ports (2 built-in on the board; 2 on a front header) and 6 USB 3.0 ports (4 built-in at the back, 2 on a front header). 1 on-board USB 2.0 header used for the Wifi/BT card.

 

So in total I have 12 + 4 +1 ports and they're all working. 🙂 All at the correct speeds, so this is over the 15-ports limit.

 

So it is possible with the series 9 motherboard to go beyond the 15-port limit due to the quirkiness of the series 7/8/9 chipset in how it deals with EHC and XHC. This is achieved using the (FakePCIID_XHCIMux.kext -See RehabMan gitGub. I have FakePCIID.kext installed as well. I think they need to go together as the code mentions FakePCIID).

 

Mapping done using CorpNewt's USBMap.

 

I see this with Hackintool:

 

 

 

But on SystemReport, I see this:

 

 

 

So I see USB 3.0 devices reported by hackintool but no USB 2.0 devices (they're working) and on SystemReport, all are reported but USB 2.0 devices plugged into USB 3.0 ports are reported under the USB 2.0 HUB (that is FakePCIID_XHCIMux.kext doing its job). The above iPhone is plugged into the front USB 3.0 port. USB 3.0 into USB 3.0 ports are reported correctly.

 

My understanding is this will not work beyond the series 9 chipset so I am a few generations behind time. LOL. 

 

I am not sure about the long term use and it is probably irrelevant. There has no been any hangs etc. My USB DAC works well etc etc.

 

The "current' method simply cannot achieve the full usage of all the ports and a couple of ports have to be sacrificed (I see this is what some Z390 board users have to do and I get it).

 

 

 

Edited June 14, 2021 by mengshi

[mengshi]

Please note that FAKEPCIID.next and FAKEPCIID_XHCIMux.kext are not compatible with Monterrey. It loads ok etc but will reboot at certain stage (noted by system as a crash on next boot). (NB: The use of the above 2 files is documented by Elitemac86 forum guide for Z77 and Z97). 
 

Use CorpNewt’s USBMap but need to edit a bit the type of USB port afterwards. My main issue was USBMap not detecting the front case USB 3.0 (this comes from an onboard USB 3 header into 2 x USB 2.0 and 2 x USB 3.0 ports). This is solved by unplugging and replugging this connector! (Yeah…happened to come across a Reddit post for this!)

 

 

[jpz4085]

On 10/31/2021 at 7:50 PM, mengshi said:

Please note that FAKEPCIID.next and FAKEPCIID_XHCIMux.kext are not compatible with Monterrey.

Here's the current version recompiled for and working with Monterey if anyone needs it.

 

https://github.com/jpz4085/OS-X-Fake-PCI-ID/releases

[genzai]

On 9/5/2022 at 3:31 PM, jpz4085 said:

Here's the current version recompiled for and working with Monterey if anyone needs it.

 

https://github.com/jpz4085/OS-X-Fake-PCI-ID/releases

Fantastic! not sure you understand how much this saved me- nothing else was working for me on Haswell.

g\

[Grandy]

On 6/14/2021 at 3:10 PM, mengshi said:

So just to confirm everything.... I am using Gigabyte Z97-HD3:

 

There are 4 physical USB 2.0 ports (2 built-in on the board; 2 on a front header) and 6 USB 3.0 ports (4 built-in at the back, 2 on a front header). 1 on-board USB 2.0 header used for the Wifi/BT card.

 

So in total I have 12 + 4 +1 ports and they're all working. 🙂 All at the correct speeds, so this is over the 15-ports limit.

 

So it is possible with the series 9 motherboard to go beyond the 15-port limit due to the quirkiness of the series 7/8/9 chipset in how it deals with EHC and XHC. This is achieved using the (FakePCIID_XHCIMux.kext -See RehabMan gitGub. I have FakePCIID.kext installed as well. I think they need to go together as the code mentions FakePCIID).

 

Mapping done using CorpNewt's USBMap.

 

I see this with Hackintool:

 

 

 

But on SystemReport, I see this:

 

 

 

So I see USB 3.0 devices reported by hackintool but no USB 2.0 devices (they're working) and on SystemReport, all are reported but USB 2.0 devices plugged into USB 3.0 ports are reported under the USB 2.0 HUB (that is FakePCIID_XHCIMux.kext doing its job). The above iPhone is plugged into the front USB 3.0 port. USB 3.0 into USB 3.0 ports are reported correctly.

 

My understanding is this will not work beyond the series 9 chipset so I am a few generations behind time. LOL. 

 

I am not sure about the long term use and it is probably irrelevant. There has no been any hangs etc. My USB DAC works well etc etc.

 

The "current' method simply cannot achieve the full usage of all the ports and a couple of ports have to be sacrificed (I see this is what some Z390 board users have to do and I get it).

 

 

 

hey buddy, i have the same mobo. could you attach your patches for this usb fix? thanks