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[SUCCESS] HUANANZHI X79-ZD3 + Xeon E5-2689 [Mojave 10.14.6] [Big Sur 11.2.3] [Monterey 12.0.1] [Sonoma beta 7] [Sequoia 15.0]


verdazil
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I have a different CPU, i.e. the 2670 and I had some Kernel Panics where a CPU thread crash was reported. I found a SSDT from Rampagedev and ditched the DSDT in favor of mine and no issues so far, so it may be slight differences that can make a difference. Anyway I couldn't"t get LAN to get button true before, which is required to use Face Time and iMessage and Handoff properly, now everything works as expected.
 

There were also no syntax errors in the DSDT generated from Origin

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  • 7 months later...
On 3/5/2021 at 4:47 AM, Courage2000 said:

Questions:

 

1. Can I use your DSDT.aml or do I need to generate a new one?

2. is this the motherboard?

 

Hi, Courage2000.

 

Unfortunately, you can not use my DSDT.aml. The probability that the system will start is small. Even if it starts, it will not be the correct operation of the macOS.

If you want to use this hardware for macOS, you must go a long and difficult way to make your own DSDT.aml and config.plist settings.

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  • 2 weeks later...

I have successfully installed macOS Big Sur 11.2.3 on this PC (see the first post in the thread)

Any of the MacPro6,1 or MacPro7,1 SMBIOS can be used. Both alternatives work equally stable. System performance and power consumption is similar to Mojave. All devices and technologies are working fine.

 

In addition to the Open Core v 0.6.7 recommended settings for this platform (Chinese motherboards X79 + Sandy Bridge-E CPU), see https://dortania.github.io/OpenCore-Install-Guide/config-HEDT/ivy-bridge-e.html#sandy-and-ivy-bridge-e , you need to use the following:

 

1. New set of patches for proper functioning CPU Speed Step and Turbo Boost on Big Sur:  https://www.insanelymac.com/forum/topic/346988-sandy-bridge-e-power-management-big-sur-1121

 

2. When you update SMBIOS from MacPro6,1 to MacPro7,1 you additionally need

- update USBPorts.kext (If you use this method of USB settings)

- fix MacPro7,1 Memory Errors, see https://dortania.github.io/OpenCore-Post-Install/universal/memory.html#fixing-macpro7-1-memory-errors

- use ProcessorType = 3842 in config.plist

 

 

Edited by verdazil
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  • 8 months later...

Some information about working in Monterey 12.0.1

I have performed a successful clean install of Monterey 12.0.1 on this hardware (HUANANZHI X79-ZD3 + Xeon E5-2689). Let me give you some details.

- OS bootloader used: OpenCore v. 0.7.5

- OpenCore settings: almost identical to the settings for Big Sur v. 11.6.1

- Both MacPro6,1 and MacPro7,1 mac-model can be used

- Due to the restrictions imposed by the CpuTscSync.kext (CPUs without MSR_IA32_TSC_ADJUST (03Bh) are currently unsupported on macOS 12 and newer) only one CPU core works. This is achieved by using cpus=1 boot-arg in OpenCore.

- All hardware and technologies are working, including CPU Power Management (as far as possible for one single working CPU core)

 

If users are interested, I will make detailed instructions for installing and configuring macOS Monterey - as soon as the developers provide support for CPUs without MSR_IA32_TSC_ADJUST in CpuTscSync.kext (see https://github.com/acidanthera/CpuTscSync)

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8 hours ago, verdazil said:

- Due to the restrictions imposed by the CpuTscSync.kext (CPUs without MSR_IA32_TSC_ADJUST (03Bh) are currently unsupported on macOS 12 and newer) only one CPU core works. This is achieved by using cpus=1 boot-arg in OpenCore.

Thanks for this technical information!

With the harsh restriction to ONE core, what's the point upgrading to Monterey?

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1 hour ago, etorix said:

With the harsh restriction to ONE core, what's the point upgrading to Monterey?

There is no practical point upgrading to Monterey until there is support for all core synchronization. This is technical information only. I'm waiting for the CpuTscSync.kext update.

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Update: macOS Monterey settings for installation and work

 

This is not intended to be a complete and comprehensive installation guide. There are many installation guides on the forum and installing macOS is no different from installing on other desktop builds. Rather, this is supplemental information specific to my hardware listed below. I hope you find this information useful and this will save you a little time.
 
Hardware
MB: Huananzhi X79-ZD3
CPU: Intel® Xeon E5-2689, 1.2-3.6 GHz
Chipset: Sandy Bridge-E Q65 (C600/C200)
Memory: Samsung 4x8 Gb ECC/REG DDR3, 1866 MHz
Video: Sapphire Pulse Radeon RX 570 (4 Gb)
Monitor: BENQ-BL2711U + LG TV 42LF650V
SSD: 2.5" SATA SSD 250 Gb Samsung 850 EVO
HDD: HDD Seagate 2 Tb
WiFi: Broadcom BCM4322 802.11a/b/g/n Wireless LAN Controller
MacOS version tested: Monterey 12.0.1 (21A559) 

 

What works?
- Video: 4K x 60Hz on BENQ-BL2711U + Full HD x 60Hz on LG TV 42LF650V
- Audio: audio jack + HDMI audio on both monitors
- USB2 && USB3 ports
- LAN
- CPU Power Management (Turbo Boost + SpeedStep)
 
What does not work?
- Wi-Fi && Bluetooth: need replacement for native or compatible hardware 
- Sleep mode: not tested / I don't need
 
Huananzhi X79-ZD3 full BIOS settings for macOS:

Spoiler

BIOS version: 4.6.5.4 - 04/24/2018

 

Menu Advanced

 

PCI Subsystem Settings

 

PCI 64bit Resources Handling

Above 4G Decoding [Enabled]

 

PCI Common Settings

PCI Latency Timer [32 PCI Bus Clocks]

VGA Palette Snoop [Disabled]

PERR# Generation [Disabled]

SERR# Generation [Disabled]

 

PCI Express Settings

 

PCI Express Device Register Settings

Relaxed Ordering [Disabled]

Extended Tag [Disabled]

Maximum Payload [Auto]

Maximum Read Request [Auto]

 

PCI Express Link Register Settings

ASPM Support [Disabled]

Extended Synch [Disabled]

Link Training Retry [5]

Link Training Timeout (uS) [100]

Unpopulated Links [Keep Link ON]

Restore PCIE Registers [Disabled]

 

PCI Express GEN 2 Settings

 

PCI Express GEN 2 Device Register Settings

Completion Timeout [Default]

ARI Forwarding [Disabled]

AtomicOp Requester Enable [Disabled]

AtomicOp Egress Blocking [Disabled]

IDO Request Enable [Disabled]

IDO Completion Enable [Disabled]

LTR Mechanism Enable [Disabled]

End-End LTP Prefix Blocking [Disabled]

 

PCI Express GEN 2 Link Register Settings

Target Link Speed [Auto]

Clock Power Management [Disabled]

Compliance SOS [Disabled]

Hardware Autonomous Width [Enabled]

Hardware Autonomous Speed [Enabled]

 

ACPI Settings

 

ACPI Settings

Enable ACPI Auto Configuration [Enabled]

 

CPU Configuration

 

CPU Configuration

 

Hyper-threading [Enabled]

Active Processor Cores [All]

Limit CPUID Maxim [Disabled]

Execute Disable Bit [Enabled]

Hardware prefetcher [Enabled]

Adjacent Cache Line Prefetch [Enabled]

DCU Streamer Prefetcher [Enabled]

DCU IP Prefetcher [Enabled]

Intel Virtualization Technology [Enabled]

 

CPU Power Management Configuration

 

CPU Power Management Configuration

Power Technology [Energy Efficient]

Energy Performance [Balanced Performance]

Long duration power limit 0

Long duration maintained 0

Short duration power limit 0

 

SATA Configuration

 

SATA Configuration

 

SATA Mode [AHCI Mode]

Aggressive Link Power Management [Enabled]

Port 0 Hot Plug [Disabled]

Port 1 Hot Plug [Disabled]

Port 2 Hot Plug [Disabled]

Port 3 Hot Plug [Disabled]

Port 4 Hot Plug [Disabled]

Port 5 Hot Plug [Disabled]

External SATA Port 0 [Disabled]

External SATA Port 1 [Disabled]

External SATA Port 2 [Disabled]

External SATA Port 3 [Disabled]

External SATA Port 4 [Disabled]

External SATA Port 5 [Disabled]

Staggred Spin-up [Disabled]

Staggred Spin-up [Disabled]

Staggred Spin-up [Disabled]

Staggred Spin-up [Disabled]

Staggred Spin-up [Disabled]

Staggred Spin-up [Disabled]

 

USB Configuration

 

USB Configuration

Legacy USB Support [Disabled]

XHCI Hand-off [Enabled]

EHCI Hand-off [Enabled]

USB Mass Storage Driver Support [Enabled]

 

USB hardware delays and time-outs:

USB transfer time-out [20 sec]

Device reset time-out [20 sec]

Device power-up delay [Auto]

 

Smart Fan Function

Smart Fan 1 Mode [Automatic Mode]

Smart Fan Temperature 1 15

Smart Fan Temperature 2 20

Smart Fan Temperature 3 25

Smart Fan Temperature 4 40

Smart Fan Critical Temperature 70

Smart Fan PWM 1 100

Smart Fan PWM 2 160

Smart Fan PWM 3 180

Smart Fan PWM 4 210

Fan work mode with critical [Full Mode]

Temperature Tolerance 3

 

NCT5532D Super IO Configuration

 

NCT5532D Super IO Configuration

Serial Port 0 Configuration

Serial Port [Disabled]

 

MISC Features

 

MISC Feature Settings

 

Onboard LAN [Auto]

Azalia HD Audio [Enabled]

Power Loss [Power Off]

 

Menu Chipset

 

North Bridge

IOH Cofiguration

 

Intel(R) VT for Directed I/O Configuration

Intel (R) VT-d [Enabled]

Coherency Support [Disabled]

ATS Support [Enabled]

 

Intel (R) I/OAT [Disabled]

DCA Support {Enabled]

VGA Priority [Offboard]

Gen3 Equalization WA’s [Enabled]

Gen3 Equalization Fail WA [Disabled]

Gen3 Equalization Phase 2/3 WA [Disabled]

Gen3 EqualizationRedoing WA [Disabled]

IOH Resource Selection Type [Auto]

No Snoop Optimization [VC1]

MMIOH Size [8G]

MMCFG BASE [0x80000000]

 

IOH 0 PCIe port Bifurcation Control

IOU1 – PCIe Port [x4x4]

PORT 1A Link Speed [GEN3]

PORT 1B Link Speed [GEN3]

IOU2 – PCIe Port [x16]

PORT 2A Link Speed [GEN3]

IOU3 – PCIe Port [x16]

PORT 3A Link Speed [GEN3]

 

IOH 0 PCIe port Data Direct I/O Control

PORT 0A [Disabled]

PORT 1A [Enabled]

PORT 1B [Enabled]

PORT 2A [Enabled]

PORT 3A [Enabled]

 

QPI Configuration

Isoc [Auto]

MesegEn [Auto]

QPI Link Speed Mode [Fast]

QPI Link Frequency Select [Auto]

QPI Link0s [Disabled]

QPI Link0p [Disabled]

QPI Link1 [Enabled]

Snoop Mode [Auto]

 

Compatibility RID [Enabled]

 

Memory Configuration

Memory Mode [Independent]

DRAM RAPL BWLIMIT [1]

Perform and DFX devices [HIDE]

DRAM RAPL MODE [DRAM RAPL MODE 1]

Enforce POR [Auto]

Pdg Length [Short]

DDR Speed [Force DDR3 1866]

Channel Interleaving [Auto]

Rank Interleaving [Auto]

Patrol Scrub [Enabled]

Demand Scrub [Enabled]

Data Scrambling [Enabled]

Device Tagging [Disabled]

Rank Margin [Disabled]

Thermal Throttling [CLTT]

OLTT Peak BW % [50]

Altitude [300 M]

Serial Message Debug Level [Minimum]

 

 

PCI Express Ports Configuration

 

PCI Express Port 1 [Auto]

PME SCI [Disabled]

PCI Express Port 2 [Auto]

PME SCI [Disabled]

Onboard LAN [Auto]

PME SCI [Disabled]

PCI Express Port 4 [Auto]

PME SCI [Disabled]

PCI Express Port 5 [Auto]

PME SCI [Disabled]

PCI Express Port 6 [Auto]

PME SCI [Disabled]

PCI Express Port 7 [Auto]

PME SCI [Disabled]

PCI Express Port 8 [Auto]

PME SCI [Disabled]

PCIe Sub Decode [Disabled]

DMI Vc1 Control [Disabled]

DMI Vcp Control [Enabled]

DMI Vcm Control {Enabled]

 

USB Configuration

 

Al USB Devices [Enabled]

EHCI Controller 1 [Enabled]

EHCI Controller 2 [Enabled]

USB Port 0 [Enabled]

USB Port 1 [Enabled]

USB Port 2 [Enabled]

USB Port 3 [Enabled]

USB Port 4 [Enabled]

USB Port 5 [Enabled]

USB Port 6 [Enabled]

USB Port 7 [Enabled]

USB Port 8 [Enabled]

USB Port 9 [Enabled]

USB Port 10 [Enabled]

USB Port 11 [Enabled]

USB Port 12 [Enabled]

USB Port 13 [Enabled]

 

South Bridge

 

SB Chipset Configuration

PCH Compatibility RID [Disabled]

SMBus Controller [Enabled]

SW SMI Timer [Auto]

GbE Controller [Enabled]

Wake on Lan from S5 [Enabled]

USB WakeOnDev insertion [Disabled]

Restore AC Power Loss [Power Off]

SLP_S4 Assertion Stretch Enable [Enabled]

SLP_S4 Assertion Width [4-5 Seconds]

Deep Sx [Disabled]

Onboard SATA RAID Oprom/Driver [Enabled]

 

Audio Configuration

Azalia HD Audio [Enabled]

Azalia internal HDMI codec [Disabled]

 

High Precision Event Timer Configuration

High Precision Timer [Enabled]

 

Menu Boot

 

Setup Promt Timeout 1

Bootup NumLock State [On]

Quiet Boot [Enabled]

Fast Boot [Disabled]

 

CSM16 Parameters

GateA20 Active [Upon Request]

Option ROM Messages [Force BIOS]

INT19 Trap Response [Immediate]

 

CSM Parameters

Launch CSM [Disabled]

Boot Option Filter [UEFI only]

Launch PXE OpROM policy [Do not launch]

Launch Storage OpROM policy [UEFI only]

Launch Video OpROM policy [UEFI only]

Other PCI device ROM priority [UEFI OpROM]

 
Here is what I used to install and configure the system:
OpenCore:   https://github.com/acidanthera/OpenCorePkg/releases
Audio: https://github.com/vit9696/AppleALC
Video: https://github.com/acidanthera/WhateverGreen/releases
USB Mapping: https://dortania.github.io/OpenCore-Post-Install/usb/manual/manual.html#usb-mapping-the-manual-way
LAN: http://www.insanelymac.com/forum/topic/287161-new-driver-for-realtek-rtl8111/
CPU Power management: https://www.insanelymac.com/forum/topic/324270-sandy-bridge-e-ivy-bridge-e-power-management-1013-appstore-release

 

OpenCore settings and details:

- OpenCore version: 0.7.5

- Mac model: MacPro6,1

- If you are using a different Chinese server motherboard than Huananzhi X79-ZD3 (or another BIOS version on Huananzhi X79-ZD3)  you will need to make your own DSDT.aml.

- Likewise, for a CPU other than Xeon E5-2689 you will need to make your own SSDT.aml for Power Management.

- To synchronize the CPU cores, you can use outdated VoodooTSCSync.kext

- For the correct work of the CPU Power Management 2 patches for AppleIntelCPUPowerManagement.kext are enough. (Kernel --> Patch)

- Instead of the standard OpenHfsPlus.efi driver you need use HfsPlusLegacy.efi from https://github.com/acidanthera/OcBinaryData set.

- For the correct work of the necessary USB ports you may need your own USBPorts.kext, made by any of the available methods.

- The AGPMInjector.kext kext is needed to improve GPU power management on the Sapphire Pulse Radeon RX 570 (4 Gb) video card. Use only if you have an identical graphics card.

- You can also use Mac model: MacPro7,1 - in this case, you need use OpenCore setting Platforminfo --> Generic --> ProcessorType = 3842 and USBPorts.kext suitable for Mac-model.

- CPU Power Management on the Mac-model MacPro7,1 works less optimal than on the Mac-model MacPro6,1.

- Don't use kexts SMCSuperIO.kext and SMCProcessor.kext. They cause kernel panic.

- Sure thing, you must use your own SystemSerialNumber && MLB && ROM && SmUUID in the config.plist file

 

How to use
To make a bootable flash drive (and system drive), you can use my EFI directory (link at the end of the message). Tested for Monterey 12.0.1 installation.

https://drive.google.com/file/d/1dbwsRIRi5Q6OWL3IWVRA4kfc2RNXzIzC/view?usp=sharing

Edited by verdazil
BIOS Settings update
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HUANANZHI X79-ZD3 + Xeon E5-2689 [Monterey 12.0.1] - Tests

 

Intel Power Gadget info

Spoiler

 

IPG.thumb.png.40fe8437e242d2a547070a37daa53a9c.png

 

 

AppleIntelInfo

Spoiler

AppleIntelInfo.kext v3.0 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.

 

Settings:

------------------------------------------

enableHWP............................... : 0

logMSRs................................. : 1

logIGPU................................. : 0

logIntelRegs............................ : 1

logCStates.............................. : 1

logIPGStyle............................. : 1

InitialTSC.............................. : 0x74402110b80 (307 MHz)

MWAIT C-States.......................... : 135456

 

Processor Brandstring................... :        Intel(R) Xeon(R) CPU E5-2689 0 @ 2.60GHz

 

Processor Signature..................... : 0x206D7

------------------------------------------

- Family............................... : 6

- Stepping............................. : 7

- Model................................ : 0x2D (45)

 

Model Specific Registers (MSRs)

------------------------------------------

 

MSR_IA32_PLATFORM_ID..............(0x17) : 0x0

------------------------------------------

- Processor Flags...................... : 0

 

MSR_CORE_THREAD_COUNT.............(0x35) : 0x80010

------------------------------------------

- Core Count........................... : 8

- Thread Count......................... : 16

 

MSR_PLATFORM_INFO.................(0xCE) : 0xC0064011A00

------------------------------------------

- Maximum Non-Turbo Ratio.............. : 0x1A (2600 MHz)

- Ratio Limit for Turbo Mode........... : 0 (not programmable)

- TDP Limit for Turbo Mode............. : 1 (programmable)

- Low Power Mode Support............... : 0 (LMP not supported)

- Number of ConfigTDP Levels........... : 0 (only base TDP level available)

- Maximum Efficiency Ratio............. : 12

 

MSR_PMG_CST_CONFIG_CONTROL........(0xE2) : 0x1E008403

------------------------------------------

- I/O MWAIT Redirection Enable......... : 1 (enabled, IO read of MSR(0xE4) mapped to MWAIT)

- CFG Lock............................. : 1 (MSR locked until next reset)

- C3 State Auto Demotion............... : 1 (enabled)

- C1 State Auto Demotion............... : 1 (enabled)

- C3 State Undemotion.................. : 1 (enabled)

- C1 State Undemotion.................. : 1 (enabled)

- Package C-State Auto Demotion........ : 0 (disabled/unsupported)

- Package C-State Undemotion........... : 0 (disabled/unsupported)

 

MSR_PMG_IO_CAPTURE_BASE...........(0xE4) : 0x10414

------------------------------------------

- LVL_2 Base Address................... : 0x414

- C-state Range........................ : 1 (C6 is the max C-State to include)

 

IA32_MPERF........................(0xE7) : 0x161E7022F7

IA32_APERF........................(0xE8) : 0x183FFD4665

 

MSR_FLEX_RATIO...................(0x194) : 0x0

------------------------------------------

 

MSR_IA32_PERF_STATUS.............(0x198) : 0x257800002200

------------------------------------------

- Current Performance State Value...... : 0x2200 (3400 MHz)

 

MSR_IA32_PERF_CONTROL............(0x199) : 0x2200

------------------------------------------

- Target performance State Value....... : 0x2200 (3400 MHz)

- Intel Dynamic Acceleration........... : 0 (IDA engaged)

 

IA32_CLOCK_MODULATION............(0x19A) : 0x0

 

IA32_THERM_INTERRUPT.............(0x19B) : 0x0

 

IA32_THERM_STATUS................(0x19C) : 0x88350000

------------------------------------------

- Thermal Status....................... : 0

- Thermal Log.......................... : 0

- PROCHOT # or FORCEPR# event.......... : 0

- PROCHOT # or FORCEPR# log............ : 0

- Critical Temperature Status.......... : 0

- Critical Temperature log............. : 0

- Thermal Threshold #1 Status.......... : 0

- Thermal Threshold #1 log............. : 0

- Thermal Threshold #2 Status.......... : 0

- Thermal Threshold #2 log............. : 0

- Power Limitation Status.............. : 0

- Power Limitation log................. : 0

- Current Limit Status................. : 0

- Current Limit log.................... : 0

- Cross Domain Limit Status............ : 0

- Cross Domain Limit log............... : 0

- Digital Readout...................... : 53

- Resolution in Degrees Celsius........ : 1

- Reading Valid........................ : 1 (valid)

 

MSR_THERM2_CTL...................(0x19D) : 0x0

 

IA32_MISC_ENABLES................(0x1A0) : 0x850089

------------------------------------------

- Fast-Strings......................... : 1 (enabled)

- FOPCODE compatibility mode Enable.... : 0

- Automatic Thermal Control Circuit.... : 1 (enabled)

- Split-lock Disable................... : 0

- Performance Monitoring............... : 1 (available)

- Bus Lock On Cache Line Splits Disable : 0

- Hardware prefetch Disable............ : 0

- Processor Event Based Sampling....... : 0 (PEBS supported)

- GV1/2 legacy Enable.................. : 0

- Enhanced Intel SpeedStep Technology.. : 1 (enabled)

- MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)

- Adjacent sector prefetch Disable..... : 0

- CFG Lock............................. : 0 (MSR not locked)

- xTPR Message Disable................. : 1 (disabled)

 

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x580A00

------------------------------------------

- Turbo Attenuation Units.............. : 0

- Temperature Target................... : 88

- TCC Activation Offset................ : 0

 

MSR_MISC_PWR_MGMT................(0x1AA) : 0x400000

------------------------------------------

- EIST Hardware Coordination........... : 0 (hardware coordination enabled)

- Energy/Performance Bias support...... : 1

- Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)

- Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

- SpeedShift Technology Enable......... : 0 (disabled)

- SpeedShift Interrupt Coordination.... : 0 (disabled)

- SpeedShift Energy Efficient Perf..... : 0 (disabled)

- SpeedShift Technology Setup for HWP.. : No (not setup for HWP)

 

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2121212122222424

------------------------------------------

- Maximum Ratio Limit for C01.......... : 24 (3600 MHz)

- Maximum Ratio Limit for C02.......... : 24 (3600 MHz)

- Maximum Ratio Limit for C03.......... : 22 (3400 MHz)

- Maximum Ratio Limit for C04.......... : 22 (3400 MHz)

- Maximum Ratio Limit for C05.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C06.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C07.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C08.......... : 21 (3300 MHz)

 

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x0

 

MSR_POWER_CTL....................(0x1FC) : 0x2504005B

------------------------------------------

- Bi-Directional Processor Hot......... : 1 (enabled)

- C1E Enable........................... : 1 (enabled)

 

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA1003

------------------------------------------

- Power Units.......................... : 3 (1/8 Watt)

- Energy Status Units.................. : 16 (15.3 micro-Joules)

- Time Units .......................... : 10 (976.6 micro-Seconds)

 

MSR_PKG_POWER_LIMIT..............(0x610) : 0x68450005A8398

------------------------------------------

- Package Power Limit #1............... : 115 Watt

- Enable Power Limit #1................ : 1 (enabled)

- Package Clamping Limitation #1....... : 0 (disabled)

- Time Window for Power Limit #1....... : 45 (40960 milli-Seconds)

- Package Power Limit #2............... : 138 Watt

- Enable Power Limit #2................ : 1 (enabled)

- Package Clamping Limitation #2....... : 0 (disabled)

- Time Window for Power Limit #2....... : 3 (20 milli-Seconds)

- Lock................................. : 0 (MSR not locked)

 

MSR_PKG_ENERGY_STATUS............(0x611) : 0xE4CB704

------------------------------------------

- Total Energy Consumed................ : 3660 Joules (Watt = Joules / seconds)

 

MSR_PP0_POWER_LIMIT..............(0x638) : 0x0

 

MSR_PP0_ENERGY_STATUS............(0x639) : 0x997313A

------------------------------------------

- Total Energy Consumed................ : 2455 Joules (Watt = Joules / seconds)

 

MSR_PP0_POWER_LIMIT..............(0x638) : 0x0

 

MSR_PP0_ENERGY_STATUS............(0x639) : 0x99738B5

------------------------------------------

- Total Energy Consumed................ : 2455 Joules (Watt = Joules / seconds)

 

MSR_PKGC3_IRTL...................(0x60a) : 0x0

MSR_PKGC6_IRTL...................(0x60b) : 0x0

MSR_PKGC7_IRTL...................(0x60c) : 0x0

MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x48B83B770

MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x181A5176

MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x48B83B770

MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x181A5176

MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x1004B2BF38

MSR_PKG_C7_RESIDENCY.............(0x3fa) : 0x0

 

IA32_TSC_DEADLINE................(0x6E0) : 0x74406B71FFB

PCH device.................: 0x1C4C8086

 

CPU Ratio Info:

------------------------------------------

Base Clock Frequency (BLCK)............. : 100 MHz

Maximum Efficiency Ratio/Frequency...... : 12 (1200 MHz)

Maximum non-Turbo Ratio/Frequency....... : 26 (2600 MHz)

Maximum Turbo Ratio/Frequency........... : 36 (3600 MHz)

P-State ratio * 100 = Frequency in MHz

------------------------------------------

CPU P-States [ (12) 28 33 ]

CPU C3-Cores [ 1 6 7 10 11 ]

CPU C6-Cores [ 1 4 5 6 7 14 ]

CPU C7-Cores [ 1 2 3 5 12 ]

CPU P-States [ (12) 27 28 33 ]

CPU C3-Cores [ 0 1 4 6 7 10 11 14 15 ]

CPU C6-Cores [ 0 1 4 5 6 7 14 15 ]

CPU C7-Cores [ 0 1 2 3 5 8 10 11 12 15 ]

CPU P-States [ (12) 27 28 31 33 ]

CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 10 11 14 15 ]

CPU C6-Cores [ 0 1 4 5 6 7 12 13 14 15 ]

CPU C7-Cores [ 0 1 2 3 5 6 7 8 10 11 12 14 15 ]

CPU P-States [ (12) 24 27 28 31 33 ]

CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 13 14 15 ]

CPU C6-Cores [ 0 1 3 4 5 6 7 9 12 13 14 15 ]

CPU C7-Cores [ 0 1 2 3 5 6 7 8 9 10 11 12 14 15 ]

CPU P-States [ (12) 23 24 27 28 31 33 ]

CPU C7-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 14 15 ]

CPU P-States [ (12) 23 24 25 27 28 31 33 ]

CPU C6-Cores [ 0 1 3 4 5 6 7 8 9 12 13 14 15 ]

CPU C7-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ]

CPU P-States [ (12) 23 24 25 26 27 28 31 33 ]

CPU P-States [ (12) 22 23 24 25 26 27 28 31 33 ]

CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ]

CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 12 13 14 15 ]

CPU P-States [ (12) 22 23 24 25 26 27 28 31 32 33 ]

CPU P-States [ (12) 22 23 24 25 26 27 28 29 31 32 33 ]

CPU P-States [ 12 21 22 23 24 25 26 27 28 29 31 32 33 (34) ]

CPU P-States [ (12) 17 21 22 23 24 25 26 27 28 29 31 32 33 34 ]

CPU P-States [ (12) 14 17 21 22 23 24 25 26 27 28 29 31 32 33 34 ]

CPU P-States [ (12) 14 15 17 21 22 23 24 25 26 27 28 29 31 32 33 34 ]

CPU P-States [ 12 14 15 17 21 22 23 24 25 26 27 28 29 31 32 33 34 (36) ]

CPU P-States [ (12) 14 15 17 20 21 22 23 24 25 26 27 28 29 31 32 33 34 36 ]

CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ]

CPU P-States [ (12) 14 15 17 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 ]

CPU P-States [ (12) 13 14 15 17 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 ]

 

Geekbench score test

https://browser.geekbench.com/v5/cpu/11548605

Spoiler

Geekbench Score

 

766

Single-Core Score

 

5801

Multi-Core Score

 

Geekbench 5.4.3 Tryout for macOS x86 (64-bit)

 

System Information

Operating System

         macOS 12.0.1 (Build 21A559)

Model

         MacPro6,1

Model ID.      

         MacPro6,1

Motherboard

         Acidanthera Mac-F60DEB81FF30ACF6    MacPro6,1

BIOS.  

         Acidanthera 429.40.7.0.1

 

Processor Information

Name

Intel(R) Xeon(R) CPU E5-2689 0 @ 2.60GHz

Topology

1 Processor, 8 Cores, 16 Threads

Identifier

GenuineIntel Family 6 Model 45 Stepping 7

Base Frequency

2.60 GHz

L1 Instruction Cache

32.0 KB x 8

L1 Data Cache

32.0 KB x 8

L2 Cache

256 KB x 8

L3 Cache

20.0 MB

 

Memory Information

Size

32.0 GB

Type

DDR3

Speed

1866 MT/s

 

Edited by verdazil
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  • 5 months later...

What if you have a 12 core E5-2697 v2 Ivy Bridge are all cores working with this processor, exactly the same processor that can be upgraded originally on the MacPro6,1.  I don't remember if I needed TSCsyc at all for the ivy bridge v2 on Catalina or not?  I think I did need this kext and now its not supported on Big Sur or Monterey.  I hope the developer has a look at it some day or someone else has a peak.

 

I don't think or know if the Ivy Bridge version is affected by this or only affected by the sandy bridge versions using "MSR_IA32_TSC_ADJUST (03Bh)", would you know the answer to this?

Edited by oSxFr33k
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3 hours ago, oSxFr33k said:

What if you have a 12 core E5-2697 v2 Ivy Bridge are all cores working with this processor, exactly the same processor that can be upgraded originally on the MacPro6,1.  I don't remember if I needed TSCsyc at all for the ivy bridge v2 on Catalina or not?  I think I did need this kext and now its not supported on Big Sur or Monterey.  I hope the developer has a look at it some day or someone else has a peak.

 

I don't think or know if the Ivy Bridge version is affected by this or only affected by the sandy bridge versions using "MSR_IA32_TSC_ADJUST (03Bh)", would you know the answer to this?

For non-native builds with multi-core server CPUs, you need to use a CpuTscSync.kext. However, CPUs without MSR_IA32_TSC_ADJUST (03Bh) are currently unsupported on macOS 12 and newer. You can check support for your processor in the MacCPUID app.

image.png

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So TSC_ADJUST is supported in this example but not with the address (03Bh) therefore the kext won’t help with multi-core?   If I were to see the address (03Bh) then I will have complete support for multi-core without kernel panic using the kext?

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9 hours ago, verdazil said:

For non-native builds with multi-core server CPUs, you need to use a CpuTscSync.kext. However, CPUs without MSR_IA32_TSC_ADJUST (03Bh) are currently unsupported on macOS 12 and newer. You can check support for your processor in the MacCPUID app.

 

image.png

Have you ever considered VoodooTSC.kext? It works other way and not require MSR 3Bh to present.

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@Slice, Yes, not only considered but used. Unfortunately, the synchronization of the cores only works in 25% of boot cases. This is unsatisfactory and we need a modern version of CpuTscSync.kext with MSR_IA32_TSC_ADJUST (03Bh) support on macOS 12.

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  • 4 weeks later...
On 5/23/2022 at 11:14 PM, verdazil said:

@Slice, Yes, not only considered but used. Unfortunately, the synchronization of the cores only works in 25% of boot cases. This is unsatisfactory and we need a modern version of CpuTscSync.kext with MSR_IA32_TSC_ADJUST (03Bh) support on macOS 12.

Hello @verdazil, I have tried to installed Monterey 12.4 but it wasn't successful. I used CpuTscSync.kext latest version (1.0.9). Is this kext with MSR_IA32_TSC_ADJUST is still support Monterey. My specs (Dell T7910 with dual Xeon E5-2699v4)  works well with Bigsur 11.6.7. Do you have any suggestion to install Monterey with my specs. Thank you!

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2 minutes ago, verdazil said:

@verdazil, thank you for your quick reply. Yes, I have read this post, but I have a problem with KP as you can see in attached photo. I tried many methods, but nothing successful. I can only boot with cpus=1 as you mentioned above.

IMG_2206.JPG

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@Zuja4701, you do not have synchronization of CPU cores at boot.

1. Make sure the CPU supports MSR_IA32_TSC_ADJUST register (as mentioned in my previous post).  If it does not support, then further does not make sense.

2. If yes, try to use VoodooTSCSync.kext instead of CpuTscSync.kext

3. Try use MacPro6,1 mac-model instead MacPro7,1

Edited by verdazil
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1 minute ago, verdazil said:

@Zuja4701, you do not have synchronization of CPU cores at boot.

1. Make sure the CPU supports MSR_IA32_TSC_ADJUST register (as mentioned in my previous post).  If it does not support, then further does not make sense.

2. If yes, try to use VoodooTSCSync.kext instead of CpuTscSync.kext

Thanks a lot for your hints. I will check the CPU supports MSR_IA32_TSC_ADJUST first.

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52 minutes ago, verdazil said:

@Zuja4701, you do not have synchronization of CPU cores at boot.

1. Make sure the CPU supports MSR_IA32_TSC_ADJUST register (as mentioned in my previous post).  If it does not support, then further does not make sense.

2. If yes, try to use VoodooTSCSync.kext instead of CpuTscSync.kext

Hello @verdazil, I found an interesting (attached photos) that someone has successfully installed Monterey with CPU Sandy-Bridge (Intel Xeon E5-2690) by using voodooTSCSync.kext. 

Screen Shot 2021-11-04 at 10.49.45 AM.png

CinebenchR23-Monterey_v12.png

EFI E52690.zip

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@Zuja4701, I also installed and can make such pictures. However, I have only 25% of boot attempts are successful.

I have doubts about the authenticity of this information. How can he boot a 12.4 system with such old versions of kexts and OpenCore? Does it succeed every time you turn PC on or reboot?

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  • 3 weeks later...

Hi to all!

Developers are in no hurry to add support of CPUs  without MSR_IA32_TSC_ADJUST registry for CpuTscSync.kext.

Found an alternative solution. You can use VoodooTSCSync.kext with additional OpenCore settings:

UEFI ---> Quirks ---> TscSyncTimeout = 525000

The value 525000 is determined experimentally. It may need to be different for your hardware.

I don't know the algorithm how to choose this value correctly. However, with value 525000, my system always boots, 100% guaranteed. I now have a fully functional Monterey 12.4.

VoodooTSCSync.kext.zip

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  • 4 weeks later...
On 7/5/2022 at 2:02 PM, verdazil said:

Hi to all!

Developers are in no hurry to add support of CPUs  without MSR_IA32_TSC_ADJUST registry for CpuTscSync.kext.

Found an alternative solution. You can use VoodooTSCSync.kext with additional OpenCore settings:

UEFI ---> Quirks ---> TscSyncTimeout = 525000

The value 525000 is determined experimentally. It may need to be different for your hardware.

I don't know the algorithm how to choose this value correctly. However, with value 525000, my system always boots, 100% guaranteed. I now have a fully functional Monterey 12.4.

VoodooTSCSync.kext.zip 9.64 kB · 6 downloads

Hello @verdazil, 

 

Thank you for your information. That's a good news. Which is your hardware? Is there any hints to choose this value TscSyncTimeout = 525000? 

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On 7/5/2022 at 9:02 AM, verdazil said:

Hi to all!

Developers are in no hurry to add support of CPUs  without MSR_IA32_TSC_ADJUST registry for CpuTscSync.kext.

Found an alternative solution. You can use VoodooTSCSync.kext with additional OpenCore settings:

UEFI ---> Quirks ---> TscSyncTimeout = 525000

The value 525000 is determined experimentally. It may need to be different for your hardware.

I don't know the algorithm how to choose this value correctly. However, with value 525000, my system always boots, 100% guaranteed. I now have a fully functional Monterey 12.4.

VoodooTSCSync.kext.zip 9.64 kB · 6 downloads

Have you tried booting without VoodooTSCSync.kext?

using just Quirks->TscSyncTimeout

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2 hours ago, Zuja4701 said:

Which is your hardware? Is there any hints to choose this value TscSyncTimeout = 525000?

MB: Huananzhi X79-ZD3

CPU: Intel® Xeon E5-2689, 1.2-3.6 GHz

Chipset: Sandy Bridge-E Q65 (C600/C200)

Memory: Samsung 32 Gb (4 x 8 Gb) ECC/REG, 1866 MHz, DDR3

Video: Sapphire Pulse Radeon RX 570 (4 Gb)

Monitor: BENQ-BL2711U + LG TV 42LF650V

SSD: 2.5" SATA SSD 250 Gb Samsung 850 EVO

HDD: Seagate 2.0 Tb

I don't know the algorithm how to choose value TscSyncTimeout correctly. 

4 minutes ago, pitrysha said:

Have you tried booting without VoodooTSCSync.kext?

using just Quirks->TscSyncTimeout

Yes, I tried, it doesn't work for me.

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