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Help installing Mojave on Xeon W-2175 and Asus WS C422 mobo

obus

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in OSx86 10.14 (Mojave)

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etorix
etorix
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On 3/19/2020 at 12:51 AM, metacollin said:

Get the patches.txt file from that link, and you can use UEFIPatch to unlock the 0xE2 and 0x1AA MSRs (which allows you to boot macOS without any kernel patches and permits total, native power management in macOS) for the following motherboards (at least.  My hope is the patches are generalized enough that they will work for a large number of motherboards across multiple brands - but that remains to be seen):

  • Asus WS C422 PRO/SE
  • Asus PRIME X299-A
  • Asus WS C422 SAGE/10G
  • Supermicro X11 Series LGA2011 & LGA3647 single and multisocket motherboards
  • Maybe your motherboard?

 

Hello!

 

I apologize for being another (wanabee) C621 user crashing into this C422 thread, but this seems the right place to announce that the patches by @metacollin have successfully patched BIOS F8 for my Gigabyte C621-SU8 — so this is another entry in the list, from a third manufacturer.

With the patched BIOS, OpenCore can initiate OS X boot even without the Xcpm quirks.

 

The SSDT-CPU-WRAP has brought me even further into the boot process, before stumbling into an ACPI error. With the knowledge gathered in this thread, I've identified relevant sections in the DSDT, one manufacture's SSDT and four "OEM" AML files in the SysReport directory. As should be expected, my board is a very different beast from an X11DAi, and its processor "devices" have a different (broader) assortment of methods. So I'm slowly working to understand this ACPI stuff and write my own CPU-wrapping SSDT.

 

Thanks to all here! I've learned a lot (and a lot more than I expected to have to learn) reading this thread.

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etorix
etorix
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I'm using a Xeon Silver 4216, which I bought on eBay for about 500 E. That makes my experiment quite cheap, but 16 cores will make for an honourable computer if I succeed.

 

I first configured OpenCore for Skylake-X/CascadeLake-X according to Dortania's guide, and was stuck after loading ACPI tables (7 ACPI tables loaded, though I only had 3 SSDT then). With metacollin's SSDT-CPU-WRAP, the boot goes much further. These are the symptoms described by metacollin. The DSDT describes processors as "devices", as explained by metacollin, so, yes, it seems that I need CPU wrapping.

Matacollin wrapped _HID, _UID (methods wrapping objects), _STA and _PXM (these two are not wrapped in "If (CondRefOf())"), _MAT, _OSC, _PCT, _PDC, _PPC, _PSD and _PPS. In the SysReport folder, I found all of these CPU methods/objects, plus methods HWPT, ISTT, TSTT, CSTT, _TPC, _PTC, _TSS and _CST. That's a lot of copy, paste and edit work, but at least I only have to do it for one socket.

 

Thanks for your interest.

 

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etorix
etorix
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:thumbsup_anim: SUCCESS! :thumbsup_anim:

After throwing in my own CPU wrapper, VoodooTSCSync, emulated NVRAM and the npci=0x2000 flag in response to error messages and a last stumbling block after [PCI initialisation begins], I am finally able to boot into pre-installed Mojave or Catalina installations on the internal M.2 drive (reused from a previous hack).

I can suspend the system, and wake it at a keybord press or a click of the mouse.

 

But applying the latest security update or booting an OS X installer from USB thumbdrive does not work: The system gets stuck at "IOHDIX Controller: NOTE: administrator is creating non-ejectable disk image".

 

 

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etorix
etorix
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Thanks for your interest, and your help. I will study your example carefully, but I understand that OpenCore does not support NVRAM on C621 by design.

 

On 2/10/2021 at 8:26 PM, yapan4 said:

So quickly! My congratulations!

It is only quick compared to my first posting here. But the present run began late last year, and then I decided to try UEFIPatch and it was a breakthrough. There is still much to do:  Reboot is unstable, kernel panics appear after a few reboots or attempts to install; clearing (emulated) NVRAM is a temporary solution. Updates do not work; this is not related to USB, it also happens when updating from the M.2 drive, without USB. But there is also an USB issue; USB 3 ports from the chipset do not work as USB 3, only USB 2.0 (ASM2142 works).

 

If I can solve the issues, I'll write a complete guide. For now, here is a summary of what I currently use with the Gigabyte C621-SU8 and how I arrived there:

 

BIOS Select "UEFI Mode with Secure Boot": This is the secret key to disable CSM! And then select "No Security". (Without Secure Boot, CSM is enabled and locked.) Other settings as usual (VT-d, serial ports OFF; Above 4G Decoding ON).

I used UEFIPatch to patch BIOS version F8 (latest) and unlock MSR E2 and 1AA (no user accessible settings; decompiling with UEFITool yields no obvious offset to alter these settings).

OpenCore (currently 0.6.5 because I did most of the work from January) Configured according to the guide for Skylake-X, but some quirks are not currently used: CustomSlide (as suggested by the OpenCore log: All slides are good! That was also the case with the Gigabyte C246 boards.); AppleXcpmCfgLock and AppleXcpmExtraMsrs (due to my patched BIOS). Emulated NVRAM set. Boot argument "npci=0x2000".

iMacPro1,1 SMBIOS because I want to use Mojave.

SSDTs Custom EC-USBX and PLUG (generic Dortania versions would work). RTC0-RANGE (just uncomment the template: 0x72-73 is missing).

Custom CPU-WRAP, using the one by @metacollin as template.

Kexts Usual suspects plus VoodooTSCSync (seems to work better than CpuTscSync or TscAdjustReset, but further testing may be warranted).

 

Without SSDT-CPU-WRAP boot halts after loading ACPI tables.

VoodooTSCSync and emulated NVRAM were added due to reported errors during the boot process.

At this point, the boot halted shortly after a non-fatal ACPI error and the message [PCI configuration begins], often in the middle of a debug line. Adding "npci=0x2000" (in addition to Above 4G Decoding in BIOS), all flies and a pre-installed OS X boots from disk! (Installers/Updaters stall.)

I found today that with the ncpi flag, I can boot with metacollin's SSDT-CPU-WRAP.aml instead of mine, which wraps more functions. To be continued…

 

404782709_firstsuccess.png.f85c95a6b38c3b8d848c54e408be4c01.png

Edited by etorix
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obus
obus
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Updated to Big Sur 11.3 Beta (20E5172i) without no hiccups. Installation went smooth and fast with VT-d enabled in bios and DisableIoMapper in OpenCore configuration.plist --> Kernel --> Quirkset to "false" (NO).

Haven't had time to investigate the changes from 11.2.1 yet but will do that later.:thumbsup_anim:

 

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etorix
etorix
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CPU Wrapping

 

As explained here, recent firmwares for C621 boards declare CPU as ACPI "devices" rather than "processors", as required by OS X. Other than downgrading the firmware until the DSDT describes CPU as "processor", the solution found by @metacollin is to wrap the CPU methods and create an ACPI processor object for OS X to play with.

 

A SysReport dump from OpenCore confirmed that BIOS F8 for the Gigabyte C621-SU8 has this issue. As the ACPI pathing for the CPU was the same, I first tried to use metacollin's SSDT, cut down to one socket (SSDT-CPU-WRAP-1S), but the boot halted shortly after an ACPI error. I then assumed that the wrapping for a Supermicro X11 board was not good enough for my Gigabyte board and, using metacollin's SSDT as a template, wrote my own SSDT for all the CPU methods I found in the DSDT as well as the sidecar files SSDT-1.aml and OEM1-1.aml to OEM4-1.aml (SSDT-CPU-WRAP-C621SU8; it dezips to a lovely 292 ko DSL which compiles to a 77 ko AML—yes the code is a little bit repetitive…). I got the same error, but then found that the ACPI error was a non-fatal red herring, that the real issue was in PCI initialisation and required boot-arg "npci=0x2000".

And it turned out that with this boot argument, metacollin's SSDT works also.

 

This leaves me with a big fat SSDT I can be proud of although I understand next to nothing about ACPI and with a few questions for the ACPI experts here:

  • Metacollin wrapped all methods in "If (CondRefOf() )" constructs, except _STA and _PXM. Why the exception for these two methods? Are there absolutely mandated somewhere? (A quick browse through the 1200+ pages of the ACPI 6.3 spec gave no obvious answer, but maybe I should have looked into version 6.2 or earlier…)
     
  • I used CondRefOf() for all the methods I found in the SSDT1 and OEM files and directly wrapped all the methods and objects I found in the DSDT for my motherboard. Should I have done as metacollin and make everything conditional? Or with only select exceptions? Maybe that would make the SSDT be more resilient if a future firmware moves out some methods from the DSDT into a sidecar AML file.
     
  • Is it actually useful or necessary to wrap the HWPT, ISTT, TSTT, CSTT methods in SSDT-1.aml, which conditionally load the OEM files. As they are not prefixed with _, they are presumably specific to Gigabyte and/or only for internal use when called from ACPI standard _XXX methods. And I understand that OS X does not like dynamic loading.
     
  • The red herring error 
    [CP00] Node is unresolved or unitilized
[\___] @00019 #008E: ObjectType (\_SB.SCK0.CP00)
No Local Variables are initialised for method ["\" ]
No Arguments are initialized for method ["\" ]
    Should I worry about it? Do something about it? And if so, what?
    More wrappings? External declarations with "\_SB" isntead of "_SB_"?     [answered below]

acpi_error.thumb.jpg.49ce80a614aecbd31681a49348b5ad9b.jpg

 

(This shot is from an earlier trial with a different TSC kext from what I settled for, and shows how PCI intialisation halts brutally without "npci=0x2000". But it's always the same ACPI error.)

ACPI-C621SU8.zip SSDT-CPU-WRAP-1S.dsl.zip SSDT-CPU-WRAP-C621SU8.dsl.zip

Edited by etorix
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etorix
etorix
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Quick update on my progress with C621-SU8:

I caught the red herring! My custom SSDT-PLUG, written at the very beginning, was trying to attach to the real CPU. With CPU wrapping, it should attach to the wrapped PR00 instead of CP00. With a new SSDT-PLUG the ACPI error has disappeared, and I appear to have working power management (whole AppleACPICPU subtree under PR00 in IORegistryExplorer.)

With the EnableWriteUnprotector quirk instead of RebuildAppleMemoryMap+SyncRuntimePermissions, the boot process is now very stable. My Gigabyte C246 boards have the same behaviour, so there seems to be trend with Gigabyte Xeon boards —if only the trend extended to native NVRAM…

Edited by etorix
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etorix
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No, the C246 boards just work fine, with native NVRAM. Actually the C246 boards boot straight into OS X on the first attempt with OpenCore configured as for a regular Z370/Z390 desktop. OpenCore reports that all slides are good for the C246 boards, so the slide quirks may be turned off. But reboot on the C246 boards is more reliable with the EnableWriteUnprotector quirk (i.e. leave this and the related quirks as in Sample.plist rather than changing as told by the guide for Z390).

What I meant is that the C621-SU8 behaves like its C246 siblings with respect to the good slides and to the WriteUnprotector quirk; I wish the C621 also enjoyed native NVRAM, like the C246. I‘m sorry if I wasn‘t clear.

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yapan4
yapan4
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Posted (edited)
22 hours ago, etorix said:

With the EnableWriteUnprotector quirk instead of RebuildAppleMemoryMap+SyncRuntimePermissions, the boot process is now very stable.

This Quirk settings are well suited for my hackintosh too

 

Spoiler

Screen Shot 2021-02-14 at 11.28.34.png

I'll watch a bit and probably leave your version, thank you for sharing your knowledge

Edited by yapan4
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etorix
etorix
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21 hours ago, yapan4 said:

Have you tried other versions of the BIOS on C621 motherboard for a working NVRAM?

Not yet. There are only three available older versions (F5, F6, F7) to test, provided they still support my second generation Xeon Scalable, but I wait for holidays to do that.

 

Right now I do small post-install improvements. USB 3.0 from the chipset works! I found a post by @KGP-iMacPro about a similar issue on X299: AppleUSBXHPCI attaches to the chipset USB controller XHCI@14000000 with IOPCIClassMatchID 0x0c033000 instead of 0xa2af8086 and breaks USB on X299 boards. On my C621-SU8, class 0x0c033000 attaches to both the ASM media controller, which works, and to the chipset XCHI controller, which should have class is 0xa1af8086, and does not work. I modified KGP-iMacPro's kext to have the right injector, made an appropriate USB map and now all USB ports work. (The kext is both an injector for the correct IOPCIClass and an USB map.)

IOReg_USB.thumb.png.9c934ab1442f95d4f4ca5096dc863f38.png

 

 

USBMap-C621SU8.kext.zip

Edited by etorix
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yapan4
yapan4
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@etorix

One more thought. Gigabyte support provides a BIOS with an unhidden "ConfigureLock" (for enable/disable MSR 0xE2 locking) option for anyone. So you can register your motherboard and ask them this question. I once took this opportunity myself and received a new BIOS in three days. It was a regular desktop motherboard, but you can also try it.

Note: I do not remember the correct name of this option in the BIOS of this manufacturer

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amjsez
amjsez
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Posted (edited)

Is there anyone using a flashed or non-flashed Gigabyte Titan Ridge Thunderbolt V2 card?? I have installed the card. Thunderbolt port is recognised but the USB-C do not show in the IOReg tree... It shows up as USB3.0 in the about this Mac USB Device tree. To note, all USB device plugged into the port are not recognised..

 

@etorix I just noticed you have the Titan Ridge V1. Do all your USB-C port shows up and are they functional??

Edited by amjsez
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obus
obus
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1 hour ago, amjsez said:

Is there anyone using a flashed or non-flashed Gigabyte Titan Ridge Thunderbolt V2 card?? I have installed the card. Thunderbolt port is recognised but the USB-C do not show in the IOReg tree... It shows up as USB3.0 in the about this Mac USB Device tree. To note, all USB device plugged into the port are not recognised..

 

@etorix I just noticed you have the Titan Ridge V1. Do all your USB-C port shows up and are they functional??

Read this thread a little more thoroughly and you will learn!!:whistle:

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etorix
etorix
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6 hours ago, amjsez said:

 I just noticed you have the Titan Ridge V1. Do all your USB-C port shows up and are they functional??

Hello @amjsez. Obus has already posted all the information you need for your board.

 

Off this topic, my TitanRidge v1 is flashed according to the detailed teachings in the forum-which-shall-not-be-named-here and connected to the C246-WU4 with the Thunderbolt cable but not the USB cable. As far I can test, both ports work as they should, with hot plug for Thunderbolt and USB-C devices. I expect that this flashed card would work on the C621-SU8 but I have not yet tested. I have a new TitanRidge v2 and want to experiment again with a "native" card before I fire up the CH341a programmer again.

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amjsez
amjsez
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19 hours ago, obus said:

Read this thread a little more thoroughly and you will learn!!:whistle:

Hi obus, I have been following this post for some time now... Don't know how I missed the thunderbolt parts.............:wallbash::wallbash:..

I had to flashed back to BIOS 1202. (Is BIOS 1202 a prerequisite to have USB-C shows up? My CPU core is not showing properly with bios 1202?)

Now the USB-C ports are showing properly. But it's still non functional... It still charge my phone, but any USB-C drives does not shows up.

Screenshot 2021-02-17 at 15.16.37.png

Screenshot 2021-02-17 at 15.13.59.png

Edited by amjsez
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