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Help installing Mojave on Xeon W-2175 and Asus WS C422 mobo

obus

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in OSx86 10.14 (Mojave)

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hardcorehenry
hardcorehenry
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1 hour ago, yapan4 said:

@hardcorehenry

If possible upload please .aml version of this patch for comparison.
Thank you

I reworked SSDT-RTC.aml. Also try adding SSDT-AWAC.aml, if it won't help, problem may lay somwhere else.

 

You'll have to put another rename:

RTC _CRS to XCRS

Find:5F435253 11180A15 47017000 70

Repl:58435253 11180A15 47017000 70

 

SSDT-RTC.aml

Edited by hardcorehenry
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metacollin
metacollin
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Posted

So, how I modded the BIOSes:

 

Using UEFITool, I extracted PpmInitialize (3FFCAE95-23CF-4967-94F5-16352F68E43B) from the BIOS, yielding the raw, uncompressed binary suitable for poking around with your favorite disassembler/reverse engineering tools.  

 

How writing to an MSR on intel CPUs works is an instruction, wrmsr (opcode 0F30h) will write the contents of two 32-bit registers, EDX and EAX, into the MSR whose address is stored in a third register, ECX.  This means that prior to writing anything to a given MSR, the BIOS code must invariably load the register it is going to write to into the ECX register.  In assembly, this would be (using MSR 0xE2 as an example) : mov     ecx, E2h  

 

Basically, its moving E2h into ecx in preparation for doing something with either rdmsr (read) or wrmsr.  And since various BIOS settings do interact with the 1AAh and E2h registers, a BIOS will typically need to write to each of these registers more than once, and more importantly, the last time it writes to the register must be to do only one thing: to write 1 to the lock bit.  

 

On supermicro BIOSes, this is vary obvious if you just search for E2h in the assembly, as they actually just load the lock bit (8000h for E2h, or 2000h for 1AAh) into the EDX register shortly before writing to the respective MSR.  The mod is very simple and robust here, as all you have to do is zero out the lock bit.  Which amounts of changing an 80h or 20h to a 00h. 

 

The ASUS bioses do not load the lock bit directly as a constant unfortunately, but dereference a pointer to a location in memory with the lock bit value stored, and doing some additional jumps/tests (if statements in assembly), so changing the constant directly was not an option.  So I simply changed wrmsr to NOP NOP (wrmsr is a 2 byte instruction, so changing the 0F 30 to 90 90, which is nop or no operation, twice in a row will disable the one time the BIOS would normally write to the register to lock it).  

 

So I changed 2 bytes total in the supermicro BIOSes, and 4 bytes total (NOPing out the wrmsr operation that sets the lock bit for E2h and 1AAh) to the ASUS BIOSes.   So I think these are relatively low risk mods.  

 

 

Regardless, if anyone flashes the BIOS, please report back here ASAP with the results.  Also, be sure to do a full power-good reset (turn the switch on your power supply off and on again) after flashing the BIOS.  It sometimes requires a power-good reset to clear lock bits, so it might appear to not work if you simply reboot normally.   

 

 

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obus
obus
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9 hours ago, metacollin said:

Not sure if a generalized solution is feasible... your bios is very different.  

 

But thats ok.  I have no way to test this and you flash this at your own risk, please be familiar with the bios recovery procedure for your motherboard in case it doesn't work.  Unless it has IPMI, in which case no worries, you can just flash a working BIOS using that :).   Anyway, this should prevent the bios from locking both E2 and 1AA MSRs on your motherboard: 

WS-C422-PRO-SE-ASUS-3003_UNLOCK.CAP.xz

Hi @metacollin

You are the man for the year. Your modded bios v. 3003 worked like a treat. Just tell me what you did and which modules you changed in bios. I can now boot without any kernel quirk (AppleXcpmExtraMsrs and AppleXcpmCfgLock) enabled in OC. So your modded bios seemed to unlock both 0xe2 and some other locked register. Great!!!!!! :thumbsup_anim:

 

I will now check manually with AppleIntelInfo.kext and report back. (Hackintool-tab AppleIntelInfo docent seems to work with this bios )

Edited by obus
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yapan4
yapan4
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Posted (edited)
4 hours ago, hardcorehenry said:

I reworked SSDT-RTC.aml. Also try adding SSDT-AWAC.aml, if it won't help, problem may lay somwhere else.

 

You'll have to put another rename:

RTC _CRS to XCRS

Find:5F435253 11180A15 47017000 70

Repl:58435253 11180A15 47017000 70

 

SSDT-RTC.aml

Short reoprt:

RTC _CRS to XCRS do not work just like all other versions before.

 

Bechavior with your SSDT-RTC.aml some different - now kernel panic on AppleACPIPlatform...

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obus
obus
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Just now, yapan4 said:

Short reoprt:

RTC _CRS to XCRS do not work just like all other versions before.

 

Bechavior with your SSDT-RTC.aml some different - now kernel panic on AppleACPIPlatform.

You don't need anything of that with the new  v. 3003 bios. Just flash and boot up. It will work at least with OC. I don't need the RTC SSDT either.

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yapan4
yapan4
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1 hour ago, obus said:

You don't need anything of that with the new  v. 3003 bios. Just flash and boot up. It will work at least with OC. I don't need the RTC SSDT either.

Holy Heavens!!!

 

How you flash modified BIOS?

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obus
obus
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24 minutes ago, yapan4 said:

Holy heavens!!!

 

How you flash modified BIOS?

Just put attached bios on a usb stick and put the stick in the USB 2.0 port on the upper backside marked with green. After that push the button over the USB-stick for 3 sec and wait until the bios is loaded. It will take more than one minute. After that unplug and replug power and then load the new bios. (I always clearing CMOS too after first reboot) You can boot without any kernel patches.

WSCSE.CAP.zip

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yapan4
yapan4
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13 minutes ago, obus said:

Just put attached bios on a usb stick and put the stick in this USB 2.0 port on the upper backside marked with green. After that punch the button over the USB-stick for 3 sec and wait until the bios is loaded. It will take more than one minute. After that unplug and replug and then load the new bios. (I always clearing CMOS too after first reboot) You can boot without any kernel patches.

WSCSE.CAP.zip

Thank you.
Will be able to try in the evening after work:drool::drool::drool:

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obus
obus
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3 hours ago, yapan4 said:

Thank you.
Will be able to try in the evening after work:drool::drool::drool:

Sorry my bad. You need of course @lovest.fhd:s SSDT-RTC_patch too for booting with bios v.3003.

So this attached SSDT and non kernel patch will do the trick.

 

 

SSDT-RTC.aml

Edited by obus
Wrong SSDT
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obus
obus
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1 hour ago, yapan4 said:

@obus

I notice min CPU freq 0.9GHz instead 1.2GHz for our CPUs.  How did you do it? This is normal?

No idea.

Have problems with wake after sleep. System hangs and I need to do a hard reseat.

Screenshot 2020-03-03 at 14.30.29.png

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obus
obus
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7 hours ago, hardcorehenry said:

I reworked SSDT-RTC.aml. Also try adding SSDT-AWAC.aml, if it won't help, problem may lay somwhere else.

 

You'll have to put another rename:

RTC _CRS to XCRS

Find:5F435253 11180A15 47017000 70

Repl:58435253 11180A15 47017000 70

 

SSDT-RTC.aml

Tested your SSDT-RTC.aml and my rig didn't boot. Attached SSDT works fine and give me working RTC for booting and initialised AWAC. 

 

SSDT-RTC.aml

Screenshot 2020-03-03 at 16.13.44.png

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hardcorehenry
hardcorehenry
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12 minutes ago, obus said:

Tested your SSDT-RTC.aml and my rig didn't boot. Attached SSDT works fine and give me working RTC for booting and initialised AWAC. 

 

SSDT-RTC.aml

Screenshot 2020-03-03 at 16.13.44.png

That'd mean switching tables in RTC was not good idea. You could try only rename _STA to XSTA in RTC(with Count 1, skip: you have to count yourself;) (options available only in opencore)) and try this one: 

DefinitionBlock ("", "SSDT", 2, "HACK", "RTC_", 0x00000000)
{
    External (_SB_.PC00.LPC0.RTC_, DeviceObj)
    External (XSTA, MethodObj)    // 0 Arguments

    Scope (_SB.PC00.LPC0.RTC)
    {
   If (_OSI ("Darwin"))
        {
        }
        Else
        {
            Return (XSTA)
        }
    }
}

Make sure naming is correct I have different mobo.

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obus
obus
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On 2/27/2020 at 4:16 AM, lovest.fhd said:

Yes, I enable AppleXcpmCfgLock。This is the patch I use now

  



DefinitionBlock ("", "SSDT", 1, "SPMR", "C422", 0x00000000)
{

    
    External (_SB_.AWAC._STA, IntObj)
    External (_SB_.PC00.LPC0.RTC_._STA, IntObj)



    Device (SH01)
    {
        Name (_HID, "SDH10000") 
        Method (_INI, 0, NotSerialized)  
        {
            \_SB.PC00.LPC0.RTC._STA = 0x0F
            \_SB.AWAC._STA = Zero
        }

        Method (_STA, 0, NotSerialized)  
        {
            If (_OSI ("Darwin"))
            {
                Return (0x0F)
            }
            Else
            {
                Return (Zero)
            }
        }
    }

    
}

and you can use IORegistryExplorer search awac,If AWAC is not found, it is effective

Hi @lovest.fhd

 

This patch is not working for me. I can boot but it don't enable AWAC.

Attached SSDT-RTC.aml is working.

SSDT-RTC.aml

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obus
obus
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50 minutes ago, hardcorehenry said:

That'd mean switching tables in RTC was not good idea. You could try only rename _STA to XSTA in RTC(with Count 1, skip: you have to count yourself;) (options available only in opencore)) and try this one: 


DefinitionBlock ("", "SSDT", 2, "HACK", "RTC_", 0x00000000)
{
    External (_SB_.PC00.LPC0.RTC_, DeviceObj)
    External (XSTA, MethodObj)    // 0 Arguments

    Scope (_SB.PC00.LPC0.RTC)
    {
   If (_OSI ("Darwin"))
        {
        }
        Else
        {
            Return (XSTA)
        }
    }
}

Make sure naming is correct I have different mobo.

Ok I will test that.

 

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obus
obus
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Hi @metacollin

 

Your modded bios 3003 is working fine overall and the only culprit I have is (compared with original bios and enabled AppleXcpmCfgLock, AppleXcpmExtraMsrs in OC) that wake after sleep gives me KP. With the original version of 3003 wake after sleep is working as it should.

Could we test a version where only MSR0xE2 is unlocked?

 

 

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yapan4
yapan4
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The same kernel panic after wake from sleep. Mina from Apple :lol:. I do not use sleep at all and kep some time remained in this BIOS for test on oter posible issues

 

Edited by yapan4
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yapan4
yapan4
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Clover...  and new beta 4

 

...update beta3 to beta4 installed as usual.

 

Now Intel Power Gadget show me the same Min frequency 0.9GHz

Screenshot 2020-03-03 at 21.53.49.png

 

Windows boot - OK, sleep - OK, wake - OK, Intel Power Gadget - as usual

 

A-ha, somehow here is wrong

 

 

Screenshot 2020-03-03 at 22.18.57.png

 

X86PlatformPlugin not loaded

 

Screenshot 2020-03-03 at 22.41.46.png

Edited by yapan4
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antagon
antagon
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On 3/3/2020 at 1:25 AM, metacollin said:

I *think* your bios is leaving 0x1AA unlocked, but I am not sure.  I've unlocked E2 at least.  Also, same disclaimer, I am not responsible if it doesn't work, and I have no way to test it.  Be familiar with your motherboard's bios recovery procedure in case it doesn't work and you need to flash a working bios.  

 

 

PRIME-X299-A-ASUS-3006_UNLOCK_E2.CAP.xz

Thanks a lot for your work :). Unlocking E2 worked. At least the boot process starts now but pretty quick I end up in another error I´ve never seen before with older versions of the bios :(...

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yapan4
yapan4
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1 hour ago, antagon said:

Thanks a lot for your work :). Unlocking E2 worked. At least the boot process starts now but pretty quick I end up in another error I´ve never seen before with older versions of the bios :(...

As far as I know the X299 Cascade Lake motherboards have a problem with switching from 44 PCIe lines to 48 and no solution yet. And this does not apply to locked/unlocked registers. So, keep an eye on the X299 events. But upload please photo of you error in verbose mode, it is interesting...

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obus
obus
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13 hours ago, yapan4 said:

 

X86PlatformPlugin not loaded

 

Screenshot 2020-03-03 at 22.41.46.png

Are you using old bootstrap_pach? If so XCPM is not working. With modded bios v.3003 in clover you don't need bootstrap_patch. Use the EFI I sent to you earlier and it will work perfect on 10.15.3 at least.

 

Edited by obus
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