buyjoey Posted April 9, 2018 Share Posted April 9, 2018 55 minutes ago, buyjoey said: @KGP-iMacPro It works!!!! Thank you!! I corrected some mistake and I had to remove other PCI implementations. Wow, And next challenge is PXSX change. :)) Thank you! 1 Link to comment Share on other sites More sharing options...
Loloflat6 Posted April 15, 2018 Share Posted April 15, 2018 (edited) Thanks Matthew82 ! : After a week of severals issues : 1/ Bios recommended parameters + Pci devices set as Legacy 2/ I added arbitrary lines on my config.plist 3/ I created my own SSDT What is working : - Hot plug USB or HDD pluged on USB 3.1 or USB C : eject and re-plug OK Not working ( working in Windows 10 ) - Display sreen connected on USB C Edited April 17, 2018 by Loloflat6 1 Link to comment Share on other sites More sharing options...
Loloflat6 Posted April 15, 2018 Share Posted April 15, 2018 (edited) My issue is solved : jyavenard tell me to use Vega5KFixup kext https://github.com/jyavenard/Vega5KFixup I can boot with the ThunderboltEx 3 connected on USB C ! Nice day ! [Sapphire Radeon Nitro+ SE RX580 is fully supported on 10.13.4 : no boot flag/ no kext needed] Edited April 17, 2018 by Loloflat6 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted April 26, 2018 Author Share Posted April 26, 2018 Guide update to 10.13.4 SU (17E202) New EFI Folder linked and implemented in the guide Enjoy and have fun, 1 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted April 26, 2018 Author Share Posted April 26, 2018 Adaptation of the TB SSDT device implementation for TB implementations different from the ASUS TBEX 3 (e.g. for two-port TB solutions) After populating also DSB3 and DSB4, the respective TB SSDT implementation should now also be valid for TB solutions different from the ASUS TBEX 3 (also for two-port TB solutions). Note however that the TBEX 3 uses PCI lanes directly connected with the CPU, whereas other TB solutions might use PCH lanes. The latter TB implementations might need a TB device connected at boot to be recognised by the system, although hot plug should work subsequently also in this case after removing the THB_C cable. Thanks to @lelet for all fruitful discussions and for testing the new TB SSDT implementation on his Z370. The new SSDT-X299-iMacPro.aml is attached below and has also been implemented in the guide (originating post of this thread). /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20160422-64(RM) * Copyright (c) 2000 - 2016 Intel Corporation * * Disassembling to non-symbolic legacy ASL operators * * Disassembly of iASLYP2Xgb.aml, Thu Apr 26 19:47:44 2018 * * Original Table Header: * Signature "SSDT" * Length 0x0000230F (8975) * Revision 0x01 * Checksum 0xB0 * OEM ID "NICO" * OEM Table ID "X299" * OEM Revision 0x00000000 (0) * Compiler ID "INTL" * Compiler Version 0x20160422 (538313762) */ DefinitionBlock ("", "SSDT", 1, "NICO", "X299", 0x00000000) { External (_SB_.PC01.BR1A, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.PEGP, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.SL01, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.UPSB, DeviceObj) // (from opcode) External (_SB_.PC02.BR2A, DeviceObj) // (from opcode) External (_SB_.PC02.BR2A.GFX0, DeviceObj) // (from opcode) External (_SB_.PC03.BR3D.ARPT, DeviceObj) // (from opcode) External (_SB_.PCI0.ETH0, DeviceObj) // (from opcode) External (_SB_.PCI0.HDEF, DeviceObj) // (from opcode) External (_SB_.PCI0.PMCR, DeviceObj) // (from opcode) External (_SB_.PCI0.RP01.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP01.XHC2, DeviceObj) // (from opcode) External (_SB_.PCI0.RP02.ETH1, DeviceObj) // (from opcode) External (_SB_.PCI0.RP05.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP05.XHC3, DeviceObj) // (from opcode) External (_SB_.PCI0.RP07.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP07.XHC4, DeviceObj) // (from opcode) External (_SB_.PCI0.RP09.ANS2, DeviceObj) // (from opcode) External (_SB_.PCI0.RP09.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.SAT1, DeviceObj) // (from opcode) External (_SB_.PCI0.XHCI, DeviceObj) // (from opcode) External (GFX0, DeviceObj) // (from opcode) External (GPRW, MethodObj) // 2 Arguments (from opcode) External (OSDW, MethodObj) // 0 Arguments (from opcode) External (OSYS, UnknownObj) // (from opcode) External (PEGP, DeviceObj) // (from opcode) External (SL01, DeviceObj) // (from opcode) External (UPSB, DeviceObj) // (from opcode) Scope (\_SB.PCI0.HDEF) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x16) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "model", Buffer (0x1C) { "Realtek ALC S1220A HD Audio" }, "name", Buffer (0x27) { "Realtek ALC S1220A HD Audio Controller" }, "hda-gfx", Buffer (0x0A) { "onboard-1" }, "device_type", Buffer (0x14) { "HD-Audio-Controller" }, "device-id", Buffer (0x04) { 0xF0, 0xA2, 0x00, 0x00 }, "compatible", Buffer (0x0D) { "pci8086,0C0C" }, "MaximumBootBeepVolume", Buffer (One) { 0xEE }, "MaximumBootBeepVolumeAlt", Buffer (One) { 0xEE }, "layout-id", Buffer (0x04) { 0x07, 0x00, 0x00, 0x00 }, "PinConfigurations", Buffer (Zero) {} }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (_SB.PC02.BR2A) { Scope (GFX0) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x14) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x06, 0x1B, 0x00, 0x00 }, "hda-gfx", Buffer (0x0A) { "onboard-2" }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "@0,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@1,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@2,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@3,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@4,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@5,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (HDAU) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xEF, 0x10, 0x00, 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "device_type", Buffer (0x16) { "Multimedia Controller" }, "name", Buffer (0x1D) { "NVIDIA High Definition Audio" }, "hda-gfx", Buffer (0x0A) { "onboard-2" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } } Scope (\_SB.PCI0.PMCR) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0E) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "model", Buffer (0x1E) { "Intel X299 Series Chipset PMC" }, "name", Buffer (0x0A) { "Intel PMC" }, "device-id", Buffer (0x04) { 0xA1, 0xA2, 0x00, 0x00 }, "device_type", Buffer (0x0F) { "PMC-Controller" }, "built-in", Buffer (One) { 0x00 }, "compatible", Buffer (0x0D) { "pci8086,a2a1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (_SB.USBX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x08) { "kUSBSleepPortCurrentLimit", 0x0834, "kUSBSleepPowerSupply", 0x13EC, "kUSBWakePortCurrentLimit", 0x0834, "kUSBWakePowerSupply", 0x13EC }) } } Scope (\_SB.PCI0.XHCI) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xAF, 0xA2, 0x00, 0x00 }, "name", Buffer (0x34) { "ASMedia / Intel X299 Series Chipset XHCI Controller" }, "model", Buffer (0x34) { "ASMedia ASM1074 / Intel X299 Series Chipset USB 3.0" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (\_SB.PCI0.RP01.XHC2) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x2F) { "ASMedia ASM3142 #1 1x USB 3.1 Type-C Internal " }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP01.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP05.XHC3) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x2E) { "ASMedia ASM3142 #2 2x USB 3.1 Type-A External" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP05.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP07.XHC4) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x4A) { "ASMedia ASM3142 #3 1x USB 3.1 Type-A / ASM1543 1x USB 3.1 Type-C External" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP07.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP09.ANS2) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x08) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x14) { "AppleANS2Controller" }, "model", Buffer (0x12) { "Apple SSD AP1024M" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP09.PXSX._STA, Zero) // _STA: Status Scope (\_SB.PCI0.SAT1) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel AHCI Controller" }, "model", Buffer (0x1F) { "Intel X299 Series Chipset SATA" }, "device_type", Buffer (0x15) { "AHCI SATA Controller" }, "device-id", Buffer (0x04) { 0x82, 0xA2, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PCI0.ETH0) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x10) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel I219V2 Ethernet" }, "model", Buffer (0x2A) { "Intel I219V2 PCI Express Gigabit Ethernet" }, "location", Buffer (0x02) { "1" }, "subsystem-id", Buffer (0x04) { 0x72, 0x86, 0x00, 0x00 }, "device-id", Buffer (0x04) { 0xB8, 0x15, 0x00, 0x00 }, "subsystem-vendor-id", Buffer (0x04) { 0x43, 0x10, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PCI0.RP02.ETH1) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x10) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel I211VA Ethernet" }, "model", Buffer (0x2A) { "Intel I211VA PCI Express Gigabit Ethernet" }, "location", Buffer (0x02) { "2" }, "subsystem-id", Buffer (0x04) { 0xF0, 0x85, 0x00, 0x00 }, "device-id", Buffer (0x04) { 0x39, 0x15, 0x00, 0x00 }, "subsystem-vendor-id", Buffer (0x04) { 0x43, 0x10, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (_SB.PC03.BR3D.ARPT) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0E) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xA0, 0x43, 0x00, 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-3" }, "device_type", Buffer (0x13) { "AirPort Controller" }, "model", Buffer (0x4A) { "OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 Controller" }, "compatible", Buffer (0x0D) { "pci14e4,43a0" }, "name", Buffer (0x10) { "AirPort Extreme" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PC01.BR1A) { Scope (SL01) { Name (_STA, Zero) // _STA: Status } Scope (PEGP) { Name (_STA, Zero) // _STA: Status } Device (UPSB) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "PCI-Thunderbolt", One }) } Name (_RMV, One) // _RMV: Removal Status Device (DSB0) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "PCIHotplugCapable", One }) } Device (NHI0) { Name (_ADR, Zero) // _ADR: Address Name (_STR, Unicode ("Thunderbolt")) // _STR: Description String Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x0D) { "built-in", Buffer (One) { 0x00 }, "device_type", Buffer (0x19) { "Thunderbolt 3 Controller" }, "AAPL,slot-name", Buffer (0x07) { "Slot-4" }, "model", Buffer (0x30) { "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 NHI" }, "name", Buffer (0x37) { "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 Controller" }, "power-save", One, Buffer (One) { 0x00 } }) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address Name (_SUN, 0x04) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (Zero) } Device (UPS0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (ARE0, PCI_Config, Zero, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { If (OSDW ()) { Return (One) } Return (Zero) } Device (DSB0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1, Offset (0x3E), , 6, SBRS, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB5) { Name (_ADR, 0x00050000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address Device (XHC5) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x12) { "built-in", Buffer (One) { 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-4" }, "model", Buffer (0x41) { "ThunderboltEX 3 Texas Instruments TPS65982 USB 3.1 Type-A/Type-C" }, "name", Buffer (0x31) { "ThunderboltEX 3 Texas Instruments XHC Controller" }, "device_type", Buffer (0x13) { "USB 3.1 Controller" }, "device-id", Buffer (0x04) { 0xB6, 0x15, 0x00, 0x00 }, "USBBusNumber", Zero, "UsbCompanionControllerPresent", One, "AAPL,XHCI-clock-id", One }) } Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (SSP1) { Name (_ADR, One) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "UsbCPortNumber", One }) } } Device (SSP2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "UsbCPortNumber", 0x02 }) } } Device (HS01) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) } Device (HS02) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) } } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address Name (_SUN, 0x04) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (Zero) } Device (UPS0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (ARE0, PCI_Config, Zero, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { If (OSDW ()) { Return (One) } Return (Zero) } Device (DSB0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1, Offset (0x3E), , 6, SBRS, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB5) { Name (_ADR, 0x00050000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } } } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address Name (_SUN, 0x04) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (Zero) } Device (UPS0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (ARE0, PCI_Config, Zero, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { If (OSDW ()) { Return (One) } Return (Zero) } Device (DSB0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1, Offset (0x3E), , 6, SBRS, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB5) { Name (_ADR, 0x00050000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } } } } } Method (DTGP, 5, NotSerialized) { If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"))) { If (LEqual (Arg1, One)) { If (LEqual (Arg2, Zero)) { Store (Buffer (One) { 0x03 }, Arg4) Return (One) } If (LEqual (Arg2, One)) { Return (One) } } } Store (Buffer (One) { 0x00 }, Arg4) Return (Zero) } } Good luck and enjoy, SSDT-X299-iMacPro.aml.zip Link to comment Share on other sites More sharing options...
Peerke Posted May 8, 2018 Share Posted May 8, 2018 Wow, what a breeze after years of struggling with a X79 board! All I had to do for my MSI X299 board was to set npci=0x2000 and the installation went in one go! AppleALC did not work, but VoodooHDA does the trick for me. iStat menu works with the exta kexts, but the cores are numbered oddly: 1, 2, 3, 5, 6, 7, 8, 18. Apart from that small detail: excellent guide! 1 Link to comment Share on other sites More sharing options...
dgsga Posted May 21, 2018 Share Posted May 21, 2018 @KGP If you open your bios with AmiBCP.exe in windows you can unhide the hidden thunderbolt options. On my Asrock board one of these is Native OS Hot Plug which is disabled by default. Enable it and the rest as they say is history. You must use the newest version of AmiBCP for Aptio V (Google is your friend) and change the Access/Use value for the option you want to unhide from Default to USER then 'save as' the modified bios. I usually run the modded bios through Intel's Flash Image Tool (FIT) to make sure it's kosher and unlock the descriptor and ME regions so the bios can easily be flashed using FPT. For more info on all this I recommend you visit Fernando's Win-RAID forum, a mine of useful information... 3 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted May 21, 2018 Author Share Posted May 21, 2018 1 hour ago, dgsga said: @KGP If you open your bios with AmiBCP.exe in windows you can unhide the hidden thunderbolt options. On my Asrock board one of these is Native OS Hot Plug which is disabled by default. Enable it and the rest as they say is history. You must use the newest version of AmiBCP for Aptio V (Google is your friend) and change the Access/Use value for the option you want to unhide from Default to USER then 'save as' the modified bios. I usually run the modded bios through Intel's Flash Image Tool (FIT) to make sure it's kosher and unlock the descriptor and ME regions so the bios can easily be flashed using FPT. For more info on all this I recommend you visit Fernando's Win-RAID forum, a mine of useful information... Gorgeous, man! However it seems not straight forward to download AmiBCP for Aptio V . German citizens are addressed to register at the German AMI web page where no download seems available. How to access AmiBCP for Aptio V in this case? Link to comment Share on other sites More sharing options...
dgsga Posted May 21, 2018 Share Posted May 21, 2018 (edited) Google "AMIBCP 5.02.0023"... By the way, in all my 13 years of hackintoshing this is one of the best guides I have ever seen. Great job! Edited May 21, 2018 by dgsga 1 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted May 23, 2018 Author Share Posted May 23, 2018 (edited) On 5/21/2018 at 8:47 PM, dgsga said: Google "AMIBCP 5.02.0023"... By the way, in all my 13 years of hackintoshing this is one of the best guides I have ever seen. Great job! Thanks, man! I was investigating the things you mentioned but the matter is more dense then I thought initially. How can I inspire you to come up with a short "How to" for unlocking hidden Thunderbolt BIOS settings, which I could implement in my guide? Just in case, I LINK HERE the most recent patched (unlocked MSR register) ASUS Prime X299 Deluxe 1301 firmware below. It would be awesome if you could help in this matter Edited May 23, 2018 by KGP-iMacPro 1 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 4, 2018 Author Share Posted June 4, 2018 (edited) Let the show begin installing.... That's it... iMac Pro Skylake-X/X299 with macOS Mojave 10.14 DP1 (18A293u) Thanks to @PMHeart for providing the Clover.efi attached below. I also attach the 10.14 DP1 apsf.efi. apfs.efi.zip CLOVER.efi.zip Edited June 4, 2018 by KGP-iMacPro 1 Link to comment Share on other sites More sharing options...
Ingwar77 Posted June 7, 2018 Share Posted June 7, 2018 (edited) ... and what about Nvidia WebDriver for GeForce GTX 1080 Ti with macOS Mojave 10.14 DP1? Edited June 7, 2018 by Ingwar77 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 7, 2018 Author Share Posted June 7, 2018 (edited) 4 minutes ago, Ingwar77 said: ... and what about Nvidia WebDriver for GeForce GTX 1080 Ti with macOS Mojave 10.14 DP1? See new iMac Pro X299 Desktop Guide for macOS 10.14 Mojave There is no Web Driver for Mojave yet.. Use patched Web Driver for 10.13.4 SU or 10.13.5 ! Edited June 7, 2018 by KGP-iMacPro 1 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 9, 2018 Author Share Posted June 9, 2018 Image container for guide update Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 9, 2018 Author Share Posted June 9, 2018 Major Guide update to 10.13.5 (17F77) Guide totally revised. 10G-Bit Implementations added. New EFI-Folder, new System-SSDT, new TB-SSDT implemented. Please carefully revise entire originating post of this thread! Enjoy and have fun, Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 10, 2018 Author Share Posted June 10, 2018 (edited) New EFI-Folder implemented in originating post of this thread (guide)EFI-Folder EFI-X299-10.13.5-Release-iMacPro1,1-100618.zip related changes: Implementation of Boot Loader Clover_v2.4k_r4522 Adding SMCHelper-64.efi Adding VBoxHfs-64.efi Adding SMCHelper-64.efi and VBoxHfs-64.efi in /EFI/Clover/drivers64UEFI/ solved the issue with the USB macOS Installer partition being invisible in the Clover Boot Loader Menu. Sorry for any inconvenience caused by the previous EFI-Folder distribution. Enjoy and have fun, KGP Edited June 10, 2018 by KGP-iMacPro Link to comment Share on other sites More sharing options...
dugdiamond Posted June 10, 2018 Share Posted June 10, 2018 Hi guys, This thread is amazing, and just what I am looking for. My specs: i9-7980XE (delidded @4.6Ghz), stable at 4.8Ghz (silicon lottery winner!) Rampage VI Apex (BIOS: 1301) 32GB G.Skill Quad 3866Mhz RGB (4x8) 1TB Samsung 970 PRO (windows boot) 512MB Samsung 970 PRO (awaiting OSX) Gigabyte GTX 1060 Windforce OC 6GB (at stock) custom water-cooled loop. My problem: I have already got hacky with Sierra on, and have access to the High Sierra installer, but after many attempts of trying to create a USB Boot drive I am at my limits. I have followed this guide carefully, but I cannot seem to upgrade. Even the SSD from the other hacky will not boot on my new skylake-x system. Can anyone help me, please? Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 11, 2018 Author Share Posted June 11, 2018 (edited) 7 hours ago, dugdiamond said: Hi guys, This thread is amazing, and just what I am looking for. My specs: i9-7980XE (delidded @4.6Ghz), stable at 4.8Ghz (silicon lottery winner!) Rampage VI Apex (BIOS: 1301) 32GB G.Skill Quad 3866Mhz RGB (4x8) 1TB Samsung 970 PRO (windows boot) 512MB Samsung 970 PRO (awaiting OSX) Gigabyte GTX 1060 Windforce OC 6GB (at stock) custom water-cooled loop. My problem: I have already got hacky with Sierra on, and have access to the High Sierra installer, but after many attempts of trying to create a USB Boot drive I am at my limits. I have followed this guide carefully, but I cannot seem to upgrade. Even the SSD from the other hacky will not boot on my new skylake-x system. Can anyone help me, please? Did you try completing and using the most recent EFi-Folder distribution, which I just published yesterday ABOVE? Edited June 11, 2018 by KGP-iMacPro Link to comment Share on other sites More sharing options...
dugdiamond Posted June 11, 2018 Share Posted June 11, 2018 12 hours ago, KGP-iMacPro said: Did you try completing and using the most recent EFi-Folder distribution, which I just published yesterday ABOVE? yes. i get stuck with this... could my mobo be entering a sleep state!!! would i need my BIOS patched? if i do, then i do not know how to do it. here is my BIOS: ROG-RAMPAGE-VI-APEX-ASUS-1301.zip = https://www45.zippyshare.com/v/XDqYz1eT/file.html i would be very grateful if somebody would patch this for me. i would show some appreciation. Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 11, 2018 Author Share Posted June 11, 2018 (edited) 2 hours ago, dugdiamond said: yes. i get stuck with this... could my mobo be entering a sleep state!!! would i need my BIOS patched? if i do, then i do not know how to do it. here is my BIOS: ROG-RAMPAGE-VI-APEX-ASUS-1301.zip = https://www45.zippyshare.com/v/XDqYz1eT/file.html i would be very grateful if somebody would patch this for me. i would show some appreciation. Here you go... patched ROG-RAMPAGE-VI-APEX firmware attached below (it also already includes the iMac Pro Splash Screen Image). Note that I could not test the file, thus if you flash your BIOS with R6A.CAP using EZ FlashBack, you do it at your own risk! R6A.CAP.zip If you don't patch the BIOS you need to adopt and use TSCAdjustRest.kext! If you do not manually disable the MSR lock in the BIOS settings of the unpatched BIOS firmware, you need to enable xcpm_core_scope_msrs © Pike R. Alpha Kernel patch in addition! # If you use the patch BIOS firmware, you neither need TSCAdjustRest.kext nor the xcpm_core_scope_msrs © Pike R. Alpha Kernel patch. In the latter case you also should enable the MSR Lock in the BIOS Settings, as the corresponding MSR registers have been already unlocked for Kernel Write during the firmware patching process. Good luck, KGP Edited June 11, 2018 by KGP-iMacPro 1 Link to comment Share on other sites More sharing options...
dugdiamond Posted June 11, 2018 Share Posted June 11, 2018 my mobo failed to recognize the file as a proper BIOS file, and it failed to flash. several attempts were made. i even full formatted different USB drives/cards. it seems my best option would buy the needed parts for my old hacky and rebuild it, and then continue with Sierra, until i can find a decent refurbed macbook pro (2012+) on fleabay. lol thanks again for your efforts and kindness. Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 11, 2018 Author Share Posted June 11, 2018 1 hour ago, dugdiamond said: my mobo failed to recognize the file as a proper BIOS file, and it failed to flash. several attempts were made. i even full formatted different USB drives/cards. it seems my best option would buy the needed parts for my old hacky and rebuild it, and then continue with Sierra, until i can find a decent refurbed macbook pro (2012+) on fleabay. lol thanks again for your efforts and kindness. Try to verify if the file has the correct EZ Flashback naming convention for your mainboard. You did use EZFlashback to flash your BIOS with the patched BIOS firmware, correct? You know that you can't flash the patched firmware within the BIOS, right? Link to comment Share on other sites More sharing options...
dugdiamond Posted June 12, 2018 Share Posted June 12, 2018 (edited) 18 hours ago, KGP-iMacPro said: Try to verify if the file has the correct EZ Flashback naming convention for your mainboard. You did use EZFlashback to flash your BIOS with the patched BIOS firmware, correct? You know that you can't flash the patched firmware within the BIOS, right? after many hours - still no joy. the BIOS is recognized, but the system keeps rebooting in an infinite loop, every 5-10secs. i had to reset the BIOS on the mobo via headers, and get it back to its' default BIOS (0601), before re-flashing it to 1301 - so i could atleast boot into windows. UPDATE: BIOS flashed successfully... now for trying to get HS installed. Edited June 12, 2018 by dugdiamond 1 Link to comment Share on other sites More sharing options...
dugdiamond Posted June 12, 2018 Share Posted June 12, 2018 i have managed to install HS to my 512GB 970 PRO NVME several times, but only via APFS. this leaves me puzzled. i cannot create an EFI partition for clover to be install to on the same drive. my next approach was to try to install to a non-APFS partition (HFS+), but every time i try to install it to HFS+J the installer fails with ... "there is not enough space for to install". is there a workaround, or am i trying to flog a dead horse? LOL Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted June 13, 2018 Author Share Posted June 13, 2018 2 hours ago, dugdiamond said: i have managed to install HS to my 512GB 970 PRO NVME several times, but only via APFS. this leaves me puzzled. i cannot create an EFI partition for clover to be install to on the same drive. my next approach was to try to install to a non-APFS partition (HFS+), but every time i try to install it to HFS+J the installer fails with ... "there is not enough space for to install". is there a workaround, or am i trying to flog a dead horse? LOL What do you mean by "install HS ... via APFS"? if you format any drive with HFS+ and a GUID Partition table you automatically create the EFI partition... Why would you install HS on an APFS partition? Does this even work? To install what to a non-APFS partition (HFS+)? Which installer fails with "there.. install"? Clover? If so empty your trash bin! Honestly, I don't understand at all what you write above. So how can I propose a workaround? Please try to be more precise with your bug report. Link to comment Share on other sites More sharing options...
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