Loloflat6 Posted April 24, 2018 Share Posted April 24, 2018 (edited) Okey : sleep issue so did you try lelets SSDT TB3 V3 ? Edited April 24, 2018 by Loloflat6 Link to comment Share on other sites More sharing options...
Ribor92 Posted April 24, 2018 Share Posted April 24, 2018 Yes tried it! Didn’t get hotswap to work with that one at all I’m afraid. Maybe I’ll try again tonight with that one but something seems off 1 Link to comment Share on other sites More sharing options...
lelet Posted April 24, 2018 Share Posted April 24, 2018 28 minutes ago, Ribor92 said: Yes tried it! Didn’t get hotswap to work with that one at all I’m afraid. Maybe I’ll try again tonight with that one but something seems off Which SMbios do you use? Have you updated the firmware of your Alpine Ridge in windows? Send me your ioreg without SSDT Link to comment Share on other sites More sharing options...
Ribor92 Posted April 24, 2018 Share Posted April 24, 2018 (edited) Thanks for taking a care in this! I´m using iMac 18,3 right now Attaching my IOREG in a dropbox link, apparently it's too big to upload here! https://www.dropbox.com/s/occwob8acrwk3av/Ritchies iMac 18%2C3.ioreg?dl=0 Edit: And yes, have been in windows updating my Alpine Ridge card to latest firmware Edited April 24, 2018 by Ribor92 Link to comment Share on other sites More sharing options...
egroys Posted April 24, 2018 Share Posted April 24, 2018 Holy s********!!! The cable pulling, simplified SSDT + clover injection has worked for me on my Asus Prime Deluxe with Asus TBEX3 as described by @lelet. Unreal! Thank you so much. Are there further steps we need to take to get things fully functional? I have no other USB C needs as of yet but am curious. 1 Link to comment Share on other sites More sharing options...
Ribor92 Posted April 24, 2018 Share Posted April 24, 2018 5 minutes ago, egroys said: Holy s********!!! The cable pulling, simplified SSDT + clover injection has worked for me on my Asus Prime Deluxe with Asus TBEX3 as described by @lelet. Unreal! Thank you so much. Are there further steps we need to take to get things fully functional? I have no other USB C needs as of yet but am curious. Good to hear man! When I tried it my Thunderbolt device didn't show connection when booting, does your do that? Link to comment Share on other sites More sharing options...
egroys Posted April 24, 2018 Share Posted April 24, 2018 23 minutes ago, Ribor92 said: Good to hear man! When I tried it my Thunderbolt device didn't show connection when booting, does your do that? I expected it to not work, especially after so many attempts at different methods. This one sounded the least likely to work, and as soon as I booted, my Apollo turned on its HOST light and it's been working since! I added my clover arbitrary device as 32:00.00 (my BR1A) and that's it. I only pulled the cable from the Mobo but not the card... not sure if that matters. 1 Link to comment Share on other sites More sharing options...
lelet Posted April 24, 2018 Share Posted April 24, 2018 (edited) 1 hour ago, Ribor92 said: Thanks for taking a care in this! I´m using iMac 18,3 right now Attaching my IOREG in a dropbox link, apparently it's too big to upload here! https://www.dropbox.com/s/occwob8acrwk3av/Ritchies iMac 18%2C3.ioreg?dl=0 Edit: And yes, have been in windows updating my Alpine Ridge card to latest firmware I check when I get home. I can tell you in advance that you have to use the SSDT V3 (with your ACPI path) if you have disconnected the cable, and your devices must be connected and turned on before boot. It's all still a work in progress Edited April 24, 2018 by lelet Link to comment Share on other sites More sharing options...
Ribor92 Posted April 24, 2018 Share Posted April 24, 2018 Just now, lelet said: I check when I get home. I can tell you in advance that you have to use the SSDT V3 if you have disconnected the cable and your devices must be connected and turned on before boot. It's all still a work in progress Many thanks! Yeah I'll try again! Hopefully you can think of something later Link to comment Share on other sites More sharing options...
lelet Posted April 24, 2018 Share Posted April 24, 2018 6 minutes ago, Ribor92 said: Many thanks! Yeah I'll try again! Hopefully you can think of something later Sorry! I forgot, if you use SSDT V3 you have to remove the _DSM method from DSB1 Link to comment Share on other sites More sharing options...
Ribor92 Posted April 24, 2018 Share Posted April 24, 2018 17 minutes ago, lelet said: Sorry! I forgot, if you use SSDT V3 you have to remove the _DSM method from DSB1 And use the Arbitrary? Link to comment Share on other sites More sharing options...
lelet Posted April 24, 2018 Share Posted April 24, 2018 3 minutes ago, Ribor92 said: And use the Arbitrary? If you use arbitrary inject, you do not need the ssdt, so try in the meantime. Later I update everyone for use this method and load the correct ssdt 1 Link to comment Share on other sites More sharing options...
Ribor92 Posted April 25, 2018 Share Posted April 25, 2018 Okay cool! Not sure how to remove the _DSM so I'll wait! No luck so far testing Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted April 25, 2018 Share Posted April 25, 2018 (edited) On 4/24/2018 at 1:33 PM, lelet said: SUCCESS!!! Finally all my THUNDERBOLT devices are hotpluggable!! The solution is unbelievable, seems to work on all chipsets without using SSDT, and shifts the focus on the cause of all problems Thunderbolt: the cable THB_C!! Already in my previous post I noticed strange behavior by inserting the _DSM method in DSB2: PCIHotplugcapable Zero. Since then I've been trying to figure out how the XHC controller affected the Thunderbolt hotplug, until Crismac2013 suggested I disconnect the THB_C cable from the motherboard. Once disconnected, it was enough to add as an arbitrary inject my first Thunderbolt address (PXSX): <dict> <key>Comment</key> <string>PCI THUNDERBOLT 15d3 first entry</string> <key>CustomProperties</key> <array> <dict> <key>Disabled</key> <false/> <key>Key</key> <string>PCI-Thunderbolt</string> <key>Value</key> <integer>1</integer> </dict> <dict> <key>Disabled</key> <false/> <key>Key</key> <string>IOName</string> <key>Value</key> <string>pci-bridge</string> </dict> </array> <key>PciAddr</key> <string>01:00.00</string> </dict> and it works!! Now I have also added my last SSDT to get PCI information on System info. Probably with my last SSDT the arbitrary inject are not needed, as PCI-Thunderbolt One is already inserted as a _DSM method in UPSB. I suspect, however, that in this way the USB-C functionality will be lost, you should do a test! In any case this is a huge step forward and makes it obvious that we need to work on XHCs controller to solve the problems with the hotplug with THB_C cable connected. Yes sir!!!! The THB_C cable between the TBEX 3 and the motherboard prevents TB hot plug! After removing this cable I have full TBEX3 TB and TB XHC USB hot plug functionality with my SSDT-X299-iMacPro.aml, which I distributed several months ago (http://www.insanelymac.com/forum/topic/331658-how-to-build-your-own-imac-pro-successful-buildextended-guide/). I never realised why my TBEX3 TB and TB XHC USB SSDT implementation was working on some systems and on others not ... you provided the answer :-) I am convinced that the SSDT now will even work with TB implementations different from the TBEX 3. TB and TB-XHC hotplug.mov I programmed and implemented the TBEX 3 TB SSDT implementation based on former attempts by @Mork vom Ork and @Matthew82. If I understand correctly, @Matthew82 's former work further bases on some implementations by @maleorderbride and @TheRacerMaster. Note that with the TBEX 3 TB SSDT implementation detailed below, also any "Arbitrary" TB entry in the config plist in Section "Devices" of Clover Configurator is totally obsolete. SSDT-X299-iMacPro.aml /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20160422-64(RM) * Copyright (c) 2000 - 2016 Intel Corporation * * Disassembling to non-symbolic legacy ASL operators * * Disassembly of iASLdOJAsj.aml, Wed Apr 25 10:27:52 2018 * * Original Table Header: * Signature "SSDT" * Length 0x00001B7B (7035) * Revision 0x01 * Checksum 0x42 * OEM ID "NICO" * OEM Table ID "X299" * OEM Revision 0x00000000 (0) * Compiler ID "INTL" * Compiler Version 0x20160422 (538313762) */ DefinitionBlock ("", "SSDT", 1, "NICO", "X299", 0x00000000) { External (_SB_.PC01.BR1A, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.PEGP, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.SL01, DeviceObj) // (from opcode) External (_SB_.PC01.BR1A.UPSB, DeviceObj) // (from opcode) External (_SB_.PC02.BR2A, DeviceObj) // (from opcode) External (_SB_.PC02.BR2A.GFX0, DeviceObj) // (from opcode) External (_SB_.PC03.BR3D.ARPT, DeviceObj) // (from opcode) External (_SB_.PCI0.ETH0, DeviceObj) // (from opcode) External (_SB_.PCI0.HDEF, DeviceObj) // (from opcode) External (_SB_.PCI0.PMCR, DeviceObj) // (from opcode) External (_SB_.PCI0.RP01.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP01.XHC2, DeviceObj) // (from opcode) External (_SB_.PCI0.RP02.ETH1, DeviceObj) // (from opcode) External (_SB_.PCI0.RP05.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP05.XHC3, DeviceObj) // (from opcode) External (_SB_.PCI0.RP07.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.RP07.XHC4, DeviceObj) // (from opcode) External (_SB_.PCI0.RP09.ANS2, DeviceObj) // (from opcode) External (_SB_.PCI0.RP09.PXSX, DeviceObj) // (from opcode) External (_SB_.PCI0.SAT1, DeviceObj) // (from opcode) External (_SB_.PCI0.XHCI, DeviceObj) // (from opcode) External (GFX0, DeviceObj) // (from opcode) External (GPRW, MethodObj) // 2 Arguments (from opcode) External (OSDW, MethodObj) // 0 Arguments (from opcode) External (OSYS, UnknownObj) // (from opcode) External (PEGP, DeviceObj) // (from opcode) External (SL01, DeviceObj) // (from opcode) External (UPSB, DeviceObj) // (from opcode) Scope (\_SB.PCI0.HDEF) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x16) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "model", Buffer (0x1C) { "Realtek ALC S1220A HD Audio" }, "name", Buffer (0x27) { "Realtek ALC S1220A HD Audio Controller" }, "hda-gfx", Buffer (0x0A) { "onboard-1" }, "device_type", Buffer (0x14) { "HD-Audio-Controller" }, "device-id", Buffer (0x04) { 0xF0, 0xA2, 0x00, 0x00 }, "compatible", Buffer (0x0D) { "pci8086,0C0C" }, "MaximumBootBeepVolume", Buffer (One) { 0xEE }, "MaximumBootBeepVolumeAlt", Buffer (One) { 0xEE }, "layout-id", Buffer (0x04) { 0x07, 0x00, 0x00, 0x00 }, "PinConfigurations", Buffer (Zero) {} }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (_SB.PC02.BR2A) { Scope (GFX0) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x14) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x06, 0x1B, 0x00, 0x00 }, "hda-gfx", Buffer (0x0A) { "onboard-2" }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "@0,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@1,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@2,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@3,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@4,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 }, "@5,connector-type", Buffer (0x04) { 0x00, 0x08, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (HDAU) { Name (_ADR, One) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xEF, 0x10, 0x00, 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-1" }, "device_type", Buffer (0x16) { "Multimedia Controller" }, "name", Buffer (0x1D) { "NVIDIA High Definition Audio" }, "hda-gfx", Buffer (0x0A) { "onboard-2" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } } Scope (\_SB.PCI0.PMCR) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0E) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "model", Buffer (0x1E) { "Intel X299 Series Chipset PMC" }, "name", Buffer (0x0A) { "Intel PMC" }, "device-id", Buffer (0x04) { 0xA1, 0xA2, 0x00, 0x00 }, "device_type", Buffer (0x0F) { "PMC-Controller" }, "built-in", Buffer (One) { 0x00 }, "compatible", Buffer (0x0D) { "pci8086,a2a1" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (_SB.USBX) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x08) { "kUSBSleepPortCurrentLimit", 0x0834, "kUSBSleepPowerSupply", 0x13EC, "kUSBWakePortCurrentLimit", 0x0834, "kUSBWakePowerSupply", 0x13EC }) } } Scope (\_SB.PCI0.XHCI) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xAF, 0xA2, 0x00, 0x00 }, "name", Buffer (0x34) { "ASMedia / Intel X299 Series Chipset XHCI Controller" }, "model", Buffer (0x34) { "ASMedia ASM1074 / Intel X299 Series Chipset USB 3.0" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (\_SB.PCI0.RP01.XHC2) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x2F) { "ASMedia ASM3142 #1 1x USB 3.1 Type-C Internal " }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP01.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP05.XHC3) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x2E) { "ASMedia ASM3142 #2 2x USB 3.1 Type-A External" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP05.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP07.XHC4) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x1B) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0x42, 0x21, 0x00, 0x00 }, "name", Buffer (0x17) { "ASMedia XHC Controller" }, "model", Buffer (0x4A) { "ASMedia ASM3142 #3 1x USB 3.1 Type-A / ASM1543 1x USB 3.1 Type-C External" }, "AAPL,current-available", 0x0834, "AAPL,current-extra", 0x0A8C, "AAPL,current-in-sleep", 0x0A8C, "AAPL,max-port-current-in-sleep", 0x0834, "AAPL,device-internal", Zero, "AAPL,clock-id", Buffer (One) { 0x01 }, "AAPL,root-hub-depth", 0x1A, "AAPL,XHC-clock-id", One, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP07.PXSX._STA, Zero) // _STA: Status Device (\_SB.PCI0.RP09.ANS2) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Store (Package (0x08) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x14) { "AppleANS2Controller" }, "model", Buffer (0x12) { "Apple SSD AP1024M" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Name (_SB.PCI0.RP09.PXSX._STA, Zero) // _STA: Status Scope (\_SB.PCI0.SAT1) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0C) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel AHCI Controller" }, "model", Buffer (0x1F) { "Intel X299 Series Chipset SATA" }, "device_type", Buffer (0x15) { "AHCI SATA Controller" }, "device-id", Buffer (0x04) { 0x82, 0xA2, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PCI0.ETH0) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x10) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel I219V2 Ethernet" }, "model", Buffer (0x2A) { "Intel I219V2 PCI Express Gigabit Ethernet" }, "location", Buffer (0x02) { "1" }, "subsystem-id", Buffer (0x04) { 0x72, 0x86, 0x00, 0x00 }, "device-id", Buffer (0x04) { 0xB8, 0x15, 0x00, 0x00 }, "subsystem-vendor-id", Buffer (0x04) { 0x43, 0x10, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PCI0.RP02.ETH1) { Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x10) { "AAPL,slot-name", Buffer (0x09) { "Built In" }, "built-in", Buffer (One) { 0x00 }, "name", Buffer (0x16) { "Intel I211VA Ethernet" }, "model", Buffer (0x2A) { "Intel I211VA PCI Express Gigabit Ethernet" }, "location", Buffer (0x02) { "2" }, "subsystem-id", Buffer (0x04) { 0xF0, 0x85, 0x00, 0x00 }, "device-id", Buffer (0x04) { 0x39, 0x15, 0x00, 0x00 }, "subsystem-vendor-id", Buffer (0x04) { 0x43, 0x10, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (_SB.PC03.BR3D.ARPT) { OperationRegion (PCIS, PCI_Config, Zero, 0x0100) Field (PCIS, AnyAcc, NoLock, Preserve) { PVID, 16, PDID, 16 } Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (GPRW (0x69, 0x04)) } Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { Store (Package (0x0E) { "built-in", Buffer (One) { 0x00 }, "device-id", Buffer (0x04) { 0xA0, 0x43, 0x00, 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-3" }, "device_type", Buffer (0x13) { "AirPort Controller" }, "model", Buffer (0x4A) { "OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 Controller" }, "compatible", Buffer (0x0D) { "pci14e4,43a0" }, "name", Buffer (0x10) { "AirPort Extreme" } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Scope (\_SB.PC01.BR1A) { Scope (SL01) { Name (_STA, Zero) // _STA: Status } Scope (PEGP) { Name (_STA, Zero) // _STA: Status } Device (UPSB) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "PCI-Thunderbolt", One }) } Name (_RMV, One) // _RMV: Removal Status Device (DSB0) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LNot (Arg2)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "PCIHotplugCapable", One }) } Device (NHI0) { Name (_ADR, Zero) // _ADR: Address Name (_STR, Unicode ("Thunderbolt")) // _STR: Description String Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x0D) { "built-in", Buffer (One) { 0x00 }, "device_type", Buffer (0x19) { "Thunderbolt 3 Controller" }, "AAPL,slot-name", Buffer (0x07) { "Slot-4" }, "model", Buffer (0x30) { "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 NHI" }, "name", Buffer (0x37) { "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 Controller" }, "power-save", One, Buffer (One) { 0x00 } }) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address Name (_SUN, 0x04) // _SUN: Slot User Number OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (Zero) } Device (UPS0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (ARE0, PCI_Config, Zero, 0x04) Field (ARE0, ByteAcc, NoLock, Preserve) { AVND, 16 } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { If (OSDW ()) { Return (One) } Return (Zero) } Device (DSB0) { Name (_ADR, Zero) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1, Offset (0x3E), , 6, SBRS, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB1) { Name (_ADR, 0x00010000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } Device (DSB5) { Name (_ADR, 0x00050000) // _ADR: Address OperationRegion (A1E0, PCI_Config, Zero, 0x40) Field (A1E0, ByteAcc, NoLock, Preserve) { AVND, 32, BMIE, 3, Offset (0x18), PRIB, 8, SECB, 8, SUBB, 8, Offset (0x1E), , 13, MABT, 1 } Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number { Return (SECB) } Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } Device (DEV0) { Name (_ADR, Zero) // _ADR: Address Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_RMV, 0, NotSerialized) // _RMV: Removal Status { Return (One) } } } } } Device (DSB2) { Name (_ADR, 0x00020000) // _ADR: Address Device (XHC5) { Name (_ADR, Zero) // _ADR: Address Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x12) { "built-in", Buffer (One) { 0x00 }, "AAPL,slot-name", Buffer (0x07) { "Slot-4" }, "model", Buffer (0x41) { "ThunderboltEX 3 Texas Instruments TPS65982 USB 3.1 Type-A/Type-C" }, "name", Buffer (0x31) { "ThunderboltEX 3 Texas Instruments XHC Controller" }, "device_type", Buffer (0x13) { "USB 3.1 Controller" }, "device-id", Buffer (0x04) { 0xB6, 0x15, 0x00, 0x00 }, "USBBusNumber", Zero, "UsbCompanionControllerPresent", One, "AAPL,XHCI-clock-id", One }) } Device (RHUB) { Name (_ADR, Zero) // _ADR: Address Device (SSP1) { Name (_ADR, One) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "UsbCPortNumber", One }) } } Device (SSP2) { Name (_ADR, 0x02) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method { If (LEqual (Arg2, Zero)) { Return (Buffer (One) { 0x03 }) } Return (Package (0x02) { "UsbCPortNumber", 0x02 }) } } Device (HS01) { Name (_ADR, 0x03) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) } Device (HS02) { Name (_ADR, 0x04) // _ADR: Address Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, Package (0x01) // _PLD: Physical Location of Device { Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } }) } } } } Device (DSB3) { Name (_ADR, 0x00030000) // _ADR: Address } Device (DSB4) { Name (_ADR, 0x00040000) // _ADR: Address } } } Method (DTGP, 5, NotSerialized) { If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"))) { If (LEqual (Arg1, One)) { If (LEqual (Arg2, Zero)) { Store (Buffer (One) { 0x03 }, Arg4) Return (One) } If (LEqual (Arg2, One)) { Return (One) } } } Store (Buffer (One) { 0x00 }, Arg4) Return (Zero) } } SSDT-X299-iMacPro.aml.zip Cheers, KGP Edited April 26, 2018 by KGP-iMacPro 1 Link to comment Share on other sites More sharing options...
lelet Posted April 25, 2018 Share Posted April 25, 2018 (edited) 1 hour ago, KGP-iMacPro said: Yes sir!!!! The THB_C cable between the TBEX 3 and the motherboard prevents TB hot plug! After removing this cable I have full TBEX3 TB and TB XHC USB hot plug functionality with my SSDT-X299-iMacPro.aml, which I distributed several months ago (http://www.insanelymac.com/forum/topic/331658-how-to-build-your-own-imac-pro-successful-buildextended-guide/). I never realised why my TBEX3 TB and TB XHC USB SSDT implementation was working on some systems and on others not ... you provided the answer :-) I am convinced that the SSDT now will even work with TB implementations different from the TBEX 3. TB and TB-XHC hotplug.mov I programmed and implemented the TBEX 3 TB SSDT implementation based on former attempts by @Mork vom Ork and @Matthew82. If I understand correctly, @Matthew82 's former work further bases on some implementations by @maleorderbride and @TheRacerMaster. Note that with the TBEX 3 TB SSDT implementation detailed below, also any "Arbitrary" TB entry in the config plist in Section "Devices" of Clover Configurator is totally obsolete. Hi @KGP-iMacPro, finally after more than a month some progress! Unfortunately this is not the definitive answer, but it poses other questions. What I did not say yesterday, is that once the THB_C cable is removed the Thunderbolt PCI card is not loaded by the system at startup. But if I have a device connected and turned on before boot the PCI card is recognized and loaded correctly, but not only, in this way you have the hotplug of all devices! To make it work, add "PCI-Thunderbolt One" to PXSX/BR1A. It works either with Arbitrary inject or with _DSM method on SSDT (better because the devices can be implemented on the PCI system info). I use a Thunderbolt dock that turns on when I turn on the computer (to be precise, since I use Fix Shutdown, never turns off like my USB devices), and then the Thunderbolt PCI card is charged every time the computer is started and all the devices after the dock are hotpluggable. Based on the original Apple SSDT of an iMac18,3, I realized this: SSDT-TB3 V3.zip (Updated version)However I do not know if it works correctly on both Thunderbolt ports and USB-C devices. I will do some more tests when we have the final solution. Obviously as I said, this is not a solution, but it makes clear that the problems with the hotplug derive from the functions that add the THB_C cable, so we are faced with two ways:1- Finding the way to make the PCI card load from the system even without a connected THB_C cable2- Understand what features this cable provides and whether it can be found in ACPI paths to include it in the SSDT Edited April 25, 2018 by lelet 1 Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted April 25, 2018 Share Posted April 25, 2018 1 hour ago, lelet said: Hi @KGP-iMacPro, finally after more than a month some progress! Unfortunately this is not the definitive answer, but it poses other questions. What I did not say yesterday, is that once the THB_C cable is removed the Thunderbolt PCI card is not loaded by the system at startup. But if I have a device connected and turned on before boot the PCI card is recognized and loaded correctly, but not only, in this way you have the hotplug of all devices! To make it work, add "PCI-Thunderbolt One" to PXSX/BR1A. It works either with Arbitrary inject or with _DSM method on SSDT (better because the devices can be implemented on the PCI system info). I use a Thunderbolt dock that turns on when I turn on the computer (to be precise, since I use Fix Shutdown, never turns off like my USB devices), and then the Thunderbolt PCI card is charged every time the computer is started and all the devices after the dock are hotpluggable. Based on the original Apple SSDT of an iMac18,3, I realized this: SSDT-TB3 V3.zip (Updated version)However I do not know if it works correctly on both Thunderbolt ports and USB-C devices. I will do some more tests when we have the final solution. Obviously as I said, this is not a solution, but it makes clear that the problems with the hotplug derive from the functions that add the THB_C cable, so we are faced with two ways:1- Finding the way to make the PCI card load from the system even without a connected THB_C cable2- Understand what features this cable provides and whether it can be found in ACPI paths to include it in the SSDT Wrong No need to connect any TB device before booting the system. The TBEX 3 get's fully automatically initialised and implemented by OSX as soon a TB or TB XHC USB device will be connected to the already operational macOS system. >>> https://youtu.be/JSNp75UOfq4 <<< Give it a try with my SSDT-X299-iMacPro.aml properly adapted to your system Full TB Hot Plug Functionality! Maybe you also need an update to SMBIOS iMacPro1,1 in addition? Cheers, KGP Link to comment Share on other sites More sharing options...
jya Posted April 25, 2018 Share Posted April 25, 2018 Unfortunately, removing the THB cable isn't working with the ASRock MB, no TB devices show up at all... When I had the gigabyte Gaming 7 Pro and was waiting for the connector adapter (GB uses a different header pitch: 2mm vs 2.54mm) no TB devices were seen in macos either... Link to comment Share on other sites More sharing options...
lelet Posted April 25, 2018 Share Posted April 25, 2018 38 minutes ago, jya said: Unfortunately, removing the THB cable isn't working with the ASRock MB, no TB devices show up at all... When I had the gigabyte Gaming 7 Pro and was waiting for the connector adapter (GB uses a different header pitch: 2mm vs 2.54mm) no TB devices were seen in macos either... Try to boot with a TB device connected Link to comment Share on other sites More sharing options...
jya Posted April 25, 2018 Share Posted April 25, 2018 i'm always booting with TB devices attached. Link to comment Share on other sites More sharing options...
jya Posted April 25, 2018 Share Posted April 25, 2018 7 hours ago, KGP-iMacPro said: Device (\_SB.PCI0.RP01.XHC2) @Mork vom Ork@Matthew82@maleorderbride@TheRacerMaster Does your XHC2 device still shows in IORegistry? I'm surprised it would with just the SSDT the USB controller is by default attached to PCI0.RP01.SLT1 You're only disabling PXSX device... Unless you renamed SLT1 into XHC2 in Clover hot patch of course... Link to comment Share on other sites More sharing options...
Ribor92 Posted April 25, 2018 Share Posted April 25, 2018 No progress with the new SSDT (V3 updated) configured for my system. Thunderbolt connection is just none with the the internal header pulled out Link to comment Share on other sites More sharing options...
KGP-iMacPro Posted April 25, 2018 Share Posted April 25, 2018 17 minutes ago, jya said: Does your XHC2 device still shows in IORegistry? I'm surprised it would with just the SSDT the USB controller is by default attached to PCI0.RP01.SLT1 You're only disabling PXSX device... Unless you renamed SLT1 into XHC2 in Clover hot patch of course... Well, then be surprised : No SLT1 to XHC2 Clover hot patch! Link to comment Share on other sites More sharing options...
lelet Posted April 25, 2018 Share Posted April 25, 2018 48 minutes ago, Ribor92 said: No progress with the new SSDT (V3 updated) configured for my system. Thunderbolt connection is just none with the the internal header pulled out Remove the THB_C cable and try this: SSDT-TB3 Z270.aml Remember though, the method without THB_C works only if a device is connected and turned on before boot, otherwise the PCI-TB card is not loaded by the system (and you do not see it on ioreg). In my case it works because my TB Dock is always on. To succeed try these steps: 1- enable Fix Shutdown in Clover 2- turn off the computer 3- Connect the TB device and switch it on 4- wait few seconds and turn on the computer Obviously if you do not have a dock like me you have two choices: - Use the SSDT V1 or V2 and deactivate the sleep if you are having problems - Wait for new developments Quote @lelet I'm upset: my Asus TBEX3 stopped working at startup yesterday: I think, something in the PCB is "dead ": so I ordered a new one today and maybe I'll take delivery tomorrow. Strange problem: the first time in twelve years of experience in PC hardware a component is "burned" so quickly. To the next @Loloflat6 Apart this bad luck, you're still lucky, the TBEX is the only TB card (at least until now) that is recognized naturally by the system even without a THB_C cable o device connected at boot 1 Link to comment Share on other sites More sharing options...
jya Posted April 25, 2018 Share Posted April 25, 2018 OK. So after more play with the SSDT (copying so that device déclaration is almost identical to a real Mac pro) it now works with the THB cable disconnected. However, it doesn't work any differently than with it. I've had hotplug working before, it just doesn't survive a sleep. And USB-c doesn't work better either. Link to comment Share on other sites More sharing options...
zipb Posted April 25, 2018 Share Posted April 25, 2018 I adapted SSDT-TB3 Z270.aml for my Z170 with builtin TB3. When I have a look in ioreg, I see lots of extra PCI bridge stuff and no proper TB... I also see extra PCI devices(with the wrong names) in "About This Mac..." Hot swap doesn't work, when I unplug my TB3 adapter my USB-C devices on the other (combo) port get kicked of too. Replugging doesn't do a thing. Attached devices survive sleep, and I can shut my hack down without reboot. Link to comment Share on other sites More sharing options...
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