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ASUS Z10PE-D8 WS DSDT disassemble and recompile


fluxus123
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Hi,

 

I just started tackling the ACPI of my board. I extracted the dsdt and 3x ssdt's both ways - 1. with the F4 option in clover and 2. with via the ubuntu firmware folder, but both ways return 12 errors upon compiling the lot with iasl -da *.aml v.5.1 and only 10 errors but a lot more warnings, remarks and optimisations when using RehabMan's OS X tuned version of Maciasl v6.1

 

attached are the files (both the original .aml and the disassembled .dsl files that I am struggling with). would be great if someone could shed some light as to how to eliminate those errors.

 

Also, I don't know where Maciasl keeps a log or how to print the log it generates in app to file, so attached 2 screenshots of the summary screen. I suppose I could run it in terminal to get a better log, but guessing if anyone here is able to help they would run it through the compiler anyway. 

 

Thanks a lot in advance!

 

 

Archive.zip

post-1823610-0-07417400-1484308871_thumb.png

post-1823610-0-00955800-1484308880_thumb.png

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hello

 

0 error

 

attachicon.gifArchive.zip

 

attachicon.gifCaptura de ecrã 2017-01-13, às 13.59.51.png

 

i don't see any error in the ssdt

 

 

good hack

Hey Artur,

 

thanks for your reply and for checking! 

 

 

I noticed you attached your DSDT.aml output to your message. Thanks! Unfortunately, when I double click it, it doesn't open. When trying from within Maciasl file>open it shows a blank document. Do you know what could be wrong here? Also, are the external SSDT's not required anymore once the DSDT.aml is re-compiled? i.e., only need the DSDT in my patched folder and none of the SSDTs?

 

While it would have been great to be able to use your result and just get on with it, I am keen to try to get the same result as you and trying to find out where i could have gone wrong. Could you please specify whether you compiled the DSDT from my .dsl file within Maciasl (i.e. load dsdt.dsl>press compile>save>done), or whether you've gone through the whole process of disassembling the extracted original DSDT.aml with reference to the 3 external SSDT*.aml and then recompiled from your own DSDT.dsl output?

 

I noticed in your screenshot you are using an iasl6.1 binary from 20160409. The iasl6.1 I used is 20161222 and the only other iasl6.1 I have is 20160422, both of which are from RM's fork of Intels iasl. Do you think it has to do with the version? 

 

Looking forward to hearing from you again and thanks a lot again for your help! 

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maybe is the iasl ..

 

but is from rehab fork ..

 

 

I think it has to do with the version.

 

How come in your latest compile your version says 20160422 like mine? In mine I get 8 errors. Have you just compiled with that version and did it return no errors as well?

 

your compile in your first post shows a iasl version of 20160409? I can't find that one on his fork, only the latest, which is 20161222?

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:)

Hey MaLd0n,

 

thanks a lot for that! I downloaded and had the same problem I had with Artur's - it wouldn't open!! Then realised that my Maciasl in apps only supports 4 5.0A and 5.1 and the other Maciasl app from the RM fork that supports 4 and 6.1 is not the one that opens when double clicking a file. Now opened RM's and went via file>open>dsdt.aml and TADA!!! it opens!! 

 

Now, I am still curious to find out why I can disassemble perfectly fine with iasl51 & iasl61 but when it comes to compiling I get between 8-12 errors depending on what version of iasl I use. So frustrating! When I now start to patch the DSDT output I will probably run again into errors where there shouldn't be any (at least not for other people's versions)

 

Finally, I was wondering what happens to the SSDT.dsl files after the DSDT.aml has been compiled. Can they go in the bin? Or do they need compiling as well? Does the whole lot then go to the patched folder or just DSDT (in case SSDT's get binned).

 

THX for clarifying and sorry for all the questions. It's a bit of a jungle this whole ACPI business

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OK, all solved, well, at least full sound (Realtek1050), graphics + HDMI and graphics cards recognised under PCI in About this mac section and not just under Graphics/Displays.

 

Way to do it was to use iasl4 for first compile (0 errors) and then moved on to iasl61 for the AMI clean patch, ALZA>HDEF,  BRA3A>PEGP and BRA2A>PEG1 edits under PCI0 with additional H000 and H001 edits (changed to GFX0(1) and HDAU along with some _DSM methods etc). 

 

If anyone with the same board is interested in my patched DSDT let me know. 

 

Credits to toleda and the world wide web!

 

Next up: PM & Sleep (latter will keep me awake) :)

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What ur chipset, bro?

 

PM

run in terminal

curl -o ~/ssdtPRGen.sh https://raw.githubusercontent.com/Piker-Alpha/ssdtPRGen.sh/master/ssdtPRGen.sh
chmod +x ~/ssdtPRGen.sh
sudo ~/ssdtPRGen.sh

if u use overclock

sudo ~/ssdtPRGen.sh -turbo 4000 <--high frequency
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What ur chipset, bro?

 

PM

run in terminal

curl -o ~/ssdtPRGen.sh https://raw.githubusercontent.com/Piker-Alpha/ssdtPRGen.sh/master/ssdtPRGen.sh
chmod +x ~/ssdtPRGen.sh
sudo ~/ssdtPRGen.sh

if u use overclock

sudo ~/ssdtPRGen.sh -turbo 4000 <--high frequency

 

ssdtPRGen is literally what I started using today and ran straight into issues...

 

System information: Mac OS X 10.12 (16A323)

Brandstring 'Genuine Intel® CPU @ 2.00GHz'

 

Error: Unknown processor model ...

       Visit http://ark.intel.comto gather the required data:

       Processor Number

       TDP

       Low Frequency Mode (use AppleIntelInfo.kext)

       Base Frequency

       Max Turbo Frequency

       Cores

       Threads

Aborting ...

Done.

 
 
It's supposed to be a Haswell-EP v3 2658 12C @ 2.2Ghz (0x306F2). Shows up in BIOS as 0x306F1 however, which makes sense, as it's an ES version and not a ES2 (i.e. pre-QS).
 
Would that explain why it's running at 2Ghz instead of the 2.2Ghz? Do Intel put a throttle on their ES versions?
 
Also tried to use AppleIntelinfo.kext, but must have done something wrong along the way as ended up with an empty kext on my desktop and not sure what to do with it, lol. I am guessing from the shell output that there is a way to manually define all the info that ssdtPRGen wants? Or does the ES make it impossible to set up PM and sleep properly?
 
Also I have attached the cpuinfo.txt file from the darwin dump if that's any good?

cpuinfo.txt

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OK, so realised AppleIntelInfo.kext was empty because I forgot the -R when I set ownership/perissions and it turned the contents invisible due to wrong permission settings. After solving this I moved on to loading it. Got me into a right mess (KP) loaded with kextutil -I -v 6 to see what was happening and where... looked all like gobbledygook. Found a statement by Piker-Alpha that suggested turning off logMSRs. After that the kext loaded into the kernel, but when running 

 

sudo cat /tmp/AppleIntelInfo.dat 

 

I get 

 

cat:/tmp/AppleIntelInfo.dat: No such file or directory

 

:pyth: 

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the output is

AppleIntelInfo.kext v2.0 Copyright © 2012-2016 Pike R. Alpha. All rights reserved
enableHWP................................: 0

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1

Warning: Clover hw.busfrequency error detected : 17d78400
InitialTSC...............................: 0x5167534f37b2 (2712 MHz)
MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel(R) Core(TM) i7-5820K CPU @ 3.30GHz

Processor Signature..................... : 0x306F2
------------------------------------------
 - Family............................... : 6
 - Stepping............................. : 2
 - Model................................ : 0x3F (63)

Model Specific Registers (MSRs)
------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35)  : 0xFFFFFF803EC50200
------------------------------------------
 - Core Count........................... : 6
 - Thread Count......................... : 12

MSR_PLATFORM_INFO................(0xCE)  : 0x80C3BF3812100
------------------------------------------
 - Maximum Non-Turbo Ratio.............. : 0x21 (3300 MHz)
 - Ratio Limit for Turbo Mode........... : 1 (programmable)
 - TDP Limit for Turbo Mode............. : 1 (programmable)
 - Low Power Mode Support............... : 1 (LPM supported)
 - Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
 - Maximum Efficiency Ratio............. : 12
 - Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x3
------------------------------------------
 - I/O MWAIT Redirection Enable......... : 0 (not enabled)
 - CFG Lock............................. : 0 (MSR not locked)
 - C3 State Auto Demotion............... : 0 (disabled/unsupported)
 - C1 State Auto Demotion............... : 0 (disabled/unsupported)
 - C3 State Undemotion.................. : 0 (disabled/unsupported)
 - C1 State Undemotion.................. : 0 (disabled/unsupported)
 - Package C-State Auto Demotion........ : 0 (disabled/unsupported)
 - Package C-State Undemotion........... : 0 (disabled/unsupported)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x0
 - C-state Range........................ : 0 (C-States not included, I/O MWAIT redirection not enabled)

IA32_MPERF.......................(0xE7)  : 0x2F067873EC
IA32_APERF.......................(0xE8)  : 0x3413EBC151

MSR_FLEX_RATIO...................(0x194) : 0xE0000

MSR_IA32_PERF_STATUS.............(0x198) : 0x265A00002800
------------------------------------------
 - Current Performance State Value...... : 0x2800 (4000 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0xFF00
------------------------------------------
 - Target performance State Value....... : 0xFF00 (25500 MHz)
 - Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0

IA32_THERM_INTERRUPT.............(0x19B) : 0x0

IA32_THERM_STATUS................(0x19C) : 0x88350000
------------------------------------------
 - Thermal Status....................... : 0
 - Thermal Log.......................... : 0
 - PROCHOT # or FORCEPR# event.......... : 0
 - PROCHOT # or FORCEPR# log............ : 0
 - Critical Temperature Status.......... : 0
 - Critical Temperature log............. : 0
 - Thermal Threshold #1 Status.......... : 0
 - Thermal Threshold #1 log............. : 0
 - Thermal Threshold #2 Status.......... : 0
 - Thermal Threshold #2 log............. : 0
 - Power Limitation Status.............. : 0
 - Power Limitation log................. : 0
 - Current Limit Status................. : 0
 - Current Limit log.................... : 0
 - Cross Domain Limit Status............ : 0
 - Cross Domain Limit log............... : 0
 - Digital Readout...................... : 53
 - Resolution in Degrees Celsius........ : 1
 - Reading Valid........................ : 1 (valid)

MSR_THERM2_CTL...................(0x19D) : 0x0

IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
 - Fast-Strings......................... : 1 (enabled)
 - FOPCODE compatibility mode Enable.... : 0
 - Automatic Thermal Control Circuit.... : 1 (enabled)
 - Split-lock Disable................... : 0
 - Performance Monitoring............... : 1 (available)
 - Bus Lock On Cache Line Splits Disable : 0
 - Hardware prefetch Disable............ : 0
 - Processor Event Based Sampling....... : 0 (PEBS supported)
 - GV1/2 legacy Enable.................. : 0
 - Enhanced Intel SpeedStep Technology.. : 1 (enabled)
 - MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
 - Adjacent sector prefetch Disable..... : 0
 - CFG Lock............................. : 0 (MSR not locked)
 - xTPR Message Disable................. : 1 (disabled)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x5E0A00
------------------------------------------
 - Turbo Attenuation Units.............. : 0 
 - Temperature Target................... : 94
 - TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x400000
------------------------------------------
 - EIST Hardware Coordination........... : 0 (hardware coordination enabled)
 - Energy/Performance Bias support...... : 1
 - Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
 - Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2222282828282828
------------------------------------------
 - Maximum Ratio Limit for C01.......... : 28 (4000 MHz) 
 - Maximum Ratio Limit for C02.......... : 28 (4000 MHz) 
 - Maximum Ratio Limit for C03.......... : 28 (4000 MHz) 
 - Maximum Ratio Limit for C04.......... : 28 (4000 MHz) 
 - Maximum Ratio Limit for C05.......... : 28 (4000 MHz) 
 - Maximum Ratio Limit for C06.......... : 28 (4000 MHz) 

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x5
------------------------------------------
 - Power Policy Preference...............: 5 (balanced performance and energy saving)

MSR_POWER_CTL....................(0x1FC) : 0x2104005B
------------------------------------------
 - Bi-Directional Processor Hot..........: 1 (enabled)
 - C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
 - Power Units.......................... : 3 (1/8 Watt)
 - Energy Status Units.................. : 14 (61 micro-Joules)
 - Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFD00014EA82
------------------------------------------
 - Package Power Limit #1............... : 3408 Watt
 - Enable Power Limit #1................ : 1 (enabled)
 - Package Clamping Limitation #1....... : 0 (disabled)
 - Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
 - Package Power Limit #2............... : 4090 Watt
 - Enable Power Limit #2................ : 1 (enabled)
 - Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
 - Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0x2E793EBC
------------------------------------------
 - Total Energy Consumed................ : 47588 Joules (Watt = Joules / seconds)

MSR_PKG_POWER_INFO...............(0x614) : 0x1280460
------------------------------------------
 - Thermal Spec Power................... : 140 Watt
 - Minimum Power........................ : 0
 - Maximum Power........................ : 0
 - Maximum Time Window.................. : 0

MSR_PP0_POWER_LIMIT..............(0x638) : 0x14FFD0
------------------------------------------
 - Power Limit.......................... : 4090 Watt
 - Enable Power Limit................... : 1 (enabled)
 - Clamping Limitation.................. : 0 (disabled)
 - Time Window for Power Limit.......... : 10 (10240 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PP0_ENERGY_STATUS............(0x639) : 0x0

MSR_TURBO_ACTIVATION_RATIO.......(0x64C) : 0x0

MSR_CONFIG_TDP_NOMINAL...........(0x648) : 0x21
MSR_CONFIG_TDP_LEVEL1............(0x649) : 0x940000001E0460
MSR_CONFIG_TDP_LEVEL2............(0x64a) : 0x94000000000000
MSR_CONFIG_TDP_CONTROL...........(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.......(0x64c) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x46F58611539
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0xBD8517AD694

IA32_TSC_DEADLINE................(0x6E0) : 0x51675809CA3A

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 33 (3300 MHz)
Maximum Turbo Ratio/Frequency............: 40 (4000 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ 32 (40) ]
CPU C6-Cores [ 1 2 4 6 8 10 ]
CPU P-States [ (12) 31 32 40 ]
CPU C6-Cores [ 1 2 3 4 5 6 7 8 9 10 11 ]
CPU P-States [ 12 31 32 37 (40) ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ]
CPU P-States [ (12) 31 32 37 38 40 ]
CPU P-States [ 12 31 32 36 37 38 (40) ]
CPU P-States [ 12 31 32 34 36 37 38 (40) ]
CPU P-States [ 12 31 32 33 34 36 37 38 (40) ]
CPU P-States [ (12) 29 31 32 33 34 36 37 38 40 ]
CPU P-States [ 12 29 31 32 33 34 35 36 37 38 (40) ]
CPU P-States [ (12) 29 30 31 32 33 34 35 36 37 38 40 ]
CPU P-States [ 12 29 30 31 32 33 34 35 36 37 38 39 (40) ]
CPU P-States [ 12 27 29 30 31 32 33 34 35 36 37 38 39 (40) ]
CPU P-States [ (12) 27 28 29 30 31 32 33 34 35 36 37 38 39 40 ]

compile kext and use .command

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Thanks, I only attached the terminal output to show that kextutil verbose mode tells me it's loaded, so does kextstat - the kext is right at the bottom of the list and shows as loaded.

 

Now, just to clarify all my steps I did:

 

1.downloaded project

2.compiled using Xcode for "running" platform, no compiling errors

3.retrieved kext from debug folder and put on desktop

4.changed permissions of kext using terminal

   - sudo -s

   - chmod -R 755 /Users/Desktop/AppleIntelInfo.kext

   - chown -R root:wheel /Users/Desktop/AppleIntelInfo.kext

5.loading kext in terminal

   - kextload AppleIntelInfo.kext

6.check to see if loaded using kextstat shows kext loaded and present in list of kexts

7.Trying to retrieving Output using terminal

   - cat /tmp/AppleIntelInfo.dat (this is all still in Bash by the way in case you are wondering why I am not prefixing with sudo)

 

Returns following in terminal:

 

cat:/tmp/AppleIntelInfo.dat: No such file or directory

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Hi,

 

had a look at the command. I ran the ownership and permission commands on the kext. That's not the problem I think as otherwise it wouldn't load the kext. It does load the kext just fine (well, with logMSRs disabled as otherwise KP), it's just that it doesn't seem to generate the .dat file :(

 

IOREG attached

Mac Pro IOREG.zip

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u need a dsdt or clover patches

if u can, extract in system with maciasl and post here, i apply patches

 

lpc etc dont load

 

for native pm

 

try it

attachicon.gifssdtPRGen.command.zip

just 2 clicks and wait

AH! you are right! kextstat shows AppleLPC is not loaded. Turned out I didn't use my updated DSDT with DTGP method included.

 

Now AppleLPC kext loads and attaches to LPC controller (see screenshot)

 

still having the same error though when running ssdtPRgen (see screenshot)

 

and still having the same error when trying to get the output from AppleIntelInfo.kext (saying directory does not exist)

 

 

I have attached my DSDT as well in case you see any errors?

 

 

Thanks!

DSDT copy.zip

post-1823610-0-40821200-1485264777_thumb.png

post-1823610-0-07228800-1485264787_thumb.png

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tried to get LPC controller working by patching the AppleLPC.kext OTF replacing 8086:1e44 with 8086:8d44 with following snippet:

 

<dict>

    <key>Comment</key>
    <string>Inject PCI ID for LPC</string>
    <key>Disabled</key>
    <false/>
    <key>Name</key>
    <string>AppleLPC</string>
    <key>InfoPlistPatch</key>
    <true/>
    <key>Find</key>
    <data>PHN0cmluZz5wY2k4MDg2LDFlNDQ8L3N0cmluZz4=</data>
    <key>Replace</key>
    <data>PHN0cmluZz5wY2k4MDg2LDhkNDQ8L3N0cmluZz4=</data>
</dict>
 
 
but it doesn't seem to work either. AppleLPC does not load. I can load it after boot in terminal but that doesn't do much, i.e. wouldn't attach to LPC0 device
 
I am not sure if th above is the right approach at all to this. Just trying to use my initiative LOL
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kexts need stay original, DSDT solve it

 

we need some tests

 

use it

attachicon.gifDSDT.fluxus123.zip

 

after reboot, send me a new ioreg

use it 

 

 

 

Just realised I didn't remove post #21 after editing post #20  - silly me. 

 

Please refer to post #20 re latest update......I have removed the "on the fly" kext patch from clover config.plist again, so AppleLPC should be back to vanilla

 

DSDT now contains DTGP method again, which prevented the FakeLPC from working. 

 

So now AppleLPC loads and attaches to controller during boot. Screenshot of IOReg confirms. Attached here is my new IOReg after reboot. 

Mac Pro,61.zip

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i apply all patches u need. lpc, usb, shutdown, irqs, etc

 

see ur pci devices in about this mac

 

dont remove dtgp and use last dsdt

 

post ur config.plist and full clover folder

 

what ur audio codec?

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i apply all patches u need. lpc, usb, shutdown, irqs, etc

 

see ur pci devices in about this mac

 

dont remove dtgp and use last dsdt

 

post ur config.plist and full clover folder

 

what ur audio codec?

 

IOReg after reboot with your edited DSDT is attached to post #23 -> MacPro6,1.zip ....sorry should have probably named it IOReg.zip  :D

 

I saw that I have the chipset and other bits showing under pci now. Thanks! Up to that point I only managed to patch DSDT to get my NVIDIA graphics display controller and some other mass storage controllers showing under pci.

 

USB? not sure what you edited/patched, but doesn't seem to have changed anything in profiler and or port configuration in IOReg?

Shutdown? I never had any shutdown issues?

LPC? is that the ALS0 device that is now used to fake a device with the right ID for AppleLPC to latch on?

IRQ? Is that what fixed the pci list to show C612 chipset?

 

 

I have ALC1150 codec... 

 

config attached.

 

Thanks!

config.plist.zip

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