Haswell E Powermanagement yet another option

Brumbaer · November 8, 2016

Don't know whether someone is still running a Haswell E, besides me.

CPU Powermanagment is one of the hurdles on the way to Sierra on a Haswell E.

Apple offers two CPU Powermanagement solutions, one is xcpm and the other the AppleIntelCPUManagement.kext.

Both will not work ootb with the 5960x, but there are good news, they do not crash the system either.

There ist the all you can patch solution from Piker Alpha. Which will get you xcpm.

There are two kind of patches. Those which patch data and those which patch program code. The first one is usually more resilient to version changes. If your patch renames a device called SKF345 under 10.25.1 you can assume that the device will still be called SKF345 under 10.25.2 and your patch will still be valid.

Programm code patches are more fragile. The commands might be compiled differently or might just have been moved and if the patch is also bound to a location, the patch will fail.

So after installing an update the probability that the patch will no longer work is greater than with a data patch.

And you will need different versions for El Cap and Sierra 10.2 and every further major version and probably every minor version as well.

Somebody more acquainted with those patches might tell you whether it is only a recommendation or a requirement to create a SSDT for the P-State Table.

I didn't try that option, it felt too "invasive".

If you do not use the patches, the system will run at fixed frequency and voltage wasting energy,

There is one simple way to save some of that and that is using C-States. Especially C1E comes to the rescue. When an processor is idle, it will cut the frequency to (in the case of the 5960x) 1200MHz.

When you look a a monitoring program this will look like real (read P-State) power management. It only looks like it, because the monitoring software will display averages over time and cores and so it will look like the cpu is running at multiple frequencies, but in fact it is running at 1200 or whatever your max. non-turbo frequency is, the steps in between are just "mathematical artefacts".

On my system it will not switch to turbo mode, I can force it to do so, by disabling EIST and setting TURBO Mode in the BIOS.

Now the Frequency will switch between 1200 and the turbo frequency.

Note that when you overclock your system using the multipliers, you will only change the turbo multiplier, so you will have to make sure that your system can switch to turbo mode.

This method has two major advantages,

If you can have turbo mode without EIST, it's easy to install and will most likely pass all updates until a major change in Apples CPU power management happens.
It's high performance. The latency is in the very low micro seconds, so switches will be very fast and this will result in good performance. The latency of an P-State solution is typically in the 10 to 100 millisecond range. That's 6000 to 60000 times slower,

The disadvantage being lower energy savings.

I used that option for two month and was content, mainly because I'm more interested in performance than maximum energy saving.

Still over time, I started to wonder whether it would be possible to have P-State support without all those patches.

So I wrote PmDrvr.kext.

You put it in the kexts/other folder of your Clover installation.

If you have NullCPUPowermanagement.kext installed, you can remove it.

In the BIOS you choose the options you would normally choose, that is turbo enabled, EIST enabled, and C-States as you prefer, which usually means enabled.

The kext will implement P-States. It uses the turbo frequency set in the cpu register by the BIOS, ignoring any SSDTs. So you do not have to worry about that.

If you have to put a number to it it will use Turbo Multiplier - 11 different P-States.

It's easy to install and should survive all updates until a major change in CPU power management happens.

It is slower than the last method, because the latency is larger, but the energy savings are higher.

I only tested it wth 5960x under Sierra it should work with other "Haswell E"s with more than 4 cores.

I check for an Haswell E, it will not work with other cpus or cpus with less than 5 cores. I do not have a Broadwell, but if there is interest I can prepare a version to test.

I only tested it under Sierra, but it can't see why it wouldn't work under El Cap. I will not hazard a guess whether it will work under Yosemite, that's just too far back for me to remember,

It only handles P-States, it doesn't address any other problems.

It is a replacement for NullCPUPowermanagement.kext.

Let me know if it works for you.

PMDrvr.kext.zip

Kudos to David Elliott, who wrote the NullCPUPowerManagement.kext, I used his way to disable AppleIntelCPUManagement.kext

AsusFreak · November 9, 2016

Thanks Brumbaer, nice to get low states (1200) back at idle. Also nice to not deal with all the Kernel patches. Using pmdrv.kext is still permitting sleep to work on the X99 box in my sig but once again cpu won't max after coming out of sleep. Any ideas? Thanks-

Brumbaer · November 9, 2016

What's "not max" in numbers ?

AsusFreak · November 9, 2016

After sleep, GB runs will no longer max cpu, loses 'bout 4000 point in GB score.

Brumbaer · November 9, 2016

Sorry, I wasn't exact enough. I was talking about frequencies.

Have you got a tool that shows the current frequency like Intel Power Gadget ?

When you run the CPU test in Cinebench, the frequency will max out. If you don't overclock that will be 3.7 GHz.

When you do the same after sleep it would be interesting to see what frequency it will max out at. I assume 3.5 GHz, but it would be good to be sure.

AsusFreak · November 9, 2016

^^ Yep but can't post any results as the box will no longer wake from sleep without re-booting... Same problem I always had using Null.

SammlerG · November 9, 2016

You solved the problem with the wrong P- and C-States!

I use your kext with xcpm and get all P-states and same low power consumption in idle.

No longer a jumping frequency.

I only use 2 additional patches.

First i enable EIST hardware coordination for correct msr settings (0x198/0x199) and another one for setting msr 0xE2.

Without EIST hardware coordination, i get very low (600MHz) states for Target performance State Value.

Perfect job!

EDIT: Sleep is working perfect too, GB scores are the same after sleep!

AppleIntelInfo.kext v1.8e Copyright © 2012-2016 Pike R. Alpha. All rights reserved

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0x529e435a282 (162 MHz)
MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel(R) Core(TM) i7-5930K CPU @ 3.50GHz

Processor Signature..................... : 0x306F2
------------------------------------------
 - Family............................... : 6
 - Stepping............................. : 2
 - Model................................ : 0x3F (63)

Model Specific Registers (MSRs)
------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35)  : 0xFFFFFF805AEE1100
------------------------------------------
 - Core Count........................... : 6
 - Thread Count......................... : 12

MSR_PLATFORM_INFO................(0xCE)  : 0x80C3BF3812300
------------------------------------------
 - Maximum Non-Turbo Ratio.............. : 0x23 (3500 MHz)
 - Ratio Limit for Turbo Mode........... : 1 (programmable)
 - TDP Limit for Turbo Mode............. : 1 (programmable)
 - Low Power Mode Support............... : 1 (LPM supported)
 - Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
 - Maximum Efficiency Ratio............. : 12
 - Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x7E000005
------------------------------------------
 - I/O MWAIT Redirection Enable......... : 0 (not enabled)
 - CFG Lock............................. : 0 (MSR not locked)
 - C3 State Auto Demotion............... : 1 (enabled)
 - C1 State Auto Demotion............... : 1 (enabled)
 - C3 State Undemotion.................. : 1 (enabled)
 - C1 State Undemotion.................. : 1 (enabled)
 - Package C-State Auto Demotion........ : 1 (enabled)
 - Package C-State Undemotion........... : 1 (enabled)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x10414
------------------------------------------
 - LVL_2 Base Address................... : 0x414
 - C-state Range........................ : 1 (C-States not included, I/O MWAIT redirection not enabled)

IA32_MPERF.......................(0xE7)  : 0xBA1974712
IA32_APERF.......................(0xE8)  : 0xC44FD4FBC

MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------

MSR_IA32_PERF_STATUS.............(0x198) : 0x23F300001700
------------------------------------------
 - Current Performance State Value...... : 0x1700 (2300 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0x1700
------------------------------------------
 - Target performance State Value....... : 0x1700 (2300 MHz)
 - Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0
IA32_THERM_STATUS................(0x19C) : 0x88450000

IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
 - Fast-Strings......................... : 1 (enabled)
 - Automatic Thermal Control Circuit.... : 1 (enabled)
 - Performance Monitoring............... : 1 (available)
 - Processor Event Based Sampling....... : 0 (PEBS supported)
 - Enhanced Intel SpeedStep Technology.. : 1 (enabled)
 - MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
 - CFG Lock............................. : 0 (MSR not locked)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x5F0A00
------------------------------------------
 - Turbo Attenuation Units.............. : 0 
 - Temperature Target................... : 95
 - TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x400000
------------------------------------------
 - EIST Hardware Coordination........... : 0 (hardware coordination enabled)
 - Energy/Performance Bias support...... : 1
 - Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
 - Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x24242E2E2E2E2F2F
------------------------------------------
 - Maximum Ratio Limit for C01.......... : 2F (4700 MHz) 
 - Maximum Ratio Limit for C02.......... : 2F (4700 MHz) 
 - Maximum Ratio Limit for C03.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C04.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C05.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C06.......... : 2E (4600 MHz) 

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x1
------------------------------------------
 - Power Policy Preference...............: 1 (highest performance)

MSR_POWER_CTL....................(0x1FC) : 0x2104005B
------------------------------------------
 - C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
 - Power Units.......................... : 3 (1/8 Watt)
 - Energy Status Units.................. : 14 (61 micro-Joules)
 - Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x6866800148556
------------------------------------------
 - Package Power Limit #1............... : 170 Watt
 - Enable Power Limit #1................ : 1 (enabled)
 - Package Clamping Limitation #1....... : 0 (disabled)
 - Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
 - Package Power Limit #2............... : 205 Watt
 - Enable Power Limit #2................ : 1 (enabled)
 - Package Clamping Limitation #2....... : 0 (disabled)
 - Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0xF4C864
------------------------------------------
 - Total Energy Consumed................ : 979 Joules (Watt = Joules / seconds)

MSR_PKG_POWER_INFO...............(0x614) : 0x1280460
------------------------------------------
 - Thermal Spec Power................... : 140 Watt
 - Minimum Power........................ : 0
 - Maximum Power........................ : 0
 - Maximum Time Window.................. : 0

MSR_PP0_POWER_LIMIT..............(0x638) : 0x148668
------------------------------------------
 - Power Limit.......................... : 205 Watt
 - Enable Power Limit................... : 1 (enabled)
 - Clamping Limitation.................. : 0 (disabled)
 - Time Window for Power Limit.......... : 10 (10240 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PP0_ENERGY_STATUS............(0x639) : 0x0

MSR_TURBO_ACTIVATION_RATIO.......(0x64C) : 0x0

MSR_CONFIG_TDP_NOMINAL...........(0x648) : 0x23
MSR_CONFIG_TDP_LEVEL1............(0x649) : 0x94000000200460
MSR_CONFIG_TDP_LEVEL2............(0x64a) : 0x94000000000000
MSR_CONFIG_TDP_CONTROL...........(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.......(0x64c) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x124FDF6252
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x0
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x124FDF2A8A

IA32_TSC_DEADLINE................(0x6E0) : 0x529E7D70741

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 35 (3500 MHz)
Maximum Turbo Ratio/Frequency............: 47 (4700 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ (12) 34 46 ]
CPU C3-Cores [ 1 3 ]
CPU C6-Cores [ 0 2 4 6 8 10 ]
CPU P-States [ (12) 17 34 46 ]
CPU P-States [ (12) 17 34 37 46 ]
CPU C3-Cores [ 0 1 2 3 ]
CPU P-States [ (12) 16 17 34 37 46 ]
CPU P-States [ (12) 16 17 21 34 37 46 ]
CPU P-States [ 12 14 16 17 21 34 (35) 37 46 ]
CPU P-States [ (12) 14 16 17 20 21 34 35 37 46 ]
CPU C6-Cores [ 0 2 4 6 7 8 10 ]
CPU P-States [ 12 14 16 17 20 21 (23) 34 35 37 46 ]
CPU C6-Cores [ 0 1 2 3 4 6 7 8 10 ]
CPU P-States [ (12) 14 16 17 20 21 23 31 34 35 37 46 ]
CPU P-States [ (12) 14 16 17 20 21 23 31 34 35 36 37 46 ]
CPU P-States [ (12) 14 16 17 20 21 23 24 31 34 35 36 37 46 ]
CPU P-States [ (12) 14 16 17 19 20 21 23 24 31 34 35 36 37 46 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 10 ]
CPU P-States [ (12) 14 16 17 19 20 21 22 23 24 31 34 35 36 37 46 ]
CPU P-States [ (12) 14 16 17 18 19 20 21 22 23 24 31 34 35 36 37 46 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 10 11 ]
CPU P-States [ (12) 13 14 16 17 18 19 20 21 22 23 24 31 34 35 36 37 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 31 34 35 36 37 46 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 26 31 34 35 36 37 46 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 (23) 24 26 31 34 35 36 37 40 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 26 30 31 34 35 36 37 40 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 26 30 31 32 34 35 36 37 40 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 30 31 32 34 35 36 37 40 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 29 30 31 32 34 35 36 37 40 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 29 30 31 32 33 34 35 36 37 40 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 30 31 32 33 34 35 36 37 40 46 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 30 31 32 33 34 35 36 37 40 46 (47) ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 30 31 32 33 34 35 36 37 40 42 46 47 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 (35) 36 37 40 42 46 47 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 39 40 42 (46) 47 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 39 40 42 45 (46) 47 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 39 40 42 44 45 (46) 47 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 39 40 42 43 44 45 46 47 ]
CPU C3-Cores [ 0 1 2 3 11 ]
CPU C3-Cores [ 0 1 2 3 10 11 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 42 43 44 45 (46) 47 ]
CPU C3-Cores [ 0 1 2 3 6 8 10 11 ]
CPU C3-Cores [ 0 1 2 3 4 6 8 10 11 ]
CPU C3-Cores [ 0 1 2 3 4 6 8 9 10 11 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 8 9 10 11 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 (46) 47 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ]

darthsian · November 9, 2016

I only tested it wth 5960x under Sierra it should work with other "Haswell E"s with more than 4 cores.

I check for an Haswell E, it will not work with other cpus or cpus with less than 5 cores. I do not have a Broadwell, but if there is interest I can prepare a version to test.

Hi Brumbaer, great job. Can you prepare version for Broadwell-E? I have 6900K processor, so i can test it. Thanks.

You solved the problem with the wrong P- and C-States!

I use your kext with xcpm and get all P-states and same low power consumption in idle.

No longer a jumping frequency.

I only use 2 additional patches.

First i enable EIST hardware coordination for correct msr settings (0x198/0x199) and another one for setting msr 0xE2.

Without EIST hardware coordination, i get very low (600MHz) states for Target performance State Value.

Perfect job!

EDIT: Sleep is working perfect too, GB scores are the same after sleep!

Hello SammlerG, can you share with me your config with patches you are using with this Brumbaer kext? Thanks.

AsusFreak · November 9, 2016

Using these patches (thanks Pike and SammlerG):

			<dict>
				<key>Comment</key>
				<string>xcpm_bootstrap Sierra</string>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				g8PEg/si
				</data>
				<key>Replace</key>
				<data>
				g8PBg/si
				</data>
			</dict>
			<dict>
				<key>Comment</key>
				<string>SammlerG Sierra xcpm MSR Patch 3 / xcpm support Pike R. Alpha</string>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				OgYAANwzAAAAAAAAAAAAAB8AAAAAAAAAAAAAAAAAAAAA
				AAAAAAAAAAAAAAAAAAAA
				</data>
				<key>Replace</key>
				<data>
				OgYAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
				AAAAAAAAAAAAAAAAAAAA
				</data>
			</dict>
			<dict>
				<key>Comment</key>
				<string>SammlerG Sierra xcpm MSR Patch 1 / xcpm support Pike R. Alpha</string>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				qgEAANwzAAAAAAAAAAAAAAAAAAAAAAAAAQ==
				</data>
				<key>Replace</key>
				<data>
				qgEAANwzAAAAAAAAAAAAAAAAAAAAAAAAAA==
				</data>
			</dict>
			<dict>
				<key>Comment</key>
				<string>SammlerG Sierra xcpm MSR Patch 5 / xcpm support Pike R. Alpha</string>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				4gAAAEwAAAAAAAAAAAAAAA8EAAAAAAAABQAAHg==
				</data>
				<key>Replace</key>
				<data>
				4gAAAEwAAAAAAAAAAAAAAA8EAAAAAAAABQAAfg==
				</data>
			</dict>
			<dict>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				idjB4Ai5mQE=
				</data>
				<key>Replace</key>
				<data>
				uAAvAAC5mQE=
				</data>
			</dict>
			<dict>
				<key>Comment</key>
				<string>_cpuid_set_info Sierra</string>
				<key>Disabled</key>
				<true/>
				<key>Find</key>
				<data>
				D7bEg8Dpg/hH
				</data>
				<key>Replace</key>
				<data>
				D7bEg8Dmg/hH
				</data>
			</dict>
			<dict>
				<key>Disabled</key>
				<false/>
				<key>Find</key>
				<data>
				QgYAANwzAAAAAAAAAAAAAB8AAAAAAAAAGAAAAAAAAAAA
				AAAAAAAAAAAAAAAAAAAA
				</data>
				<key>Replace</key>
				<data>
				QgYAAAAAAAAAAAAAAAAAAB8AAAAAAAAAGAAAAAAAAAAA
				AAAAAAAAAAAAAAAAAAAA
				</data>
			</dict>

and PMDrvr.kext sleep works fine and no difference on benchies before or after wake from sleep. The up side is lower P-states on idle. I'll post some screenshots shortly but was hoping to eliminate some of these kernel patches.

If I blow out the patches sleep doesn't work...

SammlerG · November 9, 2016

Benchmarks are fine, but i noticed some performance lost when single core Apps running.

Exporting PDFs from InDesign is slower when this kext is installed. InDesign CC program code is not the best...

I got max. performance without xcpm and the new kext, but no C-States and high power consumption at idle. Export time 1m 51sec

Old patches with xcpm, export time is 1m 54 sec.

The new patch with xcpm is from 2m 04sec to 2m 25sec. I can see that the CPU don´t stay at max. when a single core App is running, it drops very quick and fast down to x12.

When this kext is installed, i read out msr target 0x199 with 600mhz, it should be min. 1200?

Can you change this, and is it possible to optimize this kext?

Brumbaer · November 9, 2016

@darthsian

see file attached

PMDrvr.kext.zip

@SammlerG

If you run without patches and kext, you should see frequency jumping if you have C1E in BIOS enabled.

I'm confused about the kext/xcpm thing. Do you run them together ?

This was never meant to run together with xcpm. Worst case they fight each other.

If you run it without xcpm(patches) what will happen ?

C-States ? Yes/No

P-States ? Yes/No

Performance slow in Single Thread ?

Performance slow always ?

SammlerG · November 9, 2016

yes, i did a test with both, the kext and the xcpm patches.

And with only the kext, no FakeCpuId, no xcpm patches.

When i use only PMDrvr.kext without xcpm, i get best performance, but no C-States. Only P-States.

CPU idles down to x12, but temps are higher and more power consumption.

Same as NullCpuPm but no jumping frequency

Brumbaer · November 9, 2016

I do not touch C-States or any C-State related msr.

So this begs the question whether C-States are enabled in BIOS and if so, if you switch them off with some other option or if something goes awry.

What are the values of MSR 1FC (C1E enable) and MSR E2 (C-State control) ?

nmano · November 9, 2016

I try your kext without XCPM

Thank you for your hardworking get nice kext.

Last login: Wed Nov  9 08:43:55 on console
manoranjans-Pro:~ manoranjan$ sudo chown -R root:wheel /Users/manoranjan/Desktop/AppleIntelInfo.kext 
Password:
manoranjans-Pro:~ manoranjan$ sudo chmod -R 755 /Users/manoranjan/Desktop/AppleIntelInfo.kext 
manoranjans-Pro:~ manoranjan$ sudo kextload /Users/manoranjan/Desktop/AppleIntelInfo.kext 
manoranjans-Pro:~ manoranjan$ sudo cat /tmp/AppleIntelInfo.dat

AppleIntelInfo.kext v1.8e Copyright © 2012-2016 Pike R. Alpha. All rights reserved

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0xed22db1ba0 (33 MHz)
MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel(R) Core(TM) i7-5960X CPU @ 3.00GHz

Processor Signature..................... : 0x306F2
------------------------------------------
 - Family............................... : 6
 - Stepping............................. : 2
 - Model................................ : 0x3F (63)

Model Specific Registers (MSRs)
------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35)  : 0xFFFFFF8059BD0A00
------------------------------------------
 - Core Count........................... : 8
 - Thread Count......................... : 16

MSR_PLATFORM_INFO................(0xCE)  : 0x80C3BF3811E00
------------------------------------------
 - Maximum Non-Turbo Ratio.............. : 0x1E (3000 MHz)
 - Ratio Limit for Turbo Mode........... : 1 (programmable)
 - TDP Limit for Turbo Mode............. : 1 (programmable)
 - Low Power Mode Support............... : 1 (LPM supported)
 - Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
 - Maximum Efficiency Ratio............. : 12
 - Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x403
------------------------------------------
 - I/O MWAIT Redirection Enable......... : 1 (enabled, IO read of MSR(0xE4) mapped to MWAIT)
 - CFG Lock............................. : 0 (MSR not locked)
 - C3 State Auto Demotion............... : 0 (disabled/unsupported)
 - C1 State Auto Demotion............... : 0 (disabled/unsupported)
 - C3 State Undemotion.................. : 0 (disabled/unsupported)
 - C1 State Undemotion.................. : 0 (disabled/unsupported)
 - Package C-State Auto Demotion........ : 0 (disabled/unsupported)
 - Package C-State Undemotion........... : 0 (disabled/unsupported)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x10414
------------------------------------------
 - LVL_2 Base Address................... : 0x414
 - C-state Range........................ : 1 (C6 is the max C-State to include)

IA32_MPERF.......................(0xE7)  : 0x48AABA3454
IA32_APERF.......................(0xE8)  : 0x56FF6AB34D

MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------

MSR_IA32_PERF_STATUS.............(0x198) : 0x280900002B00
------------------------------------------
 - Current Performance State Value...... : 0x2B00 (4300 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0x2E00
------------------------------------------
 - Target performance State Value....... : 0x2E00 (4600 MHz)
 - Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0
IA32_THERM_STATUS................(0x19C) : 0x88310000

IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
 - Fast-Strings......................... : 1 (enabled)
 - Automatic Thermal Control Circuit.... : 1 (enabled)
 - Performance Monitoring............... : 1 (available)
 - Processor Event Based Sampling....... : 0 (PEBS supported)
 - Enhanced Intel SpeedStep Technology.. : 1 (enabled)
 - MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
 - CFG Lock............................. : 0 (MSR not locked)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x591200
------------------------------------------
 - Turbo Attenuation Units.............. : 0 
 - Temperature Target................... : 89
 - TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x400000
------------------------------------------
 - EIST Hardware Coordination........... : 0 (hardware coordination enabled)
 - Energy/Performance Bias support...... : 1
 - Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
 - Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2B2B2B2B2B2B2B2E
------------------------------------------
 - Maximum Ratio Limit for C01.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C02.......... : 2B (4300 MHz) 
 - Maximum Ratio Limit for C03.......... : 2B (4300 MHz) 
 - Maximum Ratio Limit for C04.......... : 2B (4300 MHz) 
 - Maximum Ratio Limit for C05.......... : 2B (4300 MHz) 
 - Maximum Ratio Limit for C06.......... : 2B (4300 MHz) 
 - Maximum Ratio Limit for C07.......... : 2B (4300 MHz) 
 - Maximum Ratio Limit for C08.......... : 2B (4300 MHz) 

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x0

MSR_POWER_CTL....................(0x1FC) : 0x2104005B
------------------------------------------
 - C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
 - Power Units.......................... : 3 (1/8 Watt)
 - Energy Status Units.................. : 14 (61 micro-Joules)
 - Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFD00014EA82
------------------------------------------
 - Package Power Limit #1............... : 3408 Watt
 - Enable Power Limit #1................ : 1 (enabled)
 - Package Clamping Limitation #1....... : 0 (disabled)
 - Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
 - Package Power Limit #2............... : 4090 Watt
 - Enable Power Limit #2................ : 1 (enabled)
 - Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
 - Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0xA4B81BF
------------------------------------------
 - Total Energy Consumed................ : 10542 Joules (Watt = Joules / seconds)

MSR_PKG_POWER_INFO...............(0x614) : 0x1280460
------------------------------------------
 - Thermal Spec Power................... : 140 Watt
 - Minimum Power........................ : 0
 - Maximum Power........................ : 0
 - Maximum Time Window.................. : 0

MSR_PP0_POWER_LIMIT..............(0x638) : 0x14FFD0
------------------------------------------
 - Power Limit.......................... : 4090 Watt
 - Enable Power Limit................... : 1 (enabled)
 - Clamping Limitation.................. : 0 (disabled)
 - Time Window for Power Limit.......... : 10 (10240 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PP0_ENERGY_STATUS............(0x639) : 0x0

MSR_TURBO_ACTIVATION_RATIO.......(0x64C) : 0x0

MSR_CONFIG_TDP_NOMINAL...........(0x648) : 0x1E
MSR_CONFIG_TDP_LEVEL1............(0x649) : 0x940000001B0460
MSR_CONFIG_TDP_LEVEL2............(0x64a) : 0x94000000000000
MSR_CONFIG_TDP_CONTROL...........(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.......(0x64c) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x0
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x0

IA32_TSC_DEADLINE................(0x6E0) : 0xED261649CE

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 30 (3000 MHz)
Maximum Turbo Ratio/Frequency............: 46 (4600 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ (12) 40 43 ]
CPU P-States [ (12) 36 40 43 ]
CPU P-States [ (12) 36 40 43 ]
CPU P-States [ (12) 16 36 40 43 ]
CPU P-States [ (12) 13 16 36 40 43 ]
CPU P-States [ 12 13 16 (24) 36 40 43 ]
CPU P-States [ (12) 13 16 17 24 36 40 43 ]
CPU P-States [ (12) 13 15 16 17 24 36 40 43 ]
manoranjans-Pro:~ manoranjan$

Enable & Disable patches I test Gigabyte board.

EIST

C1E

Thermal Monitor

E2

config.plist.zip

SammlerG · November 9, 2016

AppleIntelInfo.kext v1.8e Copyright © 2012-2016 Pike R. Alpha. All rights reserved

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0x8de78b83e53 (278 MHz)
MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel(R) Core(TM) i7-5930K CPU @ 3.50GHz

Processor Signature..................... : 0x306F2
------------------------------------------
 - Family............................... : 6
 - Stepping............................. : 2
 - Model................................ : 0x3F (63)

Model Specific Registers (MSRs)
------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35)  : 0xFFFFFF805DAB4A00
------------------------------------------
 - Core Count........................... : 6
 - Thread Count......................... : 12

MSR_PLATFORM_INFO................(0xCE)  : 0x80C3BF3812300
------------------------------------------
 - Maximum Non-Turbo Ratio.............. : 0x23 (3500 MHz)
 - Ratio Limit for Turbo Mode........... : 1 (programmable)
 - TDP Limit for Turbo Mode............. : 1 (programmable)
 - Low Power Mode Support............... : 1 (LPM supported)
 - Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
 - Maximum Efficiency Ratio............. : 12
 - Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x403
------------------------------------------
 - I/O MWAIT Redirection Enable......... : 1 (enabled, IO read of MSR(0xE4) mapped to MWAIT)
 - CFG Lock............................. : 0 (MSR not locked)
 - C3 State Auto Demotion............... : 0 (disabled/unsupported)
 - C1 State Auto Demotion............... : 0 (disabled/unsupported)
 - C3 State Undemotion.................. : 0 (disabled/unsupported)
 - C1 State Undemotion.................. : 0 (disabled/unsupported)
 - Package C-State Auto Demotion........ : 0 (disabled/unsupported)
 - Package C-State Undemotion........... : 0 (disabled/unsupported)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x10414
------------------------------------------
 - LVL_2 Base Address................... : 0x414
 - C-state Range........................ : 1 (C6 is the max C-State to include)

IA32_MPERF.......................(0xE7)  : 0xA8AD560D6
IA32_APERF.......................(0xE8)  : 0xBB2FEF828

MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------

MSR_IA32_PERF_STATUS.............(0x198) : 0x2A1C00002E00
------------------------------------------
 - Current Performance State Value...... : 0x2E00 (4600 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0x2F00
------------------------------------------
 - Target performance State Value....... : 0x2F00 (4700 MHz)
 - Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0
IA32_THERM_STATUS................(0x19C) : 0x88320000

IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
 - Fast-Strings......................... : 1 (enabled)
 - Automatic Thermal Control Circuit.... : 1 (enabled)
 - Performance Monitoring............... : 1 (available)
 - Processor Event Based Sampling....... : 0 (PEBS supported)
 - Enhanced Intel SpeedStep Technology.. : 1 (enabled)
 - MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
 - CFG Lock............................. : 0 (MSR not locked)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x5F0A00
------------------------------------------
 - Turbo Attenuation Units.............. : 0 
 - Temperature Target................... : 95
 - TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x400000
------------------------------------------
 - EIST Hardware Coordination........... : 0 (hardware coordination enabled)
 - Energy/Performance Bias support...... : 1
 - Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
 - Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x24242E2E2E2E2F2F
------------------------------------------
 - Maximum Ratio Limit for C01.......... : 2F (4700 MHz) 
 - Maximum Ratio Limit for C02.......... : 2F (4700 MHz) 
 - Maximum Ratio Limit for C03.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C04.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C05.......... : 2E (4600 MHz) 
 - Maximum Ratio Limit for C06.......... : 2E (4600 MHz) 

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x0

MSR_POWER_CTL....................(0x1FC) : 0x2104005B
------------------------------------------
 - C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
 - Power Units.......................... : 3 (1/8 Watt)
 - Energy Status Units.................. : 14 (61 micro-Joules)
 - Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x6866800148556
------------------------------------------
 - Package Power Limit #1............... : 170 Watt
 - Enable Power Limit #1................ : 1 (enabled)
 - Package Clamping Limitation #1....... : 0 (disabled)
 - Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
 - Package Power Limit #2............... : 205 Watt
 - Enable Power Limit #2................ : 1 (enabled)
 - Package Clamping Limitation #2....... : 0 (disabled)
 - Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0x19D3874
------------------------------------------
 - Total Energy Consumed................ : 1652 Joules (Watt = Joules / seconds)

MSR_PKG_POWER_INFO...............(0x614) : 0x1280460
------------------------------------------
 - Thermal Spec Power................... : 140 Watt
 - Minimum Power........................ : 0
 - Maximum Power........................ : 0
 - Maximum Time Window.................. : 0

MSR_PP0_POWER_LIMIT..............(0x638) : 0x148668
------------------------------------------
 - Power Limit.......................... : 205 Watt
 - Enable Power Limit................... : 1 (enabled)
 - Clamping Limitation.................. : 0 (disabled)
 - Time Window for Power Limit.......... : 10 (10240 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PP0_ENERGY_STATUS............(0x639) : 0x0

MSR_TURBO_ACTIVATION_RATIO.......(0x64C) : 0x0

MSR_CONFIG_TDP_NOMINAL...........(0x648) : 0x23
MSR_CONFIG_TDP_LEVEL1............(0x649) : 0x94000000200460
MSR_CONFIG_TDP_LEVEL2............(0x64a) : 0x94000000000000
MSR_CONFIG_TDP_CONTROL...........(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.......(0x64c) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x0
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x0

IA32_TSC_DEADLINE................(0x6E0) : 0x8DE7C6C1A8E

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 35 (3500 MHz)
Maximum Turbo Ratio/Frequency............: 47 (4700 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ (12) 39 46 ]
CPU P-States [ (12) 15 39 46 ]
CPU P-States [ (12) 13 15 39 46 ]
CPU P-States [ (12) 13 15 28 39 46 ]
CPU P-States [ (12) 13 15 22 28 39 46 ]
CPU P-States [ (12) 13 15 22 28 38 39 46 ]
CPU P-States [ (12) 13 15 20 22 28 38 39 46 ]
CPU P-States [ (12) 13 15 19 20 22 28 38 39 46 ]
CPU P-States [ 12 13 15 19 20 22 28 38 39 44 (46) ]
CPU P-States [ 12 13 15 19 20 22 28 38 39 43 44 (46) ]
CPU P-States [ 12 13 15 19 20 22 28 38 39 43 44 45 (46) ]
CPU P-States [ 12 13 15 19 20 22 24 28 38 39 43 44 45 (46) ]
CPU P-States [ 12 13 15 19 20 22 24 28 38 39 41 43 44 45 (46) ]
CPU P-States [ (12) 13 15 19 20 22 24 28 38 39 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 19 20 22 24 28 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 19 20 22 24 28 30 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 19 20 22 24 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 19 20 22 24 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 17 19 20 22 24 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 17 19 20 21 22 24 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 17 18 19 20 21 22 24 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 15 16 17 18 19 20 21 22 24 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 28 30 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 28 30 32 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 28 30 32 33 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 27 28 30 32 33 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 27 28 30 32 33 34 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 27 28 30 31 32 33 34 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 24 25 26 27 28 29 30 31 32 33 34 37 38 39 40 41 42 43 44 45 46 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 37 38 39 40 41 42 43 44 45 46 ]

I do not touch C-States or any C-State related msr.

So this begs the question whether C-States are enabled in BIOS and if so, if you switch them off with some other option or if something goes awry.

What are the values of MSR 1FC (C1E enable) and MSR E2 (C-State control) ?

C-States are enabled in Bios

With your kext, idle power is higher (2-3x) and temperature also.

Matthew82 · November 9, 2016

For 6850k looking good

Processor Brandstring....................: Intel® Core i7-6850K CPU @ 3.60GHz

Processor Signature..................... : 0x406F1

------------------------------------------

- Family............................... : 6

- Stepping............................. : 1

- Model................................ : 0x4F (79)

Model Specific Registers (MSRs)

------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35) : 0xFFFFFF80B10EFC00

------------------------------------------

- Core Count........................... : 6

- Thread Count......................... : 12

MSR_PLATFORM_INFO................(0xCE) : 0x20080C3BF3812400

------------------------------------------

- Maximum Non-Turbo Ratio.............. : 0x24 (3600 MHz)

- Ratio Limit for Turbo Mode........... : 1 (programmable)

- TDP Limit for Turbo Mode............. : 1 (programmable)

- Low Power Mode Support............... : 1 (LPM supported)

- Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)

- Maximum Efficiency Ratio............. : 12

- Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2) : 0x7E000007

------------------------------------------

- I/O MWAIT Redirection Enable......... : 0 (not enabled)

- CFG Lock............................. : 0 (MSR not locked)

- C3 State Auto Demotion............... : 1 (enabled)

- C1 State Auto Demotion............... : 1 (enabled)

- C3 State Undemotion.................. : 1 (enabled)

- C1 State Undemotion.................. : 1 (enabled)

- Package C-State Auto Demotion........ : 1 (enabled)

- Package C-State Undemotion........... : 1 (enabled)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4) : 0x10414

------------------------------------------

- LVL_2 Base Address................... : 0x414

- C-state Range........................ : 1 (C-States not included, I/O MWAIT redirection not enabled)

IA32_MPERF.......................(0xE7) : 0x132C67CD8B

IA32_APERF.......................(0xE8) : 0x13DFB6A528

MSR_0x150........................(0x150) : 0x0

MSR_FLEX_RATIO...................(0x194) : 0xE0000

------------------------------------------

MSR_IA32_PERF_STATUS.............(0x198) : 0x25FC00002400

------------------------------------------

- Current Performance State Value...... : 0x2400 (3600 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0x3000

------------------------------------------

- Target performance State Value....... : 0x3000 (4800 MHz)

- Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0

IA32_THERM_STATUS................(0x19C) : 0x882D0000

IA32_MISC_ENABLES................(0x1A0) : 0x850089

------------------------------------------

- Fast-Strings......................... : 1 (enabled)

- Automatic Thermal Control Circuit.... : 1 (enabled)

- Performance Monitoring............... : 1 (available)

- Processor Event Based Sampling....... : 0 (PEBS supported)

- Enhanced Intel SpeedStep Technology.. : 1 (enabled)

- MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)

- CFG Lock............................. : 0 (MSR not locked)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x520A00

------------------------------------------

- Turbo Attenuation Units.............. : 0

- Temperature Target................... : 82

- TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x402000

------------------------------------------

- EIST Hardware Coordination........... : 0 (hardware coordination enabled)

- Energy/Performance Bias support...... : 1

- Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)

- Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x25252C2C2C2C2C2C

------------------------------------------

- Maximum Ratio Limit for C01.......... : 2C (4400 MHz)

- Maximum Ratio Limit for C02.......... : 2C (4400 MHz)

- Maximum Ratio Limit for C03.......... : 2C (4400 MHz)

- Maximum Ratio Limit for C04.......... : 2C (4400 MHz)

- Maximum Ratio Limit for C05.......... : 2C (4400 MHz)

- Maximum Ratio Limit for C06.......... : 2C (4400 MHz)

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x5

------------------------------------------

- Power Policy Preference...............: 5 (balanced performance and energy saving)

MSR_POWER_CTL....................(0x1FC) : 0x2904005B

------------------------------------------

- C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03

------------------------------------------

- Power Units.......................... : 3 (1/8 Watt)

- Energy Status Units.................. : 14 (61 micro-Joules)

- Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFF80015FFF8

------------------------------------------

- Package Power Limit #1............... : 4095 Watt

- Enable Power Limit #1................ : 1 (enabled)

- Package Clamping Limitation #1....... : 1 (allow going below OS-requested P/T state during Time Window for Power Limit #1)

- Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)

- Package Power Limit #2............... : 4095 Watt

- Enable Power Limit #2................ : 1 (enabled)

- Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)

- Time Window for Power Limit #2....... : 3 (20 milli-Seconds)

- Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0xD971F

------------------------------------------

- Total Energy Consumed................ : 54 Joules (Watt = Joules / seconds)

MSR_PKG_POWER_INFO...............(0x614) : 0x1700460

------------------------------------------

- Thermal Spec Power................... : 140 Watt

- Minimum Power........................ : 0

- Maximum Power........................ : 0

- Maximum Time Window.................. : 0

MSR_PP0_POWER_LIMIT..............(0x638) : 0x0

MSR_PP0_ENERGY_STATUS............(0x639) : 0x0

MSR_TURBO_ACTIVATION_RATIO.......(0x64C) : 0x0

MSR_PKGC3_IRTL...................(0x60a) : 0x0

MSR_PKGC6_IRTL...................(0x60b) : 0x0

MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x34C11DF98

MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x7D997C

MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0xACB1065A8

IA32_TSC_DEADLINE................(0x6E0) : 0x5E867BFF5CCA

CPU Ratio Info:

------------------------------------------

Base Clock Frequency (BLCK)............. : 100 MHz

Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)

Maximum non-Turbo Ratio/Frequency........: 36 (3600 MHz)

Maximum Turbo Ratio/Frequency............: 44 (4400 MHz)

P-State ratio * 100 = Frequency in MHz

------------------------------------------

CPU P-States [ (12) 18 34 ]

CPU C3-Cores [ 1 2 10 ]

CPU C6-Cores [ 0 2 4 6 8 10 ]

CPU C3-Cores [ 1 2 4 6 8 10 ]

CPU P-States [ (12) 17 18 34 ]

CPU C3-Cores [ 0 1 2 4 6 8 10 ]

CPU C6-Cores [ 0 2 3 4 6 7 8 10 ]

CPU P-States [ 12 17 (18) 34 37 ]

CPU C3-Cores [ 0 1 2 4 6 7 8 10 ]

CPU P-States [ 12 17 18 20 34 (36) 37 ]

CPU C3-Cores [ 0 1 2 3 4 6 7 8 9 10 ]

CPU P-States [ (12) 17 18 20 24 34 36 37 ]

CPU C3-Cores [ 0 1 2 3 4 6 7 8 9 10 11 ]

CPU C6-Cores [ 0 1 2 3 4 6 7 8 10 ]

CPU P-States [ (12) 14 17 18 20 24 34 36 37 ]

CPU C6-Cores [ 0 1 2 3 4 6 7 8 10 11 ]

CPU P-States [ 12 14 17 (18) 20 23 24 34 36 37 ]

CPU P-States [ 12 14 17 18 19 20 23 24 34 (36) 37 ]

CPU C6-Cores [ 0 1 2 3 4 6 7 8 9 10 11 ]

CPU P-States [ (12) 14 17 18 19 20 23 24 29 34 36 37 ]

CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ]

CPU P-States [ (12) 14 17 18 19 20 23 24 29 32 34 36 37 ]

CPU P-States [ (12) 14 17 18 19 20 23 24 25 29 32 34 36 37 ]

CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ]

CPU P-States [ 12 14 17 18 19 20 21 23 24 25 29 32 34 (36) 37 ]

CPU P-States [ 12 14 17 18 19 20 21 23 24 25 28 29 32 34 (36) 37 ]

CPU P-States [ (12) 14 15 17 18 19 20 21 23 24 25 28 29 32 34 36 37 ]

CPU P-States [ (12) 14 15 17 18 19 20 21 23 24 25 28 29 32 34 36 37 40 ]

CPU P-States [ (12) 14 15 17 18 19 20 21 23 24 25 28 29 32 34 36 37 39 40 ]

CPU P-States [ 12 14 15 17 18 19 20 21 (22) 23 24 25 26 28 29 32 34 36 37 39 40 ]

CPU P-States [ (12) 14 15 17 18 19 20 21 22 23 24 25 26 28 29 32 33 34 36 37 39 40 ]

CPU P-States [ 12 14 15 17 18 19 20 21 22 23 24 25 26 28 29 32 33 34 36 37 39 40 (44) ]

CPU P-States [ (12) 14 15 17 18 19 20 21 22 23 24 25 26 27 28 29 32 33 34 36 37 39 40 44 ]

CPU P-States [ (12) 14 15 17 18 19 20 21 22 23 24 25 26 27 28 29 30 32 33 34 36 37 39 40 44 ]

CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 32 33 34 36 37 39 40 44 ]

CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 32 33 34 36 37 39 40 44 ]

CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 32 33 34 36 37 38 39 40 (44) ]

CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 (36) 37 38 39 40 44 ]

CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 38 39 40 43 (44) ]

CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 38 39 40 41 43 (44) ]

CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 36 37 38 39 40 41 42 43 (44) ]

CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 (44) ]

darthsian · November 9, 2016

For 6850k looking good

Its without any xcpm patches? Only with Brumbaer kext?

EDIT: I can test my 6900K tomorrow... I'm not at the computer today.

Brumbaer · November 9, 2016

C-States are enabled in Bios

With your kext, idle power is higher (2-3x) and temperature also.

Can you put numbers to it ?

When Idle my system will show 1.2GHz and about 38W. Temperature about 37-38 Degrees. All values from Intel Power Gadget.

SammlerG · November 9, 2016

Idle with xcpm 11W, with Patch 36-40W.

Temperature xcpm 30, Patch 39.

Matthew82 · November 9, 2016

Its without any xcpm patches? Only with Brumbaer kext?

EDIT: I can test my 6900K tomorrow... I'm not at the computer today.

xcpm patch + Brumbear.kext

5 minut browsing web on Safari with and without kext

darthsian · November 9, 2016

xcpm patch + Brumbear.kext

I think that's not good run xcpm and kext together... as Brumbaer says "This was never meant to run together with xcpm. Worst case they fight each other."

Brumbaer · November 9, 2016

Thank to you all for the information.

@SammlerG

When xcpm shows 11W, is the frequency displayed in Intel Power Gadget still 1.2GHz or lower ?

I'll look into it tomorrow.

SammlerG · November 10, 2016

the min. frequency is 1200 MHz.

It seems that xcpm enables C6 and cores will use c3+c6.

When i use your kext + xcpm i got from msr 0x199:

RDMSR 199 returns value 0x600

RDMSR 198 returns value 0xc00

RDMSR 199 returns value 0x600

but msr 0x199 should min. set to 1200 MHz for Haswell-E.

I think the problem is msr 0x199 and set this to 0x6 instead 0xc, and so the CPU throttles to fast and quick.

Maybe the P-States injected from your kext are false?

And here the use of C-States with your kext + xcpm:

MSR_IA32_PERF_CONTROL............(0x199) : 0x1700

------------------------------------------

- Target performance State Value....... : 0x1700 (2300 MHz)

MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x124FDF6252

MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x0

MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x124FDF2A8A

IA32_TSC_DEADLINE................(0x6E0) : 0x529E7D70741

CPU Ratio Info:

------------------------------------------

Base Clock Frequency (BLCK)............. : 100 MHz

Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)

Maximum non-Turbo Ratio/Frequency........: 35 (3500 MHz)

Maximum Turbo Ratio/Frequency............: 47 (4700 MHz)

P-State ratio * 100 = Frequency in MHz

------------------------------------------

CPU P-States [ (12) 34 46 ]

CPU C3-Cores [ 1 3 ]

CPU C6-Cores [ 0 2 4 6 8 10 ]

CPU P-States [ (12) 17 34 46 ]

CPU P-States [ (12) 17 34 37 46 ]

CPU C3-Cores [ 0 1 2 3 ]

CPU P-States [ (12) 16 17 34 37 46 ]

CPU P-States [ (12) 16 17 21 34 37 46 ]

CPU P-States [ 12 14 16 17 21 34 (35) 37 46 ]

CPU P-States [ (12) 14 16 17 20 21 34 35 37 46 ]

CPU C6-Cores [ 0 2 4 6 7 8 10 ]

CPU P-States [ 12 14 16 17 20 21 (23) 34 35 37 46 ]

CPU C6-Cores [ 0 1 2 3 4 6 7 8 10 ]

With your kext only C1E is working. No C3/C6 is used

MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x0

MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x0

IA32_TSC_DEADLINE................(0x6E0) : 0x8DE7C6C1A8E

CPU Ratio Info:

------------------------------------------

Base Clock Frequency (BLCK)............. : 100 MHz

Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)

Maximum non-Turbo Ratio/Frequency........: 35 (3500 MHz)

Maximum Turbo Ratio/Frequency............: 47 (4700 MHz)

P-State ratio * 100 = Frequency in MHz

------------------------------------------

CPU P-States [ (12) 39 46 ]

CPU P-States [ (12) 15 39 46 ]

CPU P-States [ (12) 13 15 39 46 ]

CPU P-States [ (12) 13 15 28 39 46 ]

CPU P-States [ (12) 13 15 22 28 39 46 ]

CPU P-States [ (12) 13 15 22 28 38 39 46 ]

CPU P-States [ (12) 13 15 20 22 28 38 39 46 ]

CPU P-States [ (12) 13 15 19 20 22 28 38 39 46 ]

CPU P-States [ 12 13 15 19 20 22 28 38 39 44 (46) ]

CPU P-States [ 12 13 15 19 20 22 28 38 39 43 44 (46) ]

CPU P-States [ 12 13 15 19 20 22 28 38 39 43 44 45 (46) ]

CPU P-States [ 12 13 15 19 20 22 24 28 38 39 43 44 45 (46) ]

Brumbaer · November 10, 2016

0xc00 is the lowest efficiency state, but 0600 is the lowest operating state.

There is no literal wrong state, you ask for a state and you get it or not.

As the residency values show, the c-states do not get active.

I have to check why. Maybe checking the registers prevents this, or some option has to be set in addition.

SammlerG · November 10, 2016

I checked the states in Windows, and there is 0xc00 the lowest state programmed for 0x199, but 0xFF the highest (0x2F for my setup using macOS).

X99 makes me crazy

Haswell E Powermanagement yet another option

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