[Guide] Mac OSX 10.12 and 10.13 with X99 Broadwell-E family and Haswell-E family

Balamut · March 15, 2017

One of the reasons to use SSDT instead of DSDT IMO is that it's easier to debug and just drop one file from clover to get back into the system instead of the entire DSDT

MaLd0n · March 15, 2017

Just know what you do

No need to go back

mfc88 · March 15, 2017

One of the reasons to use SSDT instead of DSDT IMO is that it's easier to debug and just drop one file from clover to get back into the system instead of the entire DSDT

This. Also, from a programming stand-point, one large file is a good way to get (fired from your job) lost/frustrated when you have to search through thousands and thousands of lines of code for a small mistake. Or worse, you fudge that large file (gets corrupted) and ruin EVERYTHING.

Multiple small files folks. It'll make your (and whoever else has to look at your files) life easier and cleaner to read.

MaLd0n · March 15, 2017

life easier

ofc

Fergarth · March 15, 2017

In order to optimize the system, I did some more testing with two and more xcpm patches. As I said, the system works well in both ways, but the biggest performance I got was with three patchs. The two I already used and more xcpm performance fix 1. So I get more performance and the advantage of continuing to have all the steps C3, C6 and P-States active. In fact some of the patches are only needed for those who do not have Bios unlocked.
Tests made with GB 4.0.3, Clover r4035, Sierra 12.4 beta 6, without NV graphics acceleration and without any overclocking.
Na Bios: EIST Disable, Sync All Colors, USB Auto-Enable-Enable-Enable.
Attached is my EFI folder and FreqVectors, but I notice that it will only work well with same Board, Processor and Graphics as I have, since DSDT and SSDT were created specifically for my hardware. Even FakeSMC itself incorporates some kexts and fixes, namely for the Wi-Fi and MP6,1 black screen to avoid having to apply them whenever there are OS updates.
The IPG print was made during the course of GeekBench.

Ps: About mfc88 SSDTs, yes I agree with what it says and I understand the arguments it uses, but my problem is turning my big fat DSDT into several thin SSDTs...

EFI.rar

FreqVetors to Install in SLE.rar

Patchs and Kext for ALC1150.rar

mfc88 · March 15, 2017

Ps: About mfc88 SSDTs, yes I agree with what it says and I understand the arguments it uses, but my problem is turning my big fat DSDT into several thin SSDTs...

Here's my way of paying you back for helping me out many months ago when I was first getting my hack up and running...

What's included (cross-referenced to your DSDT device paths):

ALZA (HDEF)

BR3A (GFX1 + HDAU -- specified to inject your 960 Strix)

EVSS (sSata Controller)

GLAN (Ethernet)

LPC0 (AppleLPC)

SAT1 (AHCI controller)

SMBS (SBUS)

Not included:

UIAC (USB port injection)

RP04 (pci14e4,43b1 should be supported w/o _DSM -- check IOReg to confirm)

You'll have to make your own SSDT-UIAC.aml because your USB layout is different than mine. I've already set up your config.plist to inject all ports into XHC but I recommend that you follow Rehabman's guide (if you plan on using devices EH01/EH02) or my guide (if you only plan on just using XHC). Once you've created it, you can disable the USB port limit patch.

I also fixed your config.plist Drop Tables. You should be dropping "PmMgt" and not "CpuPm". You can double check this by dropping ACPI tables and then opening each dropped SSDT-x.aml and checking the Table Id at the top (since we share the same board, it should be the same):

Fergarth-EFI.zip

fedemax-t · March 16, 2017

It worked!! After chamging the patches as Fabiosun told me, and choosing the 14,2 vectors as mfc88 suggested, it worked!
Thanks
@Fabiosun
@mfc88
@Fergarth
@nmano
Thanks all

AppleIntelInfo.kext v2.5 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1

Warning: Clover hw.busfrequency error detected : 17d78400
InitialTSC...............................: 0x4733328e8b3 (163 MHz)
MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel(R) Core(TM) i7-5960X CPU @ 3.00GHz

Processor Signature..................... : 0x306F2
------------------------------------------
 - Family............................... : 6
 - Stepping............................. : 2
 - Model................................ : 0x3F (63)

Model Specific Registers (MSRs)
------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35)  : 0x0
------------------------------------------
 - Core Count........................... : 8
 - Thread Count......................... : 16

MSR_PLATFORM_INFO................(0xCE)  : 0x80C3BF3811E00
------------------------------------------
 - Maximum Non-Turbo Ratio.............. : 0x1E (3000 MHz)
 - Ratio Limit for Turbo Mode........... : 1 (programmable)
 - TDP Limit for Turbo Mode............. : 1 (programmable)
 - Low Power Mode Support............... : 1 (LPM supported)
 - Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
 - Maximum Efficiency Ratio............. : 12
 - Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x3
------------------------------------------
 - I/O MWAIT Redirection Enable......... : 0 (not enabled)
 - CFG Lock............................. : 0 (MSR not locked)
 - C3 State Auto Demotion............... : 0 (disabled/unsupported)
 - C1 State Auto Demotion............... : 0 (disabled/unsupported)
 - C3 State Undemotion.................. : 0 (disabled/unsupported)
 - C1 State Undemotion.................. : 0 (disabled/unsupported)
 - Package C-State Auto Demotion........ : 0 (disabled/unsupported)
 - Package C-State Undemotion........... : 0 (disabled/unsupported)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x0
 - C-state Range........................ : 0 (C-States not included, I/O MWAIT redirection not enabled)

IA32_MPERF.......................(0xE7)  : 0x856CB12C5
IA32_APERF.......................(0xE8)  : 0x74B5D4876

MSR_FLEX_RATIO...................(0x194) : 0xE0000

MSR_IA32_PERF_STATUS.............(0x198) : 0x188700000C00
------------------------------------------
 - Current Performance State Value...... : 0xC00 (1200 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0xC00
------------------------------------------
 - Target performance State Value....... : 0xC00 (1200 MHz)
 - Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0

IA32_THERM_INTERRUPT.............(0x19B) : 0x0

IA32_THERM_STATUS................(0x19C) : 0x883F0000
------------------------------------------
 - Thermal Status....................... : 0
 - Thermal Log.......................... : 0
 - PROCHOT # or FORCEPR# event.......... : 0
 - PROCHOT # or FORCEPR# log............ : 0
 - Critical Temperature Status.......... : 0
 - Critical Temperature log............. : 0
 - Thermal Threshold #1 Status.......... : 0
 - Thermal Threshold #1 log............. : 0
 - Thermal Threshold #2 Status.......... : 0
 - Thermal Threshold #2 log............. : 0
 - Power Limitation Status.............. : 0
 - Power Limitation log................. : 0
 - Current Limit Status................. : 0
 - Current Limit log.................... : 0
 - Cross Domain Limit Status............ : 0
 - Cross Domain Limit log............... : 0
 - Digital Readout...................... : 63
 - Resolution in Degrees Celsius........ : 1
 - Reading Valid........................ : 1 (valid)

MSR_THERM2_CTL...................(0x19D) : 0x0

IA32_MISC_ENABLES................(0x1A0) : 0x850081
------------------------------------------
 - Fast-Strings......................... : 1 (enabled)
 - FOPCODE compatibility mode Enable.... : 0
 - Automatic Thermal Control Circuit.... : 0 (disabled)
 - Split-lock Disable................... : 0
 - Performance Monitoring............... : 1 (available)
 - Bus Lock On Cache Line Splits Disable : 0
 - Hardware prefetch Disable............ : 0
 - Processor Event Based Sampling....... : 0 (PEBS supported)
 - GV1/2 legacy Enable.................. : 0
 - Enhanced Intel SpeedStep Technology.. : 1 (enabled)
 - MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
 - Adjacent sector prefetch Disable..... : 0
 - CFG Lock............................. : 0 (MSR not locked)
 - xTPR Message Disable................. : 1 (disabled)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x591200
------------------------------------------
 - Turbo Attenuation Units.............. : 0 
 - Temperature Target................... : 89
 - TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x0

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2121212121212323
------------------------------------------
 - Maximum Ratio Limit for C01.......... : 23 (3500 MHz) 
 - Maximum Ratio Limit for C02.......... : 23 (3500 MHz) 
 - Maximum Ratio Limit for C03.......... : 21 (3300 MHz) 
 - Maximum Ratio Limit for C04.......... : 21 (3300 MHz) 
 - Maximum Ratio Limit for C05.......... : 21 (3300 MHz) 
 - Maximum Ratio Limit for C06.......... : 21 (3300 MHz) 
 - Maximum Ratio Limit for C07.......... : 21 (3300 MHz) 
 - Maximum Ratio Limit for C08.......... : 21 (3300 MHz) 

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x1
------------------------------------------
 - Power Policy Preference...............: 1 (highest performance)

MSR_POWER_CTL....................(0x1FC) : 0x21040059
------------------------------------------
 - Bi-Directional Processor Hot..........: 1 (enabled)
 - C1E Enable............................: 0 (disabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
 - Power Units.......................... : 3 (1/8 Watt)
 - Energy Status Units.................. : 14 (61 micro-Joules)
 - Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x43857800148460
------------------------------------------
 - Package Power Limit #1............... : 140 Watt
 - Enable Power Limit #1................ : 1 (enabled)
 - Package Clamping Limitation #1....... : 0 (disabled)
 - Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
 - Package Power Limit #2............... : 175 Watt
 - Enable Power Limit #2................ : 1 (enabled)
 - Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
 - Time Window for Power Limit #2....... : 33 (10 milli-Seconds)
 - Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0x4E031B1
------------------------------------------
 - Total Energy Consumed................ : 4992 Joules (Watt = Joules / seconds)

MSR_CONFIG_TDP_NOMINAL...........(0x648) : 0x1E
MSR_CONFIG_TDP_LEVEL1............(0x649) : 0x940000001B0460
MSR_CONFIG_TDP_LEVEL2............(0x64a) : 0x94000000000000
MSR_CONFIG_TDP_CONTROL...........(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.......(0x64c) : 0x0
MSR_PKGC3_IRTL...................(0x60a) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x131D7AABF4
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x131D7AABF4
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x8173090DF4

IA32_TSC_DEADLINE................(0x6E0) : 0x47336FF8B92

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 30 (3000 MHz)
Maximum Turbo Ratio/Frequency............: 35 (3500 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ (12) 27 33 ]
CPU C6-Cores [ 0 3 4 6 8 10 12 15 ]
CPU P-States [ 12 21 27 (30) 33 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 8 9 10 11 12 15 ]
CPU P-States [ (12) 21 22 27 30 33 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 15 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ]
CPU P-States [ (12) 19 21 22 27 30 33 ]
CPU P-States [ (12) 19 21 22 27 28 30 33 ]
CPU P-States [ 12 19 21 22 27 28 30 31 (33) ]
CPU P-States [ (12) 16 19 21 22 27 28 30 31 33 ]
CPU P-States [ (12) 16 19 21 22 25 27 28 30 31 33 ]
CPU P-States [ (12) 14 16 19 21 22 25 27 28 30 31 33 ]
CPU P-States [ (12) 14 16 19 21 22 25 26 27 28 30 31 33 ]
CPU P-States [ 12 14 16 18 19 21 22 25 26 27 28 (30) 31 33 ]
CPU P-States [ (12) 14 16 18 19 20 21 22 25 26 27 28 30 31 33 ]
CPU P-States [ (12) 14 16 17 18 19 20 21 22 25 26 27 28 30 31 33 ]
CPU P-States [ (12) 14 16 17 18 19 20 21 22 23 25 26 27 28 30 31 33 ]
CPU P-States [ (12) 14 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 33 ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 33 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 33 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 30 31 33 (35) ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 33 35 ]

----------------------------------------------------
Done populating the CPU states!
----------------------------------------------------
Fedemaxts-Mac-Pro:~ seppia$

working

xcpm
graphics
sleep
Usb2.0/3.0
OC stable @4.3ghz

not working yet:
realtek 1150
hdmi audio (there must be some conflicts because it was working fine)

I will start diggin the forum for some overclocking clues, if you have suggestions they´ll be more than welcome! Thanks again

k1n4 · March 16, 2017

@mfc88 I've learned a lot by you and other user like @nmano @PMHeart, etc... and making a Hackintosh workstation stable and rocksolid for my work has been a challenge for me and for people like us that loves computing and OS X without buy official hardware that, for pro' users, it's like a joke!

I appreciate your help... Now I've a system with full XCPM working but I'd like to complete the opera compiling SSDT's for my system, dropping PCI table, etc...

If I'll post my EFI configuration, IOREG's profile could someone help me for it? If it's answering too much, I'll appreciate a guide too!

Thanks a lot to everyone!!

Inviato dal mio iPad utilizzando Tapatalk

Fergarth · March 16, 2017

It worked!! After chamging the patches as Fabiosun told me, and choosing the 14,2 vectors as mfc88 suggested, it worked!

Thanks

@Fabiosun

@mfc88

@Fergarth

@nmano

Thanks all
working:

xcpm

graphics

sleep

not working yet:

realtek 1150

hdmi audio (there must be some conflicts because it was working fine)

usb2.0

I will start diggin the forum for some overclocking clues, if you have suggestions they´ll be more than welcome! Thanks again

Hi,

I saw you have this and you can correct:

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2121212121212323

------------------------------------------

- Maximum Ratio Limit for C01.......... : 23 (3500 MHz)

- Maximum Ratio Limit for C02.......... : 23 (3500 MHz)

- Maximum Ratio Limit for C03.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C04.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C05.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C06.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C07.......... : 21 (3300 MHz)

- Maximum Ratio Limit for C08.......... : 21 (3300 MHz)

In my opinion you should enter the Bios of your board and select the function "Sync All Cores" to the cores reach all the same maximum frequency.

In Asus it's in the Ai Tweaker zone, but I do not know what board you have. You should also create a signature with your hardware, to facilitate the help.

As for the ALC1150 sound, there are two or three ways you can do it, but this seems simpler and more efficient since AppleHDA in your OS is vanilla. Try the attachment below.

Here's my way of paying you back for helping me out many months ago when I was first getting my hack up and running...

What's included (cross-referenced to your DSDT device paths):

ALZA (HDEF)

BR3A (GFX1 + HDAU -- specified to inject your 960 Strix)

EVSS (sSata Controller)

GLAN (Ethernet)

LPC0 (AppleLPC)

SAT1 (AHCI controller)

SMBS (SBUS)

Not included:

UIAC (USB port injection)

RP04 (pci14e4,43b1 should be supported w/o _DSM -- check IOReg to confirm)

You'll have to make your own SSDT-UIAC.aml because your USB layout is different than mine. I've already set up your config.plist to inject all ports into XHC but I recommend that you follow Rehabman's guide (if you plan on using devices EH01/EH02) or my guide (if you only plan on just using XHC). Once you've created it, you can disable the USB port limit patch.

I also fixed your config.plist Drop Tables. You should be dropping "PmMgt" and not "CpuPm". You can double check this by dropping ACPI tables and then opening each dropped SSDT-x.aml and checking the Table Id at the top (since we share the same board, it should be the same):

Many thanks mfc, I'll have to test your work, but I have to understand the part of USBs well. I confess that this suddenly seems a bit confusing and first I will have to read the guides very carefully...

Thank you for your help.

Patchs and Kext for ALC1150.rar

mfc88 · March 16, 2017

Many thanks mfc, I'll have to test your work, but I have to understand the part of USBs well. I confess that this suddenly seems a bit confusing and first I will have to read the guides very carefully...

Thank you for your help.

Which part is confusing?

1. Open up IOReg

2. Plug a USB 3.0 device in a USB 3.0 port

3. Find where the USB 3.0 device was mapped to in IOReg (or use About This Mac->System Report->USB). By finding this device, you know where that USB 3.0 port is mapped (to some SSxx port).

4. Repeat again, except use a USB 2.0 device in the same port (this should get mapped to a HSxx port).

5. Rinse and repeat for ALL ports (2.0 ports will only be mapped to one port, so you don't have to plug in a 2.0 device).

6. Use my SSDT-UIAC.dsl as a template, but instead swap in your HSxx/SSxx ports (use my port to hex list below to determine what HSxx or SSxx port is in hex)

7. Compile and save. Drop it in patched and disable the USB port limit patch.

8. Restart, check IOReg and make sure only the ports you've specified are injected. Then you're done.

For example:

A USB 3.0 port located on the front of my computer case:

- When a USB 2.0 device was plugged in to that port, it was mapped to: HS01

- When a USB 3.0 device was plugged in to that port, it was mapped to: SSP1

Note 1: In the code box below, anything after two double slashes // are notes that are not executed by the system, but they're for us to read.

Note 2: A compatible PCI string or port name (I used XHC, but you can use either. It depends on whether or not you want to use EH01/EH02 ports)

So then in my SSDT-UIAC.dsl, I would write...

DefinitionBlock ("", "SSDT", 2, "hack", "UIAC", 0)
{
    Device(UIAC)
    {
        Name(_HID, "UIA00000")
        Name(RMCF, Package()
        {
            "XHC", Package() //  A compatible PCI string (see Note 2 for an example) or port name (XHC), this will depend on whether or not you want to use EH01/EH02 ports
            {
                "port-count", Buffer() { 0x15, 0, 0, 0 }, // amount of ports we'll be injecting (21 ports or 15 hex for our board)
                "ports", Package()
                {
                    "HS01", Package() // USB 3.0 - Front panel, left
                    {
                        "UsbConnector", 3, // 3 signifies USB 3.0 port
                        "port", Buffer() { 0x01, 0, 0, 0 }, // HS01 === 0x01
                    },
                    
                    // if needed, add any other MAPPED ports between HS01-SSP1 --- follow list below for how to structure your ports: HS01, HS02, HS03, HS04...SSP1, SSP2, SSP3...etc

                    "SSP1", Package() // shared w/ HS01 => USB 3.0 - Front panel, left
                    {
                        "UsbConnector", 3, // 3 signifies USB 3.0 port
                        "port", Buffer() { 0x10, 0, 0, 0 }, // SSP1 === 0x10
                    },

                    // if needed, add any other ports after SSP1-SSP6
                 },
            },
        })
    }
}
//EOF

Port list in hex:

HS01 === 0x01
HS02 === 0x02
HS03 === 0x03
HS04 === 0x04
HS05 === 0x05
HS06 === 0x06
HS07 === 0x07
HS08 === 0x08
HS09 === 0x09
HS10 === 0x0A
HS11 === 0x0B
HS12 === 0x0C
HS13 === 0x0D
HS14 === 0x0E
SSP1 === 0x10
SSP2 === 0x11
SSP3 === 0x12
SSP4 === 0x13
SSP5 === 0x14
SSP6 === 0x15
------------------
0x15 = 21 ports (15 in hexadecimal => 21 in decimal -- note: 0x0F is not used! )

mfc88 · March 16, 2017

Anyone having any issues with Chrome? All of the sudden, I get a random reboots when browsing.

Switched to Firefox for now (no more reboot issues)...

Fergarth · March 16, 2017

@ fedemax-t

And you can also try to fix this by trying to use only the 3 XCPM patchs in my EFI config.plist. So you get to have C-3, C-6 and P-States in the result of your AppleInteinfo without losing performance. If in your case does not work for you, reverse!

- C3 State Auto Demotion............... : 0 (disabled/unsupported)

- C1 State Auto Demotion................: 0 (disabled/unsupported)

- C3 State Undemotion................... .: 0 (disabled/unsupported)

- C1 State Undemotion.................... : 0 (disabled/unsupported)

- Package C-State Auto Demotion.... : 0 (disabled/unsupported)

- Package C-State Undemotion........ : 0 (disabled/unsupported)

http://www.insanelymac.com/forum/topic/313296-guide-mac-osx-1012-with-x99-broadwell-e-family-and-haswell-e-family/?p=2385263

Anyone having any issues with Chrome? All of the sudden, I get a random reboots when browsing.

Switched to Firefox for now (no more reboot issues)...

mfc88, I never used Chrome other than Windows and it was before Edge came out.

From the beginning, in OS X, I have always used Safari without any stress. But I know I did something on the kext AirPort.Brcm4360.plist

I followed the suggestion of PMHeart and increase on the plist the bandwidth from 1300 to 11300 and this and other changes are currently incorporated in my FakeSMC kext, so I do not have to repeat it whenever there are updates to the OS.

mfc88 · March 16, 2017

mfc88, I never used Chrome other than Windows and it was before Edge came out.

From the beginning, in OS X, I have always used Safari without any stress. But I know I did something on the kext AirPort.Brcm4360.plist

I followed the suggestion of PMHeart and increase on the plist the bandwidth from 1300 to 11300 and this and other changes are currently incorporated in my FakeSMC kext, so I do not have to repeat it whenever there are updates to the OS.

Can you please attach your FakeSMC with patches, I want to see what you've done.

Fergarth · March 16, 2017

Take a look here or see the FakeSMC attached:

But attention:
My FakeSMC besides the change in the bandwidth of the WIFI also contains more kexts incorporated specifically for the USBs kext and I do not remember if any more...

http://www.insanelymac.com/forum/topic/313296-guide-mac-osx-1012-with-x99-broadwell-e-family-and-haswell-e-family/?p=2385263

FakeSMC.kext.rar

mfc88 · March 16, 2017

Take a look here or see the FakeSMC attached:

But attention:

My FakeSMC besides the change in the bandwidth of the WIFI also contains more kexts incorporated specifically for the USBs kext and I do not remember if any more...

http://www.insanelymac.com/forum/topic/313296-guide-mac-osx-1012-with-x99-broadwell-e-family-and-haswell-e-family/?p=2385263

Ah... I see... injecting Airport Brcm4360, USBs ports, AHCI ports and AppleHDA via FakeSMC.

Essentially it combines:

X99 Injector USB 3.kext

AHCIPortInjector.kext

AppleHDA_ALC1150.kext

As far as WIFI (which I'm not using, instead connecting via ethernet port) is concerned, we share the same settings. Pretty sure the random rebooting is not an ethernet problem, but a chrome problem (was running stable for a week or two prior to this morning).

Fergarth · March 17, 2017

I also fixed your config.plist Drop Tables. You should be dropping "PmMgt" and not "CpuPm". You can double check this by dropping ACPI tables and then opening each dropped SSDT-x.aml and checking the Table Id at the top (since we share the same board, it should be the same):

Are you sure that's what you say? In Clover, the option you suggested for PM does not appear...

mfc88 · March 17, 2017

Are you sure that's what you say? In Clover, the option you suggested for PM does not appear...

Mount your current SSD via Clover Configurator, then generate boot.log (you can find it on the left hand side under "Tools" and underneath "Mount EFI" will be "Boot.log," click "Generate log"). Then paste here.

Fergarth · March 17, 2017

Ok, is this what you're looking for? So this is where I have to base and apply PmMgt. Ok ok... :yes:

mfc88 · March 17, 2017

Ok, is this what you're looking for? So this is where I have to base and apply PmMgt. Ok ok...

If you go further down the boot.log, it should show this...

6:104  0:000  === [ ACPIDropTables ] ====================================
6:104  0:000  Drop tables from Xsdt, SIGN=SSDT TableID=PmMgt Length=86589
6:104  0:000   Xsdt has tables count=15
6:104  0:000   Table: SSDT  PmMgt  86589 dropped

Fergarth · March 17, 2017

I see, i see! Thanks mfc for the clarification ?

fedemax-t · March 17, 2017

Hello all,

even though it is all recognised in SysProfiler, I´m still stuck without Audio, i´ve tried all this solutions in vain:

-Patchs and Kext for ALC1150

-toleda alc 1150 (audio_cloverALC-120_v1.0d 2.command)

-AppleALC + CodecCommander kexts

Still no go.

Have you any clues? Thanks for your help

EFI.zip

MaLd0n · March 17, 2017

add it

Dont need Name (_SUN, 300002010020303040030202) // _SUN: Slot User Number

Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package ()
                        {
                            "AAPL,slot-name", 
                            "Built In", 
                            "name", 
                            "Realtek Audio Controller", 
                            "model", 
                            Buffer ()
                            {
                                "Realtek ALC1150 Audio Controller"
                            },
...

Fergarth · March 17, 2017

Hello all,

even though it is all recognised in SysProfiler, I´m still stuck without Audio, i´ve tried all this solutions in vain:

-Patchs and Kext for ALC1150

-toleda alc 1150 (audio_cloverALC-120_v1.0d 2.command)

-AppleALC + CodecCommander kexts

Still no go.

Have you any clues? Thanks for your help

Hi,

I cleaned and altered your EFI, had some junk...

The suggestion I gave you for sound, only works if AppleHDA is original (vanilla). If you applied toleda alc 1150 (audio_cloverALC-120_v1.0d 2.command)

-AppleALC + CodecCommander kexts your AppleHDA.kext is no longer original.

Read this, here you have an original AppleHDA.kext. Replace this one with the one you have in SLE and try. It can not copy/paste, you have to install it with the Kext Wizard and then rebuild the permissions.

http://www.insanelymac.com/forum/topic/313296-guide-mac-osx-1012-with-x99-broadwell-e-family-and-haswell-e-family/?p=2379206

Your config.plist already has the HDA patches, you just have to install the AppleHDA_ALC1150.kext and the original AplleHDA.kext and rebuild the permissions. Kext Wizard installs and does this. After that, try with the attached EFI.

Patchs and Kext for ALC1150.rar

EFI.rar

mfc88 · March 17, 2017

Hello all,

even though it is all recognised in SysProfiler, I´m still stuck without Audio, i´ve tried all this solutions in vain:

-Patchs and Kext for ALC1150

-toleda alc 1150 (audio_cloverALC-120_v1.0d 2.command)

-AppleALC + CodecCommander kexts

Still no go.

Have you any clues? Thanks for your help

Converted your DSDT.aml to individual SSDTs, added some DSDT patches... umm also did a bunch of other stuff.

Add this entire EFI folder to your SSD's EFI root.

Before restarting...

Download Kext Utility

Drag and drop all kexts (not the folder itself) from inside "KextsToAdd_SLE" on to the Kext Utility's window to install them. Wait for it to complete, like so...

Reboot, then attach an IOReg file here when back in OS.

You'll also want to create a custom SSDT-UIAC.aml for USB port mapping via Rehabman's "Creating a custom SSDT for USBInjectAll" or mine.

KextsToAdd_SLE.zip

fedemax-t_EFI.zip

Fljagd · March 18, 2017

@Fljagd @mfc

I noticed that in the results of your Intel Info it appears like this!

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2) : 0x8400

------------------------------------------

- I/O MWAIT Redirection Enable......... : 1 (enabled, IO read of MSR(0xE4) mapped to MWAIT)

- CFG Lock............................. : 1 (MSR locked until next reset)

- C3 State Auto Demotion............... : 0 (disabled/unsupported)

- C1 State Auto Demotion............... : 0 (disabled/unsupported)

- C3 State Undemotion.................. : 0 (disabled/unsupported)

- C1 State Undemotion.................. : 0 (disabled/unsupported)

- Package C-State Auto Demotion........ : 0 (disabled/unsupported)

- Package C-State Undemotion........... : 0 (disabled/unsupported)

I've been running Intel Info and in mine it appears like this with just tree XCPM patches. I tried only with two patches, but it seemed to me more stable with three. But with more time I still have to explore better with only two. Anyway, as it stands it seems perfect!

AppleIntelInfo.kext v2.0 Copyright © 2012-2016 Pike R. Alpha. All rights reserved

enableHWP................................: 0

Settings:

------------------------------------------

logMSRs..................................: 1

logIGPU..................................: 0

logCStates...............................: 1

logIPGStyle..............................: 1

InitialTSC...............................: 0x1695b0b1451 (47 MHz)

MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel® Core i7-5820K CPU @ 3.30GHz

Processor Signature..................... : 0x306F2

------------------------------------------

- Family............................... : 6

- Stepping............................. : 2

- Model................................ : 0x3F (63)

Model Specific Registers (MSRs)

------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35) : 0xFFFFFF80A80C5F00

------------------------------------------

- Core Count........................... : 6

- Thread Count......................... : 12

MSR_PLATFORM_INFO................(0xCE) : 0x20080C3BF3812100

------------------------------------------

- Maximum Non-Turbo Ratio.............. : 0x21 (3300 MHz)

- Ratio Limit for Turbo Mode........... : 1 (programmable)

- TDP Limit for Turbo Mode............. : 1 (programmable)

- Low Power Mode Support............... : 1 (LPM supported)

- Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)

- Maximum Efficiency Ratio............. : 12

- Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2) : 0x1E000005

------------------------------------------

- I/O MWAIT Redirection Enable......... : 0 (not enabled)

- CFG Lock............................. : 0 (MSR not locked)

- C3 State Auto Demotion............... : 1 (enabled)

- C1 State Auto Demotion............... : 1 (enabled)

- C3 State Undemotion.................. : 1 (enabled)

- C1 State Undemotion.................. : 1 (enabled)

- Package C-State Auto Demotion........ : 0 (disabled/unsupported)

- Package C-State Undemotion........... : 0 (disabled/unsupported)

My question is: Which one of us is right and which one is wrong?

And as no one has spoken, for me, the answer is: I am the one who is well and I'm going to have a gin to make the party

Hello

Sorry to respond late, work, work !!!

So if I disable the patch as in your photo, my hack does not boot

[Guide] Mac OSX 10.12 and 10.13 with X99 Broadwell-E family and Haswell-E family

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