bisk Posted August 3, 2017 Share Posted August 3, 2017 On a separate note. I have come to a resolution of sorts with my Z400 issues. I will quickly outline my experience so that someone else might avoid my turmoils, lol ! First, there appear to be (at least) TWO distinct versions of DSDTs on these systems floating around out there. DSDT Version 1, example from users bisk and arkieboy72472 ... deals with HPET like so: OperationRegion (VECT, SystemMemory, 0x000F8000, 0x0100) Field (VECT, AnyAcc, NoLock, Preserve) { Offset (0x04), NPCI, 32, SR4G, 32, Offset (0x20), HPTB, 32, Offset (0x36), ABIO, 32, APAD, 32, APLN, 32, MBBA, 32, RCBA, 32, PEXB, 32, PEXS, 32, S3SV, 8, STMS, 8, WMPI, 8, PTRP, 8, WMBH, 8, WM10, 8, UPEC, 8, TPMP, 8, MORB, 8, Offset (0x5C), RSTT, 8, ESLB, 8, EV3F, 8 } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, 0x01) Name (CRES, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y26) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRES, \_SB.PCI0.LPC.HPET._Y26._BAS, BASE) CreateDWordField (CRES, \_SB.PCI0.LPC.HPET._Y26._LEN, LNTH) Store (HPTB, BASE) Store (0x0400, LNTH) Return (CRES) } Method (_STA, 0, NotSerialized) { Return (0x0F) } } ----- That is unmodded code above. Turns out that the fix is very simple ... Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, 0x01) Name (CRES, ResourceTemplate () { IRQNoFlags () {0} IRQNoFlags () {8} IRQNoFlags () {11} IRQNoFlags () {15} Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y26) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRES, \_SB.PCI0.LPCB.HPET._Y26._BAS, BASE) CreateDWordField (CRES, \_SB.PCI0.LPCB.HPET._Y26._LEN, LNTH) Store (HPTB, BASE) Store (0x0400, LNTH) Return (CRES) } Method (_STA, 0, NotSerialized) { Return (0x0F) } } My issue was because I only added the first 2 interrupts and not all 4. Adding only IRQs 0 and 8 was almost always good enough in the past. Only rare exception was sometimes an IRQ conflict with the FireWire controller would create the need for 4 w/diff values. NOT with this Z400 tho, it's GOTTA be 4 IRQs or death by KP @ boot time ! YIKES I got all tied up with the fact that the base address was NULL rather than the usual 0xFED00000. Turns out this has nothing to do with it, go figure. ----- Version 2, example user is jaymack ... OperationRegion (VECT, SystemMemory, 0x000F8000, 0x0100) Field (VECT, AnyAcc, NoLock, Preserve) { Offset (0x04), NPCI, 32, SR4G, 32, Offset (0x20), HPAS, 32, HPAE, 1, Offset (0x36), ABIO, 32, APAD, 32, APLN, 32, MBBA, 32, RCBA, 32, PEXB, 32, PEXS, 32, S3SV, 8, STMS, 8, WMPI, 8, PTRP, 8, WMBH, 8, WM10, 8, UPEC, 8, TPMP, 8, MORB, 8, Offset (0x5C), RSTT, 8, ESLB, 8, EV3F, 8 } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, One) Name (BUF0, ResourceTemplate () { IRQNoFlags () {0} IRQNoFlags () {8} Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00100000, // Address Length _Y17) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y17._BAS, BASE) CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y17._LEN, LNTH) Store (HPAS, BASE) Store (0x0400, LNTH) Return (BUF0) } Method (_STA, 0, NotSerialized) { If (LGreaterEqual (OSYS, 0x07D1)) { If (HPAE) { Return (0x0F) } } Else { If (HPAE) { Return (0x0B) } } If (HPAE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y17._BAS, HPT0) If (LEqual (HPAS, One)) { Store (0xFED10000, HPT0) } If (LEqual (HPAS, 0x02)) { Store (0xFED20000, HPT0) } If (LEqual (HPAS, 0x03)) { Store (0xFED30000, HPT0) } } Return (BUF0) } } ----- My Z400 won't generate this V2 code so I do not know for sure what unmodded version looks like. Presumably, there were no IRQs in the HPET device description block and that OSYS stuff might be new. Well, before I figured out that I needed 4 IRQs in my version, I converted mine with the Version 2 HPET DSDT code above. The result was that I could boot but the side effects were that AppleHPET.kext did NOT attach and I got the "invalid HPET registers" error. Also, I WAS able to run with an unpatched AppleIntelCPUManagement.kext so long as NullCPUPowerManagement.kext was loaded. As soon as I dropped NullCPUPowerManagement, AICPUPM caused KP within a minute or so after boot up. This did not look like a wrmsr write lock KP to me cuz I never made it out of a boot sequence with a write lock before, but, apparently, it is. Now, having returned back to my native Version 1 HPET code WITH 4 IRQs mod, I will KP DURING boot with unpatched AICPUPM if I drop NULLCPUPM. Classic wrmsr write lock behavior. With the patched AICPUPM, I can drop NULLCPUPM or not and all is well. If NULLCPUPM s dropped, AppleIntelCPUPowerManagementClient.kext loads so this must be what ultimately calls the wrmsr writes on AICPUPM. I was blaming AppleHPET.kext. Finally, if I drop NullCPUPM, SpeedStep fails. I will run at a max of 3.2GHz until I sleep and after wake will only run at 1.6GHz. This is the case with my own SSDT or Clover generated tables and with either V1 or V2 HPET mods. With NullCPUPowerManagement loaded, I get 1.6GHz, 3.06GHz and 3.2GHz from my W3550 (3.067GHz) XEON. So after all of this ... still better off with NullCPUPM, lol ! Sleep works either way. Perhaps changing from a MacPro,5.1 to an iMac,13.2 as jaymack did will get SpeedStep working with AICPUPMClient loaded. Just wanted to get this all down while it was fresh. Anyway, hope this is helpful. I'm out Link to comment Share on other sites More sharing options...
jaymack Posted August 3, 2017 Share Posted August 3, 2017 On a separate note. I have come to a resolution of sorts with my Z400 issues. I will quickly outline my experience so that someone else might avoid my turmoils, lol ! First, there appear to be (at least) TWO distinct versions of DSDTs on these systems floating around out there. DSDT Version 1, example is bisk and arkieboy72472 ... deals with HPET like so: OperationRegion (VECT, SystemMemory, 0x000F8000, 0x0100) Field (VECT, AnyAcc, NoLock, Preserve) { Offset (0x04), NPCI, 32, SR4G, 32, Offset (0x20), HPTB, 32, Offset (0x36), ABIO, 32, APAD, 32, APLN, 32, MBBA, 32, RCBA, 32, PEXB, 32, PEXS, 32, S3SV, 8, STMS, 8, WMPI, 8, PTRP, 8, WMBH, 8, WM10, 8, UPEC, 8, TPMP, 8, MORB, 8, Offset (0x5C), RSTT, 8, ESLB, 8, EV3F, 8 } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, 0x01) Name (CRES, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y26) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRES, \_SB.PCI0.LPC.HPET._Y26._BAS, BASE) CreateDWordField (CRES, \_SB.PCI0.LPC.HPET._Y26._LEN, LNTH) Store (HPTB, BASE) Store (0x0400, LNTH) Return (CRES) } Method (_STA, 0, NotSerialized) { Return (0x0F) } } ----- That is unmodded code above. The fix is very simple ... Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, 0x01) Name (CRES, ResourceTemplate () { IRQNoFlags () {0} IRQNoFlags () {8} IRQNoFlags () {11} IRQNoFlags () {15} Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y26) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRES, \_SB.PCI0.LPCB.HPET._Y26._BAS, BASE) CreateDWordField (CRES, \_SB.PCI0.LPCB.HPET._Y26._LEN, LNTH) Store (HPTB, BASE) Store (0x0400, LNTH) Return (CRES) } Method (_STA, 0, NotSerialized) { Return (0x0F) } } My issue was because I only added the first 2 interrupts not all 4. Adding only IRQs 0 and 8 was almost always good enough in the past. Only rare exception was sometimes a conflict with the FireWire controller. NOT with this Z400 tho, it's GOTTA be 4 or death ! My bad I got all tied up with fact that the base address was NULL rather than the usual 0xFED00000. Turns out this has nothing to do with it, go figure. ----- Version 2, example is jaymack ... OperationRegion (VECT, SystemMemory, 0x000F8000, 0x0100) Field (VECT, AnyAcc, NoLock, Preserve) { Offset (0x04), NPCI, 32, SR4G, 32, Offset (0x20), HPAS, 32, HPAE, 1, Offset (0x36), ABIO, 32, APAD, 32, APLN, 32, MBBA, 32, RCBA, 32, PEXB, 32, PEXS, 32, S3SV, 8, STMS, 8, WMPI, 8, PTRP, 8, WMBH, 8, WM10, 8, UPEC, 8, TPMP, 8, MORB, 8, Offset (0x5C), RSTT, 8, ESLB, 8, EV3F, 8 } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, One) Name (BUF0, ResourceTemplate () { IRQNoFlags () {0} IRQNoFlags () {8} Memory32Fixed (ReadWrite, 0xFED00000, // Address Base 0x00100000, // Address Length _Y17) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y17._BAS, BASE) CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y17._LEN, LNTH) Store (HPAS, BASE) Store (0x0400, LNTH) Return (BUF0) } Method (_STA, 0, NotSerialized) { If (LGreaterEqual (OSYS, 0x07D1)) { If (HPAE) { Return (0x0F) } } Else { If (HPAE) { Return (0x0B) } } If (HPAE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y17._BAS, HPT0) If (LEqual (HPAS, One)) { Store (0xFED10000, HPT0) } If (LEqual (HPAS, 0x02)) { Store (0xFED20000, HPT0) } If (LEqual (HPAS, 0x03)) { Store (0xFED30000, HPT0) } } Return (BUF0) } } ----- My Z400 won't generate this V2 code so I do not know for sure what unmodded version looks like. Presumably, there were no IRQs in the HPET device description block and that OSYS stuff might be new. Well, before I figured out that I needed 4 IRQs in my version, I converted mine with the Version 2 HPET DSDT code above. The result was that I could boot but the side effects were that AppleHPET.kext did NOT attach and I got the "invalid HPET registers"error. Also, I was able to run with an unpatched AppleIntelCPUManagement.kext so long as NullCPUPowerManagement.kext was loaded. As soon as I dropped NullCPUPowerManagement, AICPUPM caused KP within a minute or so after boot up. This did not look like a wrmsr write lock KP to me cuz I never made it out of a boot sequence with a write lock before, but, apparently, it is. Now, having returned back to my native Version 1 HPET code WITH 4 IRQs mod I will KP DURING boot with unpatched AICPUPM if I drop NULLCPUPM. Classic wrmsr write lock behavior. With the patched AICPUPM, I can drop NULLCPUPM or not and all is well. If NULLCPUPM s dropped, AppleIntelCPUPowerManagementClient.kext loads so this must be what ultimately calls the wrmsr writes on AICPUPM. I was blaming AppleHPET.kext. Finally, if I drop NullCPUPM, SpeedStep fails. I will run at a max of 3.2GHz until I sleep and after wake will only run at 1.6GHz. This is the case with my own SSDT or Clover generated tables and with either V1 or V2 HPET mods. With NullCPUPowerManagement loaded, I get 1.6GHz, 3.06GHz and 3.2GHz from my W3550 (3.067GHz) XEON. So after all of this ... still better off with NullCPUPM, lol ! Sleep works either way. Perhaps changing from a MacPro,5.1 to an iMac,13.2 as jaymack did will get SpeedStep working with AICPUPMClient loaded. Just wanted to get this all down while it was fresh. Anyway, hope this is helpful. I'm out How long ago did you download my DSDT? Are you placing AppleIntelCpuPowerManagement Kext in the sS/L/E Folder? Link to comment Share on other sites More sharing options...
arkieboy72472 Posted August 3, 2017 Share Posted August 3, 2017 I am not allowed to attach files, but i have the default dsdt and ssdt (both assembled and disassembled) on standby. Again, my sole issue that I am aware of is having to unplug and replug USB ports every boot. My config.plist is a hot mess and I would like to trim it down, but I am not sure what to do and what not to do. College is about to start soon so this may go on the back burner. Here is a link to everything on my PC: https://drive.google.com/drive/folders/0B-UrVIRxbpPUa3ZCR3hhNFFFSWs?usp=sharing Link to comment Share on other sites More sharing options...
bisk Posted August 3, 2017 Share Posted August 3, 2017 How long ago did you download my DSDT? Are you placing AppleIntelCpuPowerManagement Kext in the sS/L/E Folder? I first downloaded it about 1 week ago when I began converting my Z400. My DSDT would not boot so I started with yours and gradually removed what was different in yours, converting it to agree more and more with mine until all that was different was the HPET portion. I might be wrong but you seem to have some added code that is not really doing anything in your DSDT. That added Pini() method meant to do a Windows init for Darwin and set the OSYS var is not even being referenced so far as I can tell. Your HPET device seems to depend on the value of OSYS but I actually deleted the Pini() method in my version of your DSDT and saw no difference in the booted result. Yep, replaced AICPUPM in /S/L/E. Does your SpeedStep work without NullCPUPM loaded, if defined as MacPro5.1 ... iMac13,2 ? I am not allowed to attach files, but i have the default dsdt and ssdt (both assembled and disassembled) on standby. Again, my sole issue that I am aware of is having to unplug and replug USB ports every boot. My config.plist is a hot mess and I would like to trim it down, but I am not sure what to do and what not to do. College is about to start soon so this may go on the back burner. Here is a link to everything on my PC: https://drive.google.com/drive/folders/0B-UrVIRxbpPUa3ZCR3hhNFFFSWs?usp=sharing Arkie, just download an Ubuntu live disk image, burn a CD, boot from it and see if your USB ports all work. No install needed, EZ ! Doubtful that anything in your clover config is stopping 2 of your 6 rear USB2 ports from working. Just for fun, see what removing USBInjectAll.kext does. Good luck. Link to comment Share on other sites More sharing options...
jaymack Posted August 3, 2017 Share Posted August 3, 2017 AppleIntelCpuPowerManagement Kext needs to be patched if you remove nullcpu. My speedstepping works with 13.2 http://www.insanelymac.com/forum/files/file/132-aicpmpatch/ Link to comment Share on other sites More sharing options...
bisk Posted August 3, 2017 Share Posted August 3, 2017 AppleIntelCpuPowerManagement Kext needs to be patched if you remove nullcpu. My speedstepping works with 13.2 http://www.insanelymac.com/forum/files/file/132-aicpmpatch/ Yep jaymack, I did that patch as you had pointed out to me before. I am actually very familiar with the write lock issue. We used SpeedStepper (flAked) for that back in the SnowLeo/Lion days. Nice to see that someone has kept that fine work going. What threw me off about this write lock was that, in the past, the write lock would cause a KP in AICPUPM late in the boot cycle whether NullCPUPM was loaded or not ! Plus, I have never experienced this with a desktop before, only with some laptops and generally with newer BIOSes. Leave it to HP Sometime more experience causes more problems, lol ! I don't like the idea of identifying my 2010 Core2Quad system as a Late 2012 Ivy Bridge Core i5 even if it does trick the Apple "Legacy" PlatformPlugin into hobblin' through. I think that you might cause yourself some problems in other aspects of your system. Tho' I do remember needing to misrep some AMD systems to get them to go in the past. But then, those don't really fit in anywhere so all bets are off anyway Gonna keep trying to get the MacPro5,1 model working. Maybe the old ACPI_SMC_PlatformPlugin hack from the Lion/Mountain Lion days needs to be revisited. Does the ACPI_SMC_PlatformPlugin.kext still exist in Mac OS 10.9/10/11/12 ? Initial research seems to indicate that ACPI_SMC_PlatformPlugin has changed a bunch ... no more individual model designations that I can find, darn ! Is anybody out there running their Z400/600/800 as a MacPro5,1 WITHOUT NullCPUPowerManagement.kext loaded AND seeing SpeedStep in effect ? Thanks in advance ! Link to comment Share on other sites More sharing options...
jaymack Posted August 4, 2017 Share Posted August 4, 2017 Yep jaymack, I did that patch as you had pointed out to me before. I am actually very familiar with the write lock issue. We used SpeedStepper (flAked) for that back in the SnowLeo/Lion days. Nice to see that someone has kept that fine work going. What threw me off about this write lock was that, in the past, the write lock would cause a KP in AICPUPM late in the boot cycle whether NullCPUPM was loaded or not ! Plus, I have never experienced this with a desktop before, only with some laptops and generally with newer BIOSes. Leave it to HP Sometime more experience causes more problems, lol ! I don't like the idea of identifying my 2010 Core2Quad system as a Late 2012 Ivy Bridge Core i5 even if it does trick the Apple "Legacy" PlatformPlugin into hobblin' through. I think that you might cause yourself some problems in other aspects of your system. Tho' I do remember needing to misrep some AMD systems to get them to go in the past. But then, those don't really fit in anywhere so all bets are off anyway Gonna keep trying to get the MacPro5,1 model working. Maybe the old ACPI_SMC_PlatformPlugin hack from the Lion/Mountain Lion days needs to be revisited. Does the ACPI_SMC_PlatformPlugin.kext still exist in Mac OS 10.9/10/11/12 ? Initial research seems to indicate that ACPI_SMC_PlatformPlugin has changed a bunch ... no more individual model designations that I can find, darn ! Is anybody out there running their Z400/600/800 as a MacPro5,1 WITHOUT NullCPUPowerManagement.kext loaded AND seeing SpeedStep in effect ? Thanks in advance ! How are you able to select Mac Pro 5,1? In my version of Clover that is not a choice. No Mac Pro is listed. What version of Clover are you using currently? Link to comment Share on other sites More sharing options...
arkieboy72472 Posted August 4, 2017 Share Posted August 4, 2017 Clover is 4114 I believe. Link to comment Share on other sites More sharing options...
bisk Posted August 4, 2017 Share Posted August 4, 2017 How are you able to select Mac Pro 5,1? In my version of Clover that is not a choice. No Mac Pro is listed. What version of Clover are you using currently? I don't have choices to select from. I don't use a tool to edit my configuration. I go online, research, collect the info that I like and then hand enter into my config.plist file. Also, I use no Clover patches or fixes , simply mod my DSDT file. I have trust issues I have found that some of the patches don't quite work and documentation is a bit lacking, lol ! For instance, did you even realize that "AsusAICPUPM" under "KernelAndKextPatches" is supposed to patch AppleintelCPUPowerMangement "on the fly" ? Well, don't worry, it doesn't At least not for 10.11.6. Maybe the Clover that I am running is too old ? Is there a place where they even tell you which version of Clover is up to date with which version of Mac OS X ? I wonder ... Slack docs is quite understandable for a free tool. It's the best thing for the job that we've got, so no complaints from me. I am running Clover_v2.3k_r3998 on this Z400. Arkie posted what looked like a legit set of MacPro5,1 SMBIOS settings earlier within his massive barrage of luggage Maybe I'll try his since mine is just a tad shy of perfect. I do come up as a Mid 2010 Mac Pro, however. These are my relevant SMBIOS settings (BIOS Release Date and Version are partially contrived) ... BiosVersion MP51.88Z.007F.B03.1106211250 BiosReleaseDate 6/21/2011 Board-ID Mac-F221BEC8 Family Mac Pro ProductName MacPro5,1 SerialNumber H01254HUEUG Replace your iMac13,2 settings with these bad boys and lmk if you SpeedStep works w/o NullCPUPM. Hmm, I might have an idea why I am experiencing incomplete Apple CPU Power Management, ie. no SpeedStep. I am running a Xeon W3550 which is a Nehalem "Bloomfield" processor. https://en.wikipedia.org/wiki/List_of_Intel_Xeon_microprocessors This processor was found in the Mid 2009 Mac Pro, a.k.a MacPro4,1. I have designated my Z400 as a MacPro5,1 which had the ... Intel Xeon Nehalem "Westmere" processor. These are the CPUs numbered in the 5000s with a leading E, Z or perhaps L. They support the 8GB DDR3 RAM DIMMs too rather than only 4GB DIMMs like the Bloomfields, I believe. I'm gonna roll down to MacPro4,1 and see if that does it UNTIL I can afford to upgrade to the 6 core Westmere, that is I like the looks of that 3.33GHz 6-core X5680 or 3.47GHz X5690 but don't wanna pay $60 to upgrade a $20 PC. BTW, Yours is a Bloomfield too jaymack. Link to comment Share on other sites More sharing options...
arkieboy72472 Posted August 5, 2017 Share Posted August 5, 2017 I don't have choices to select from. I don't use a tool to edit my configuration. I go online, research, collect the info that I like and then hand enter into my config.plist file. Also, I use no Clover patches or fixes , simply mod my DSDT file. I have trust issues I have found that some of the patches don't quite work and documentation is a bit lacking, lol ! For instance, did you even realize that "AsusAICPUPM" under "KernelAndKextPatches" is supposed to patch AppleintelCPUPowerMangement "on the fly" ? Well, don't worry, it doesn't At least not for 10.11.6. Maybe the Clover that I am running is too old ? Is there a place where they even tell you which version of Clover is up to date with which version of Mac OS X ? I wonder ... Slack docs is quite understandable for a free tool. It's the best thing for the job that we've got, so no complaints from me. I am running Clover_v2.3k_r3998 on this Z400. Arkie posted what looked like a legit set of MacPro5,1 SMBIOS settings earlier within his massive barrage of luggage Maybe I'll try his since mine is just a tad shy of perfect. I do come up as a Mid 2010 Mac Pro, however. These are my relevant SMBIOS settings (BIOS Release Date and Version are partially contrived) ... BiosVersion MP51.88Z.007F.B03.1106211250 BiosReleaseDate 6/21/2011 Board-ID Mac-F221BEC8 Family Mac Pro ProductName MacPro5,1 SerialNumber H01254HUEUG Replace your iMac13,2 settings with these bad boys and lmk if you SpeedStep works w/o NullCPUPM. Hmm, I might have an idea why I am experiencing incomplete Apple CPU Power Management, ie. no SpeedStep. I am running a Xeon W3550 which is a Nehalem "Bloomfield" processor. https://en.wikipedia.org/wiki/List_of_Intel_Xeon_microprocessors This processor was found in the Mid 2009 Mac Pro, a.k.a MacPro4,1. I have designated my Z400 as a MacPro5,1 which had the ... Intel Xeon Nehalem "Westmere" processor. These are the CPUs numbered in the 5000s with a leading E, Z or perhaps L. They support the 8GB DDR3 RAM DIMMs too rather than only 4GB DIMMs like the Bloomfields, I believe. I'm gonna roll down to MacPro4,1 and see if that does it UNTIL I can afford to upgrade to the 6 core Westmere, that is I like the looks of that 3.33GHz 6-core X5680 or 3.47GHz X5690 but don't wanna pay $60 to upgrade a $20 PC. BTW, Yours is a Bloomfield too jaymack. I Let Clover Configurator do my work for me. Here is a pic of mine. Just don't use the serial. Feel free to ask questions!! >I don't have choices to select from. I don't use a tool to edit my configuration. I go online, research, collect the info that I like and then hand enter into my config.plist file. >Also, I use no Clover patches or fixes , simply mod my DSDT file. I have trust issues >I have found that some of the patches don't quite work and documentation is a bit lacking, lol ! Not all of us know how to mod a dsdt. For everything else, there is clover configurator. http://mackie100projects.altervista.org/download-clover-configurator/ See also: https://clover-wiki.zetam.org/Configuration Link to comment Share on other sites More sharing options...
bisk Posted August 5, 2017 Share Posted August 5, 2017 Sure, I understand. DSDT editing is not for everyone. I know about the configurator. Cool but limiting. But, you know, config.plist editing is not nearly so daunting Turns out that I jumped the gun. The Bloomfield CPU can be in EITHER the MacPro4,1 OR MacPro5,1. The Westmere is only in the MacPro5,1. I do have SpeedStep now working for this HP_400 as EITHER Early 2009 Mac Pro (MacPro4,1) OR Mid 2010 Mac Pro (MacPro5,1). The part that stopped it all from happening for me was the Clover ACPI->SSDT entries. config.plist Needs to be set ... DropOEM=NO Generate CStates=YES PStates=YES The only slight bummer is that I lose the overclocked PState (3.2GHz) if I let Clover generate the PStates. I just get 1.6GHz and 3.07GHz. With NullCPUPowerManagement.kext loaded and config.plist set to ... DropOEM=YES Generate CStates=YES PStates=NO I get 3 PStates: 1.6GHz, 3.07GHz and 3.2GHz. So my SSDT does NOT work UNLESS I load NullCPUPowerManagement.kext. Also, I lost those nasty looking AppleLPC errors and now only see ... kernel[0]: AppleLPC::notifyPlatformASPM - registering with plugin with ASPM Support false So, those values that I posted just above are GOOD MacPro5,1 SMBIOS settings I'm good with this system now and wish you all the best with your HP HackPro, lol !!! IORegistry.zip Link to comment Share on other sites More sharing options...
arkieboy72472 Posted August 5, 2017 Share Posted August 5, 2017 Sure, I understand. DSDT editing is not for everyone. I know about the configurator. Cool but limiting. But, you know, config.plist editing is not nearly so daunting Turns out that I jumped the gun. The Bloomfield CPU can be in EITHER the MacPro4,1 OR MacPro5,1. The Westmere is only in the MacPro5,1. I do have SpeedStep now working for this HP_400 as EITHER Early 2009 Mac Pro (MacPro4,1) OR Mid 2010 Mac Pro (MacPro5,1). The part that stopped it all from happening for me was the Clover ACPI->SSDT entries. config.plist Needs to be set ... DropOEM=NO Generate CStates=YES PStates=YES The only slight bummer is that I lose the overclocked PState (3.2GHz) if I let Clover generate the PStates. I just get 1.6GHz and 3.07GHz. With NullCPUPowerManagement.kext loaded and config.plist set to ... DropOEM=YES Generate CStates=YES PStates=NO I get 3 PStates: 1.6GHz, 3.07GHz and 3.2GHz. So my SSDT does NOT work UNLESS I load NullCPUPowerManagement.kext. Also, I lost those nasty looking AppleLPC errors and now only see ... kernel[0]: AppleLPC::notifyPlatformASPM - registering with plugin with ASPM Support false So, those values that I posted just above are GOOD MacPro5,1 SMBIOS settings I'm good with this system now and wish you all the best with your HP HackPro, lol !!! I wish I knew the kinda stuff you did. I know mine is a Z800 and yours is a 400, but I bet they are similar. Maybe I could show you my config settings and maybe you could shed some insight into what does what. Some of them I know, but some I don't. I don't use a dsdt or ssdt. I can post more data if anyone thinks it will help another user. I also have a reddit post I recently made about my journey with this machine. Maybe it can provide assistance also: https://www.reddit.com/r/hackintosh/comments/6rot8l/lessons_learned_and_still_learning_from_my_second/ Enclosed are some screen shots of what I got going on. The movie is of a recent boot. IMG_0829.MOV Link to comment Share on other sites More sharing options...
jaymack Posted August 5, 2017 Share Posted August 5, 2017 I don't have choices to select from. I don't use a tool to edit my configuration. I go online, research, collect the info that I like and then hand enter into my config.plist file. Also, I use no Clover patches or fixes , simply mod my DSDT file. I have trust issues I have found that some of the patches don't quite work and documentation is a bit lacking, lol ! For instance, did you even realize that "AsusAICPUPM" under "KernelAndKextPatches" is supposed to patch AppleintelCPUPowerMangement "on the fly" ? Well, don't worry, it doesn't At least not for 10.11.6. Maybe the Clover that I am running is too old ? Is there a place where they even tell you which version of Clover is up to date with which version of Mac OS X ? I wonder ... Slack docs is quite understandable for a free tool. It's the best thing for the job that we've got, so no complaints from me. I am running Clover_v2.3k_r3998 on this Z400. Arkie posted what looked like a legit set of MacPro5,1 SMBIOS settings earlier within his massive barrage of luggage Maybe I'll try his since mine is just a tad shy of perfect. I do come up as a Mid 2010 Mac Pro, however. These are my relevant SMBIOS settings (BIOS Release Date and Version are partially contrived) ... BiosVersion MP51.88Z.007F.B03.1106211250 BiosReleaseDate 6/21/2011 Board-ID Mac-F221BEC8 Family Mac Pro ProductName MacPro5,1 SerialNumber H01254HUEUG Replace your iMac13,2 settings with these bad boys and lmk if you SpeedStep works w/o NullCPUPM. Hmm, I might have an idea why I am experiencing incomplete Apple CPU Power Management, ie. no SpeedStep. I am running a Xeon W3550 which is a Nehalem "Bloomfield" processor. https://en.wikipedia.org/wiki/List_of_Intel_Xeon_microprocessors This processor was found in the Mid 2009 Mac Pro, a.k.a MacPro4,1. I have designated my Z400 as a MacPro5,1 which had the ... Intel Xeon Nehalem "Westmere" processor. These are the CPUs numbered in the 5000s with a leading E, Z or perhaps L. They support the 8GB DDR3 RAM DIMMs too rather than only 4GB DIMMs like the Bloomfields, I believe. I'm gonna roll down to MacPro4,1 and see if that does it UNTIL I can afford to upgrade to the 6 core Westmere, that is I like the looks of that 3.33GHz 6-core X5680 or 3.47GHz X5690 but don't wanna pay $60 to upgrade a $20 PC. BTW, Yours is a Bloomfield too jaymack. Al I had to do was in the config.plist, change were it said IMac 13,2 to Mac Pro 5,1 That was it ,all the other setting then change automatically. Link to comment Share on other sites More sharing options...
bisk Posted August 5, 2017 Share Posted August 5, 2017 Al I had to do was in the config.plist, change were it said IMac 13,2 to Mac Pro 5,1 That was it ,all the other setting then change automatically. Uh huh, and all the other SMBIOS values were defaulted by Clover to the exact same settings that arkieboy72472 has shown us. I know, I have seen the source code for Clover. What are your ACPI settings ? Do you have SpeedStep ? If so, how many PStates ? You are such a talker, lol ! Link to comment Share on other sites More sharing options...
jaymack Posted August 5, 2017 Share Posted August 5, 2017 Uh huh, and all the other SMBIOS values were defaulted by Clover to the exact same settings that arkieboy72472 has shown us. I know, I have seen the source code for Clover. What are your ACPI settings ? Do you have SpeedStep ? If so, how many PStates ? You are such a talker, lol ! Have you read this? http://www.insanelymac.com/forum/topic/322454-cant-get-p-states-working/ Link to comment Share on other sites More sharing options...
arkieboy72472 Posted August 6, 2017 Share Posted August 6, 2017 Have you read this? http://www.insanelymac.com/forum/topic/322454-cant-get-p-states-working/ Yea, about that post. Saying what you did and explaining what you did and/or how you did it are two different things. A solution without explanation is useless to me. Link to comment Share on other sites More sharing options...
bisk Posted August 6, 2017 Share Posted August 6, 2017 Have you read this? http://www.insanelymac.com/forum/topic/322454-cant-get-p-states-working/ Yep, it's interesting and I'll watch that thread. As I said, my SpeedStep is working with 2 PStates. You can also tell that my power management is intact by looking at that IORegistryExplorer file that I posted. I was asking you about yours. How many PStates are you getting ? I'm fairly certain that it depends upon the CPU installed. Link to comment Share on other sites More sharing options...
jaymack Posted August 9, 2017 Share Posted August 9, 2017 Was able to install High Sierra 17a330h on my HP Z400. I used APFS and it is seems to be faster. My other install which is Sierra got converted to APFS along the way. 2 Link to comment Share on other sites More sharing options...
jaymack Posted August 9, 2017 Share Posted August 9, 2017 Thanks to Chris. 2 Link to comment Share on other sites More sharing options...
jaymack Posted August 10, 2017 Share Posted August 10, 2017 hi jaymack it would be very nice to explain how 2 about installation I had an existing install of High Sierra 17A291m. I had failed to install using the USB installer method. I could only get as far as being told it would not install on my computer. I then tried the pkg .method which worked. I was not able to continue with the pkg. method for future updates, as it did not work for me. After seeing Beta 5 in the App Store, I decided to clone my existing install, in case things went wrong, and run the Beta 5 update and see what happened. I also wanted to see APFS in action. First I installed the current version of Clover and then Beta 5. This time I did not get the will not install message, and everything went smoothly. I only had to install an older kext to get Wi F working. I used IMac 13.2 in spite of being told I should use Mac Pro 5.1. I am not using nullcpu. 2 Link to comment Share on other sites More sharing options...
ZorroZZ Posted August 18, 2017 Share Posted August 18, 2017 Has anyone managed to bypass the firmware update when installing the High Sierra DP6 on Z800? If so please share... I have managed to boot on my USB and format the SSD with new filesystem, but I'm stuck and can not pass the firmware update. 1 Link to comment Share on other sites More sharing options...
jaymack Posted August 18, 2017 Share Posted August 18, 2017 I updated to Beta 6 from the App Store. Only had to use an older kext from El Capitan to get Wifi working. With version 5, my USB installer had Clover 4173, and the EFI from an existing working version of High Sierra copied to it. Clover 4173 pretty much took care of things. I am using APFS. 1 Link to comment Share on other sites More sharing options...
ZorroZZ Posted August 19, 2017 Share Posted August 19, 2017 Thanks Rockey12! I'm up and running on HS DP6 thanks to chris1111 guid. 1 Link to comment Share on other sites More sharing options...
jaymack Posted August 22, 2017 Share Posted August 22, 2017 DP7 Link to comment Share on other sites More sharing options...
ssprod Posted August 23, 2017 Share Posted August 23, 2017 I wish I knew the kinda stuff you did. I know mine is a Z800 and yours is a 400, but I bet they are similar. Maybe I could show you my config settings and maybe you could shed some insight into what does what. Some of them I know, but some I don't. I don't use a dsdt or ssdt. I can post more data if anyone thinks it will help another user. I also have a reddit post I recently made about my journey with this machine. Maybe it can provide assistance also: https://www.reddit.com/r/hackintosh/comments/6rot8l/lessons_learned_and_still_learning_from_my_second/ Enclosed are some screen shots of what I got going on. The movie is of a recent boot. Watched your video.. try booting with "nv_disable=1" without the quotes. Link to comment Share on other sites More sharing options...
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