Clover Problems and Solutions

[apianti]

So does putting a value in table 132 make it so that the interface/bus speed is that instead of the clock speed multiplied by 4? I wonder 

—>yes. here https://sourceforge.net/p/cloverefiboot/code/4043/tree/rEFIt_UEFI/Platform/smbios.c#l1853

 

if just setting table 4 and table 132 for Nehalem or newer CPUs to base clock (100MHz) will give the correct outcome? 

qpi>base clock

if (no set qpi, set bus frequency(actually base clock)=100,000, enable 132)

newSmbiosTable.Type132->ProcessorBusSpeed = (UINT16)(LShiftU64(DivU64x32(gSettings.BusSpeed(our value), kilo), 2)); 

base clock *4= 100,000*4= 400,000. then we can actually see hw.busfrequency “400,000,000”

 

Read the first lines of that function, that can never happen. I think you did some math wrong there. 100000Hz * 4 = 400000Hz not 400000000Hz  (Oops I'm stupid). Also this is same algorithm used by apple. Problem is, it's still setting it as if it's a quad-pumped FSB. Not just bus speed.

 

Why is zero OK on SB??

—>what is sb? aha sandy bridge. no if set 100,000. have to shown external clock 100mhz in type4. because we consider external clock in config.plist. if set qpi, still consider external clock(not related qpi to calcuate external clock in type 4)

 

EDIT: Forgot, yeah that ending in 6 and 3 conversion is in every Intel CPU reference documentation I could find, back to Pentium, at least.

—> okay. anyway this part is user choice.

EDIT2: Obviously table 132 needs populated with the QPI speed, if QPI is present. I think it is testable whether QPI is present in the CPU. ICR if QPI is tested for now or if it just happens only for Nehalem.

—> yes, i considered this. also checked here https://en.wikipedia.org/wiki/Xeon. but we can adjust qpi on cpu in config.plist

lists

3500-series "Bloomfield"

5500-series "Gainestown"

3600/5600-series "Gulftown" & "Westmere-EP"

6500/7500-series "Beckton"

 

EDIT3: I posted earlier that more than just Nehalem CPUs have QPI, so testing for QPI presence would be better, if that's not going on already. I don't have time to look currently.

--> i tested.

EDIT4: I think that is the outcome that we want actually is using table 132. It overrides the assumption of quad-pumped FSB:

---> already considered in my fixed code.

 

Well, the dumps from actual Macs show that SB has zero in externalClock field of table 4. I can't seem to find one that does not say Unknown (which means zero). There is actually many more microarchitectures that support QPI. Some support both DMI and QPI. What should be done in this case? I think that probably putting base clock in table 4, and setting table 132 no matter what with either base clock or QPI speed may be the answer. Unsure though, I think maybe when IB came out, someone over at apple like had a stroke and somehow they still made him code....

 

EDIT: Forgot, third case, it is a quad-pumped FSB, lol.

[Sherlocks]

Read the first lines of that function, that can never happen. I think you did some math wrong there. 100000Hz * 4 = 400000Hz not 400000000Hz (Oops I'm stupid). Also this is same algorithm used by apple. Problem is, it's still setting it as if it's a quad-pumped FSB. Not just bus speed.

 

 

Well, the dumps from actual Macs show that SB has zero in externalClock field of table 4. I can't seem to find one that does not say Unknown (which means zero). There is actually many more microarchitectures that support QPI. Some support both DMI and QPI. What should be done in this case? I think that probably putting base clock in table 4, and setting table 132 no matter what with either base clock or QPI speed may be the answer. Unsure though, I think maybe when IB came out, someone over at apple like had a stroke and somehow they still made him code....

 

EDIT: Forgot, third case, it is a quad-pumped FSB, lol.

Read the first lines of that function, that can never happen.

 

—> i read. if set qpi, can happen in type 132.

 

I think you did some math wrong there. 100000Hz * 4 = 400000Hz not 400000000Hz

—> i omitted "khz" unit, i think you already can see without khz. sorry

 

Also this is same algorithm used by apple. Problem is, it's still setting it as if it's a quad-pumped FSB. Not just bus speed.

—> yes. Algorithm is same. Just “Not just bus speed”, clover called bus speed(external clock) now. name is wrong. we need to change name for clear.

 

Well, the dumps from actual Macs show that SB has zero in externalClock field of table 4. I can't seem to find one that does not say Unknown (which means zero). There is actually many more microarchitectures that support QPI. Some support both DMI and QPI. What should be done in this case? I think that probably putting base clock in table 4, and setting table 132 no matter what with either base clock or QPI speed may be the answer.

—> youre right. already long time ago, its discussed

https://clover-wiki.zetam.org/Configuration/CPU

http://www.insanelymac.com/forum/topic/253642-dsdt-for-asus-p8p67-m-pro/page-8?do=findComment&comment=1679440

Note: Real Mac’s report a hw.busfrequency = 100000000

To achieve that with Clover here’s what to do:

1 - Drop SMBIOS table type 132 for Sandy Bridge and newer CPU’s. Clover does this if you set QPI to a string value of 0.

2 - Set SMBIOS table type 4->ExternalClock to 0 (or 25Mhz as a real Mac). This currently has to be done in the source code and re-compile Clover.

If you don’t do step 2 then for Sandy Bridge and newer CPU’s, AppleSMBIOS.kext will multiply any non zero values reported by SMBIOS table type 4 -> External Clock by 4. See DHP’s posts for ref.

Unsure though, I think maybe when IB came out, someone over at apple like had a stroke and somehow they still made him code....

—> i considered nehalem case. but it’s only consider qpi calculation. to external clock calculation, no need consider qpi value. it’s cosemetic “This is a purely cosmetic value. Apparently this value only makes sense for Nehalems, the rest should use the formula stated above - or nothing at all.” in clover wiki

 

 

add.

What should be done in this case? I think that probably putting base clock in table 4, and setting table 132 no matter what with either base clock or QPI speed may be the answer.

- you're right. it's proved by macpro5,1

 

 

A user with an old cpu raised a problem with commit r4034 and I checked the clover cpu source section to see if it works well through debug. In the process, some names are confusing and some parts are not working correctly. So I checked through the dump and applesmbios sources to see exactly what the flow was going to work. But Slice talked about bus speed and clover always did external clock / 4 regardless of any cpu. As a result, it was confirmed in old CPU that hw.busfreuncy value and external clock are not correct in old cpu. I do not have an old cpu and now a clover cpu source from a sandy cpu works well. I checked it as a coder and gave feedback to the developer. More than that, the developer must approve. I want you to tell me if it is not right. I will not write about this in the clover bug / report thread anymore. I have analyzed it enough. I would like to thank the Clover Developer team in advance.

macpro5,1.zip

[apianti]

I think the way to do it is for table type 4 set to base clock and table 132 set to bus speed. Bus speed is set to QPI if detected, base clock for SB or newer, or FSB for rest (base clock multiplied by four). The question is whether setting interconnect-speed property is not valid for non-QPI CPU. In this case then table 4 must be base clock divided by 4 for SB or newer, and base clock for everything else. Table 132 only when QPI is detected. Please test if table 4 and table 132 both set to base clock is still good for boot SB or newer, then first method, otherwise, use second. I also agree, I think this is resolved and you can determine which method works better. But clearly anything older than SB, base clock should not be divided by four in table 4.

[Sherlocks]

I think the way to do it is for table type 4 set to base clock and table 132 set to bus speed. Bus speed is set to QPI if detected, base clock for SB or newer, or FSB for rest (base clock multiplied by four). The question is whether setting interconnect-speed property is not valid for non-QPI CPU. In this case then table 4 must be base clock divided by 4 for SB or newer, and base clock for everything else. Table 132 only when QPI is detected. Please test if table 4 and table 132 both set to base clock is still good for boot SB or newer, then first method, otherwise, use second. I also agree, I think this is resolved and you can determine which method works better. But clearly anything older than SB, base clock should not be divided by four in table 4.

I tested all case. tested old cpu with users by using pm. i have skylake(since SB, apple use external clock 25mhz)

If i set

Bus frequency 100,000(factory)khz and

QPI 400mhz in config.plist.

 

In my fixed code, clover first automately determine external clock(i setted 100,000hz in config.plist then external clock 100mhz in type4). Then read qpi value from config.plist. qpi 400. If set qpi in fixed code, can use type 132. ofc except of cpus that have qpi, default(not set qpi) is disabled(auto).

 

Then put 400 in type 132. We can 400 bus speed in sp. also hw.busfrequency 400,000,000hz from applesmbios source(like you said, can see rest external clock part in applesmbios)

 

Code ready(tested old and new cpu with debug). Only remain to change name to avoid confusion. Ofc, No need change name or not. Clover now windows's bus speed name(cpuz) in config.plist and some part in clover source. bus speed(windows)=externalclock(mac).

 

Im waiting developer's opinion and accept about my analyze and result

 

나의 LG-F800S 의 Tapatalk에서 보냄

[apianti]

I'm not sure why you would set your bus speed to 400MHz, it is 100MHz for SB or later - same as base clock. That's the entire reason there is weird 25MHz base clock in table 4, because it's multiplied by 4 like old FSB used to be. As for QPI, I am referring to actually detecting QPI instead of only for Nehalem or when user write into config.plist. I'm pretty positive that if just change this line to remove the check that it is only for Nehalem (which makes no sense because there are a lot more that have QPI). And then this line to check if gCPUStructure.ProcessorInterconnectSpeed == 0 instead of being an else, the value should be set to the bus speed not to the external clock multiplied by four. Also this section does not make sense, the external clock should not be multiplied by four if QPI is not there. The external clock is always just what it is, set that in table 4. The bus speed (in table 132) should be the external clock multiplied by four ONLY if the CPU is older than Nehalem, it's probably better to determine this in the previous section when each microarchitecture has it's own detection. Then the bus speed depends on what the microarchitecture is, if it's older than Nehalem, then it's base clock multiplied by 4, otherwise it is base clock. If QPI is present then it is that instead. ....Those sources are getting ugly.... Not sure what you mean by the windows vs. mac thing, it's just external clock. Bus speed and external/base clock are not interchangeable terms, they used to be the exact same speed because there used to only be one transfer/cycle FSB, didn't matter as much confusing them but some software has still not been able to separate the two concepts. Doesn't help that even the wikipedia page on these concepts is completely contradictory of itself, check out the page for front side bus it talks about using the FSB to calculate the CPU speed, then later it shows how the CPU speed and FSB are actually separately multiplied from the base/external clock, so which is it? lol, it's the second, but still wtf?

[Sherlocks]

I'm not sure why you would set your bus speed to 400MHz, it is 100MHz for SB or later - same as base clock. That's the entire reason there is weird 25MHz base clock in table 4, because it's multiplied by 4 like old FSB used to be. As for QPI, I am referring to actually detecting QPI instead of only for Nehalem or when user write into config.plist. I'm pretty positive that if just change this line to remove the check that it is only for Nehalem (which makes no sense because there are a lot more that have QPI). And then this line to check if gCPUStructure.ProcessorInterconnectSpeed == 0 instead of being an else, the value should be set to the bus speed not to the external clock multiplied by four. Also this section does not make sense, the external clock should not be multiplied by four if QPI is not there. The external clock is always just what it is, set that in table 4. The bus speed (in table 132) should be the external clock multiplied by four ONLY if the CPU is older than Nehalem, it's probably better to determine this in the previous section when each microarchitecture has it's own detection. Then the bus speed depends on what the microarchitecture is, if it's older than Nehalem, then it's base clock multiplied by 4, otherwise it is base clock. If QPI is present then it is that instead. ....Those sources are getting ugly.... Not sure what you mean by the windows vs. mac thing, it's just external clock. Bus speed and external/base clock are not interchangeable terms, they used to be the exact same speed because there used to only be one transfer/cycle FSB, didn't matter as much confusing them but some software has still not been able to separate the two concepts. Doesn't help that even the wikipedia page on these concepts is completely contradictory of itself, check out the page for front side bus it talks about using the FSB to calculate the CPU speed, then later it shows how the CPU speed and FSB are actually separately multiplied from the base/external clock, so which is it? lol, it's the second, but still wtf?

 

I'm not sure why you would set your bus speed to 400MHz, it is 100MHz for SB or later - same as base clock. That's the entire reason there is weird 25MHz base clock in table 4, because it's multiplied by 4 like old FSB used to be. As for QPI

—> i know. to report it to you, its for test that qpi and busfrequency function acutally work or not in config.plist.

 

I am referring to actually detecting QPI instead of only for Nehalem or when user write into config.plist. I'm pretty positive that if just change this line to remove the check that it is only for Nehalem (which makes no sense because there are a lot more that have QPI). And then this line to check if gCPUStructure.ProcessorInterconnectSpeed == 0 instead of being an else, the value should be set to the bus speed not to the external clock multiplied by four. Also this section does not make sense, the external clock should not be multiplied by four if QPI is not there. The external clock is always just what it is, set that in table 4. The bus speed (in table 132) should be the external clock multiplied by four ONLY if the CPU is older than Nehalem, it's probably better to determine this in the previous section when each microarchitecture has it's own detection. 

—> i know enough what you mentioned. and consider that case. also checked if gCPUStructure.ProcessorInterconnectSpeed == 0 with debug. 

 

Then the bus speed depends on what the microarchitecture is, if it's older than Nehalem, than it's base clock multiplied by 4, otherwise it is base clock. If QPI is present then it is that instead. ....Those sources are getting ugly.... Not sure what you mean by the windows vs. mac thing, it's just external clock. Bus speed and external/base clock are not interchangeable terms, they used to be the exact same speed because there used to only be one transfer/cycle FSB, didn't matter as much confusing them but some software has still not been able to separate the two concepts. Doesn't help that even the wikipedia page on these concepts is completely contradictory of itself, check out the page for front side bus it talks about using the FSB to calculate the CPU speed, then later it shows how the CPU speed and FSB are actually separately multiplied from the base/external clock, so which is it? lol, it's the second, but still wtf?

--> right. 

 

Also this section does not make sense, the external clock should not be multiplied by four if QPI is not there.

---> checked it with debug.

 

what is your think about external clock on old cpu in latest clover? no problem?

also wonder my analyze is not correct? entire cpu flow http://www.insanelymac.com/forum/topic/306156-clover-bugissue-report-and-patch/?p=2456983 except qpi case.

 

 

If there is no problem, I will not mention it anymore. I will save the modified code separately, as it may be referenced again by someone in the future.

I am not good at English. I am sorry that I can not communicate my thoughts in my head and cause confusion.

 

sorry again.

[apianti]

Those were the corrections that need made to that code, in addition to correcting the clock and bus. I can't currently do it cause I can't check out and build right now. You aren't causing confusion, if you made these changes then commit them man. It's hard to say without seeing the changes, but if you did the algorithm that I just explained, and it works, then that is how it should work. Not sure what you mean about the checked with debug, that section is straight up unnecessary and does not give correct results.

[Slice]

That is what I tried initially and didn't work, also why I decided to post this in this dev oriented thread - because I do hope I don't come across like just seeking support.

 

 

No, this thread is for sources proposition.

There is a thread to discussion near.

[Sherlocks]

Hi,

 

One other thing with Nvidia injection.

 

I've a GT 640 that have a bad EFI bios.

If I choose Nvidia injection screen is coming scrambled.

 

Need to add this injection to get OK:

                           "NVDA,noEFI", 
                            Buffer (0x05)
                            {
                                "true"
                            }, 

It should be interesting to get an option in clover to select or not for people who get same trouble like me.

 

Another point is memory size detected in in case of injection, I do this modification to get good size.

 
} else { // >= NV_ARCH_C0
        
       // ctrlr_num = nv_rd32(dev, NVC0_MEM_CTRLR_COUNT);
       // ctrlr_amt = nv_rd32(dev, NVC0_MEM_CTRLR_RAM_AMOUNT);
       // dev_priv->vram_size = ctrlr_num * (ctrlr_amt << 20);
        
//vram_size = LShiftU64(REG32(nvda_dev->regs, NVC0_MEM_CTRLR_RAM_AMOUNT), 20);
        
         vram_size = LShiftU64(2 * REG32(nvda_dev->regs, NVC0_MEM_CTRLR_RAM_AMOUNT), 20);
        
 
        
      //  vram_size = REG32(nvda_dev->regs, NVC0_MEM_CTRLR_RAM_AMOUNT);
    // vram_size *= REG32(nvda_dev->regs, NVC0_MEM_CTRLR_COUNT);
       // vram_size = MultU64x32(vram_size, REG32(nvda_dev->regs, NVC0_MEM_CTRLR_COUNT));
        //vram_size =  REG32(nvda_dev->regs, NVC0_MEM_CTRLR_COUNT);
 
}
 

Fred

 

 

 

Same thing with StriStr.

 

EDIT

 

i change test != to ==:

gDriversFlags.HFSLoaded = TRUE;

} else if (StrStr(FileName, L"apfs") == NULL) {

gDriversFlags.APFSLoaded = TRUE;

And same trouble, mean that the trouble is not on this line !

what about that :

0:141 0:000 PlatformDriverOverrideProtocol not found. Installing ... Success

EDIT:

It was my fault !

I did not copy main and menu in the good directory.

Need also to change StrStr to StriStr on apfs test.

Don't know why, name is in EFI/CLOVER/drivers64UEFI apfs.efi and show APFS!

 

 

Fred

Hi FredWst.

In ndivia web driver, shown ram size wrong?

How about ram size of oob driver?

 

나의 LG-F800S 의 Tapatalk에서 보냄

[Riley Freeman]

CPU output from 4110 on my laptop:

0:100  0:000  FSBFrequency = 100 MHz, DMI FSBFrequency = 100 MHz, Corrected FSBFrequency = 100 MHz
0:100  0:000  MaxDiv/MinDiv: 24.0/12
0:100  0:000  Turbo: 24/24/24/24
0:100  0:000  Features: 0xBFEBFBFF
0:100  0:000  Threads: 4
0:100  0:000  Cores: 2
0:100  0:000  FSB: 100 MHz
0:100  0:000  CPU: 2400 MHz
0:100  0:000  TSC: 2400 MHz
0:100  0:000  PIS: 100 MHz
0:100  0:000  ExternalClock: 25 MHz

hw.busfrequency: 96000000

[Sherlocks]

CPU output from 4110 on my laptop:

0:100  0:000  FSBFrequency = 100 MHz, DMI FSBFrequency = 100 MHz, Corrected FSBFrequency = 100 MHz
0:100  0:000  MaxDiv/MinDiv: 24.0/12
0:100  0:000  Turbo: 24/24/24/24
0:100  0:000  Features: 0xBFEBFBFF
0:100  0:000  Threads: 4
0:100  0:000  Cores: 2
0:100  0:000  FSB: 100 MHz
0:100  0:000  CPU: 2400 MHz
0:100  0:000  TSC: 2400 MHz
0:100  0:000  PIS: 100 MHz
0:100  0:000  ExternalClock: 25 MHz

hw.busfrequency: 96000000

CPU log is no problem.

need your log, Attach full log.

 

나의 LG-F800S 의 Tapatalk에서 보냄

[Riley Freeman]

CPU log is no problem.

need your log, Attach full log.

 

Here you go.

 

 

bdmesg.zip

[Sherlocks]

Here you go.

hw.busfrequency: 96000000

 

your cpu tsc calculation is not correct.

Finally: ExternalClock=24MHz Bus=99773kHz CPU=2395MHz

 

24*4=96,000,000

 

try busspeedfrequency 100,000khz

 

source is no problem now. some device's calculation is not correct.

read instruction from clover wiki. ofc clover can use correct value from getcpuproperties. but i dont know why slice makes code that use tsc calibrate after getcpuproperties.

 

https://clover-wiki.zetam.org/Configuration/CPU

DMI stores this value in MHz, which is not accurate in contrast to a value calculated from CPU frequency. You can choose a more accurate value, if needed. For example my DMI has a value of 100 MHz, however manually overriding it to a value of 99790 kHz produced better clocks.

[Riley Freeman]

Setting busspeed in config.plist fixed the sysctl output.

[Sherlocks]

Setting busspeed in config.plist fixed the sysctl output.

 

yes. this is standard(clover wiki) of clover since clover start.

 

my laptop also needs to add 100,000 to match correctly it.

Finally: ExternalClock=25MHz Bus=100203kHz CPU=2305MHz

[Riley Freeman]

Must be a laptop thing. I didn't need to set bus speed for either desktop.

[apianti]

You may actually want to run some tests with your clock and other time related things like audio/video. Your CPU may actually be under-clocked, especially if it is mobile. It is not uncommon for mobile processors to be limited because of power management. So 96MHz may in fact be a better value, if your CPU is indeed under-clocked.

[Riley Freeman]

I'll take a look at that alright. I know the timer at the Clover boot menu takes about twice as long to count down as on the desktops. Before these recent changes I had QPI=100 in my config and didn't notice any ill effects.

[Slice]

hw.busfrequency: 96000000

 

your cpu tsc calculation is not correct.

Finally: ExternalClock=24MHz Bus=99773kHz CPU=2395MHz

 

24*4=96,000,000

 

try busspeedfrequency 100,000khz

 

source is no problem now. some device's calculation is not correct.

read instruction from clover wiki. ofc clover can use correct value from getcpuproperties. but i dont know why slice makes code that use tsc calibrate after getcpuproperties.

 

https://clover-wiki.zetam.org/Configuration/CPU

DMI stores this value in MHz, which is not accurate in contrast to a value calculated from CPU frequency. You can choose a more accurate value, if needed. For example my DMI has a value of 100 MHz, however manually overriding it to a value of 99790 kHz produced better clocks.

It may be a difference between Core2Duo and modern i5.

For Core2Duo I am sure in value 99790 becuase I was observed system timer. It run or lost depending on this value.

Not on value from Smbios table. On value from DataHub "FSBFrequency". 100000 was wrong for me. Sure!

[Sherlocks]

It may be a difference between Core2Duo and modern i5.

For Core2Duo I am sure in value 99790 becuase I was observed system timer. It run or lost depending on this value.

Not on value from Smbios table. On value from DataHub "FSBFrequency". 100000 was wrong for me. Sure!

 

right. thank you for reply.

i see aida64 engineer's report. maybe i think tsc calibrate is correct. bus speeds are slightly different.

 

also shown this

http://cpuboss.com/cpus/Intel-Core-i5-6200U-vs-Intel-Core-i3-6100U

Overclocking Overclocked clock speed 2.8 GHz   2.31 GHz

 

clover log

 1st boot Finally: ExternalClock=25MHz BusSpeed=100274kHz CPU=2306MHz PIS: hw.busfrequency=100000000Hz

2nd boot Finally: ExternalClock=25MHz BusSpeed=100235kHz CPU=2305MHz PIS: hw.busfrequency=100000000Hz

3rd boot Finally: ExternalClock=25MHz BusSpeed=100193kHz CPU=2304MHz PIS: hw.busfrequency=100000000Hz

 

I can not be sure, but it looks good.

[SavageAUS]

I'll take a look at that alright. I know the timer at the Clover boot menu takes about twice as long to count down as on the desktops. Before these recent changes I had QPI=100 in my config and didn't notice any ill effects.

The countdown timer on my laptop is also very slow, never really took much notice of it until now.

 

i7-4510U

https://ark.intel.com/products/81015/Intel-Core-i7-4510U-Processor-4M-Cache-up-to-3_10-GHz

Shanes-MBP:~ shane$ sysctl -a | grep bus
vm.pageout_cleaned_busy: 0
hw.busfrequency_max: 96000000
hw.busfrequency_min: 96000000
hw.busfrequency: 96000000
machdep.xcpm.maxbusdelay: 0

After setting 100,000 BusSpeedkHz in config.plist

Shanes-MBP:~ shane$ sysctl -a | grep bus
vm.pageout_cleaned_busy: 0
hw.busfrequency_max: 100000000
hw.busfrequency_min: 100000000
hw.busfrequency: 100000000
machdep.xcpm.maxbusdelay: 0

Terminal Saved Output.zip

Terminal Saved Output BusSpeedkHz.zip

[Sherlocks]

 

The countdown timer on my laptop is also very slow, never really took much notice of it until now.

 

i7-4510U

https://ark.intel.com/products/81015/Intel-Core-i7-4510U-Processor-4M-Cache-up-to-3_10-GHz

Shanes-MBP:~ shane$ sysctl -a | grep bus
vm.pageout_cleaned_busy: 0
hw.busfrequency_max: 96000000
hw.busfrequency_min: 96000000
hw.busfrequency: 96000000
machdep.xcpm.maxbusdelay: 0

After setting 100,000 BusSpeedkHz in config.plist

Shanes-MBP:~ shane$ sysctl -a | grep bus
vm.pageout_cleaned_busy: 0
hw.busfrequency_max: 100000000
hw.busfrequency_min: 100000000
hw.busfrequency: 100000000
machdep.xcpm.maxbusdelay: 0

 

no need qpi=0 now since clover 4110.

1:561  0:000  PluginType: 1

1:561  0:000  ChassisType: 0x8

1:561  0:000  QPI: 0MHz

1:561  0:000  BusSpeed: 100000kHz

[Slice]

@Sherlocks

What is the profit of your changes to Busspeed?

Now I got 

hw.busfrequency: 1332000000

on my Code2Duo. Comp #4 in signature.

As I already said this is wrong value for macOS no matter what Intel spec and cpu-z may say.

[Sherlocks]

@Sherlocks

What is the profit of your changes to Busspeed?

Now I got 

hw.busfrequency: 1332000000

on my Code2Duo. Comp #4 in signature.

As I already said this is wrong value for macOS no matter what Intel spec and cpu-z may say.

 

i followed old realmac dmi dump for only old cpu, except sandy and newer.

here is process. this is realmac dmi dump process. i attached darwin dump imac8,1

 

Version: Intel® Core2 Duo CPU     E8435  @ 3.06GHz

Voltage: 1.6 V

External Clock: 266 MHz

Max Speed: 3060 MHz

Current Speed: 3060 MHz

Status: Populated, Enabled

Upgrade: ZIF Socket

L1 Cache Handle: 0x0002

L2 Cache Handle: No L2 Cache

L3 Cache Handle: No L3 Cache

Serial Number: Not Specified

Asset Tag: Unknown

Part Number: Not Specified

 

 

    // Fetch cpu and bus nominal frequencies.

 

    SMB_ANCHOR_RESET(&anchor);

    if (findSMBIOSStructure(&anchor, kSMBTypeProcessorInformation,

        kSMBProcessorInformationMinSize))

    {

        const SMBProcessorInformation * cpuInfo =

            (const SMBProcessorInformation *) anchor.header;

 

        cpuSpeedMHz = cpuInfo->maximumClock;   

        DEBUG_LOG("SMBIOS: CPU speed (MHz) = %u\n", cpuSpeedMHz);

        if (busSpeedMTs == 0)

        {

            busSpeedMTs = cpuInfo->externalClock;                                 <---- external clock =266mhz

            busSpeedMTs *= 4;  // Assume quad-pumped FSB                 <————busSpeedMTs = 266*4=1064

            DEBUG_LOG("SMBIOS: FSB speed (MT/s) = %u\n", busSpeedMTs);

        }

    }

 

    if (busSpeedMTs)

    {

        uint64_t rateInTs = ((uint64_t) busSpeedMTs) * 1000000ULL;       <————1064000000hz

 

        gPEClockFrequencyInfo.bus_frequency_hz     = rateInTs;

        gPEClockFrequencyInfo.bus_frequency_min_hz = rateInTs;

        gPEClockFrequencyInfo.bus_frequency_max_hz = rateInTs;     

        gPEClockFrequencyInfo.bus_clock_rate_hz    =

            (rateInTs < (1ULL << 32)) ? (uint32_t) rateInTs : 0xFFFFFFFF;

    }

 

 

hw.busfrequency: 1064000000

hw.busfrequency_min: 1064000000

hw.busfrequency_max: 1064000000

hw.cpufrequency: 3060000000

hw.cpufrequency_min: 3060000000

hw.cpufrequency_max: 3060000000

hw.cachelinesize: 64

 

but

if follow like you said in r4097,

 

Version: Intel® Core2 Duo CPU     E6850  @ 3.00GHz

External Clock: 83 MHz=333/4 .  <----- clover r4097 always divide external clock by 4.

 

then

 

    // Fetch cpu and bus nominal frequencies.

 

    SMB_ANCHOR_RESET(&anchor);

    if (findSMBIOSStructure(&anchor, kSMBTypeProcessorInformation,

        kSMBProcessorInformationMinSize))

    {

        const SMBProcessorInformation * cpuInfo =

            (const SMBProcessorInformation *) anchor.header;

 

        cpuSpeedMHz = cpuInfo->maximumClock;   

        DEBUG_LOG("SMBIOS: CPU speed (MHz) = %u\n", cpuSpeedMHz);

        if (busSpeedMTs == 0)

        {

            busSpeedMTs = cpuInfo->externalClock;                                 <---- external clock =83mhz

            busSpeedMTs *= 4;  // Assume quad-pumped FSB                 <————busSpeedMTs = 83*4=332

            DEBUG_LOG("SMBIOS: FSB speed (MT/s) = %u\n", busSpeedMTs);

        }

    }

 

    if (busSpeedMTs)

    {

        uint64_t rateInTs = ((uint64_t) busSpeedMTs) * 1000000ULL;       <————332000000hz

 

        gPEClockFrequencyInfo.bus_frequency_hz     = rateInTs;

        gPEClockFrequencyInfo.bus_frequency_min_hz = rateInTs;

        gPEClockFrequencyInfo.bus_frequency_max_hz = rateInTs;     

        gPEClockFrequencyInfo.bus_clock_rate_hz    =

            (rateInTs < (1ULL << 32)) ? (uint32_t) rateInTs : 0xFFFFFFFF;

    }

 

 

hw.busfrequency: 332000000

hw.busfrequency_min: 332000000

hw.busfrequency_max: 332000000

 

this is what you want? it seems external clock value is wrong. in r4097, not consider old cpu case, always divide external clock by 4.

I do not want to profit, just follow Apple's standards.

 

add. process is same sandy and old. just for sand and newer, divide external clock by 4, to match external clock 25mhz.

iMac8,1_F227BEC8_X64_DarwinDumper.zip

[Slice]

OK, let it be. Previously I had this with QPI=0 or 0xFFFF