Balamut Posted January 31, 2014 Share Posted January 31, 2014 That is because bit-27 in MSR 0xE2 isn't set. Thanks Pike, well if it's bios lock then I'm freshly SOL because I went trough nvram and bios and can't seem to find it.... Link to comment Share on other sites More sharing options...
omni Posted January 31, 2014 Author Share Posted January 31, 2014 That is because bit-27 in MSR 0xE2 isn't set. Can we manually set the bits 25-28 in MSR 0xE2, or do they depend on something else? (obviously MSR 0xE2 bit 15 should be unset for this to work) Link to comment Share on other sites More sharing options...
Pike R. Alpha Posted February 1, 2014 Share Posted February 1, 2014 Can we manually set the bits 25-28 in MSR 0xE2, or do they depend on something else? (obviously MSR 0xE2 bit 15 should be unset for this to work) Yes you can,but looking at _SandybridgeCStateRegInit it only ignores bits 26, 25, 15, 2, 1 and 0 so people with a sandy Bridge processor should have these set. Looking at IvybridgeCStateRegInit that also ignores bits 28 and 27 on top of it. Which of course is why you won't see them set, and C3 residency is zero. I'd say change the AND mask so that it doesn't ignore bit 27. Should be a piece of cake for you 3 Link to comment Share on other sites More sharing options...
omni Posted February 1, 2014 Author Share Posted February 1, 2014 Yes you can,but looking at _SandybridgeCStateRegInit it only ignores bits 26, 25, 15, 2, 1 and 0 so people with a sandy Bridge processor should have these set. Looking at IvybridgeCStateRegInit that also ignores bits 28 and 27 on top of it. Which of course is why you won't see them set, and C3 residency is zero. I'd say change the AND mask so that it doesn't ignore bit 27. Should be a piece of cake for you It's a matter of approach though as we don't want to be patching AICPM if we can help it. I'm thinking instead setting the MSR from the boot loader using my MSRpatcher module... Link to comment Share on other sites More sharing options...
Pike R. Alpha Posted February 1, 2014 Share Posted February 1, 2014 It's a matter of approach though as we don't want to be patching AICPM if we can help it. I'm thinking instead setting the MSR from the boot loader using my MSRpatcher module... Sure. I agree with you about patching as little as possible, but the problem is that the AND mask in IvybridgeCStateRegInit ignores the bit, so it basically wipes it. Link to comment Share on other sites More sharing options...
omni Posted February 1, 2014 Author Share Posted February 1, 2014 Do you know what purpose wiping the bits in this context has though? I ran AICPMI on a real iMac and its 0xE2 value was 0x403, yet C2/C3/C6 RESIDENCY was set. Link to comment Share on other sites More sharing options...
shilohhh Posted February 1, 2014 Share Posted February 1, 2014 @ omni, Is it possible to make Chameleon show our CPU as IvyBridge-E (0x3e) instead of SandyBridge-E (0x2d)? Would this eliminate the need to patch AICPUPM? Link to comment Share on other sites More sharing options...
omni Posted February 1, 2014 Author Share Posted February 1, 2014 I suppose that could work if cpuid is patched but might not work if cpuid is implemented locally. And just imagine the kind of havoc it would cause to the rest of the OS that relies on the cpuid for correct identification and any apps relying on it. Link to comment Share on other sites More sharing options...
stinga11 Posted February 1, 2014 Share Posted February 1, 2014 This is ok ? because the number of MSR_PKGC3_IRTL MSR_PKGC6_IRTL MSR_PKGC7_IRTL is 0x0 and I don't know if my MSR 0xE2 number is correct. you can tell me? other thing why my CPU Maximum Turbo Frequency is 5700 My cpu is 3960x and my board is ASUS Rampage IV Extreme AICPUPMI: v3.3 Copyright © 2012-2014 Pike R. Alpha. All rights reserved AICPUPMI: logMSRs............................: 1 AICPUPMI: logIGPU............................: 0 AICPUPMI: logCStates.........................: 1 AICPUPMI: logIPGStyle........................: 1 AICPUPMI: MWAIT C-States.....................: 135456 AICPUPMI: MSR_CORE_THREAD_COUNT......(0x35) : 0x6000C AICPUPMI: MSR_PLATFORM_INFO..........(0xCE) : 0xC0070012100 AICPUPMI: MSR_PMG_CST_CONFIG_CONTROL.(0xE2) : 0x1E000407 AICPUPMI: MSR_PMG_IO_CAPTURE_BASE....(0xE4) : 0x20414 AICPUPMI: IA32_MPERF.................(0xE7) : 0x1FB0D22B10 AICPUPMI: IA32_APERF.................(0xE8) : 0x1D92C2C360 AICPUPMI: MSR_FLEX_RATIO.............(0x194) : 0xE0000 AICPUPMI: MSR_IA32_PERF_STATUS.......(0x198) : 0x266E00002100 AICPUPMI: MSR_IA32_PERF_CONTROL......(0x199) : 0x2100 AICPUPMI: IA32_CLOCK_MODULATION......(0x19A) : 0x0 AICPUPMI: IA32_THERM_STATUS..........(0x19C) : 0x882C0000 AICPUPMI: IA32_MISC_ENABLES..........(0x1A0) : 0x850089 AICPUPMI: MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400000 AICPUPMI: MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x2424393939393939 AICPUPMI: IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x0 AICPUPMI: MSR_POWER_CTL..............(0x1FC) : 0x25040059 AICPUPMI: MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003 AICPUPMI: MSR_PKG_POWER_LIMIT........(0x610) : 0x69F40005A9F40 AICPUPMI: MSR_PKG_ENERGY_STATUS......(0x611) : 0xBD6BF7A AICPUPMI: MSR_PKGC3_IRTL.............(0x60a) : 0x8842 AICPUPMI: MSR_PKGC6_IRTL.............(0x60b) : 0x886A AICPUPMI: MSR_PKGC7_IRTL.............(0x60c) : 0x8891 AICPUPMI: MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x141494800007F8 AICPUPMI: MSR_PP0_POWER_LIMIT........(0x638) : 0x0 AICPUPMI: MSR_PP0_ENERGY_STATUS......(0x639) : 0x9677D41 AICPUPMI: MSR_PP0_POLICY.............(0x63a) : 0x0 AICPUPMI: MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x0 AICPUPMI: MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x0 AICPUPMI: MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0 AICPUPMI: MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0 AICPUPMI: CPU Low Frequency Mode.............: 1200 MHz AICPUPMI: CPU Maximum non-Turbo Frequency....: 3300 MHz AICPUPMI: CPU Maximum Turbo Frequency........: 5700 MHz AICPUPMI: CPU P-States [ 32 (33) ] AICPUPMI: CPU P-States [ 31 32 (33) ] AICPUPMI: CPU P-States [ (12) 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 15 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 15 22 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 15 22 23 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 22 23 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 18 22 23 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 18 22 23 24 30 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 18 22 23 24 26 30 31 32 33 ] AICPUPMI: CPU C3-Cores [ 0 1 ] AICPUPMI: CPU C6-Cores [ 0 2 6 8 ] AICPUPMI: CPU P-States [ (12) 13 15 18 21 22 23 24 26 30 31 32 33 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 ] AICPUPMI: CPU C6-Cores [ 0 2 4 6 8 9 10 ] AICPUPMI: CPU P-States [ 12 13 15 18 21 (22) 23 24 26 30 31 32 33 36 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 11 ] AICPUPMI: CPU C6-Cores [ 0 2 3 4 6 8 9 10 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 8 11 ] AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 8 9 10 11 ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 (36) ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 7 8 10 11 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 6 7 8 9 10 11 ] AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 36 (39) ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 35 36 (39) ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 35 36 38 (39) ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 6 7 8 9 10 11 ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 35 36 37 38 (39) ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ] AICPUPMI: CPU P-States [ (12) 13 15 18 20 21 22 23 24 26 28 30 31 32 33 35 36 37 38 39 ] AICPUPMI: CPU P-States [ (12) 13 14 15 18 20 21 22 23 24 26 28 30 31 32 33 35 36 37 38 39 ] AICPUPMI: CPU P-States [ (12) 13 14 15 18 20 21 22 23 24 25 26 28 30 31 32 33 35 36 37 38 39 ] AICPUPMI: CPU P-States [ 12 13 14 15 17 18 20 21 22 23 24 25 26 (28) 30 31 32 33 35 36 37 38 39 ] Link to comment Share on other sites More sharing options...
shilohhh Posted February 1, 2014 Share Posted February 1, 2014 I suppose that could work if cpuid is patched but might not work if cpuid is implemented locally. And just imagine the kind of havoc it would cause to the rest of the OS that relies on the cpuid for correct identification and any apps relying on it. How about a kext similar to nullcpupm that just tells AICPUPM that we have the correct CPU? Link to comment Share on other sites More sharing options...
joe75 Posted February 1, 2014 Share Posted February 1, 2014 that would be a "nub" kext, not a "null" kext Link to comment Share on other sites More sharing options...
omni Posted February 1, 2014 Author Share Posted February 1, 2014 This is ok ? because the number of MSR_PKGC3_IRTL MSR_PKGC6_IRTL MSR_PKGC7_IRTL is 0x0 and I don't know if my MSR 0xE2 number is correct. you can tell me? other thing why my CPU Maximum Turbo Frequency is 5700 My cpu is 3960x and my board is ASUS Rampage IV Extreme AICPUPMI: v3.3 Copyright © 2012-2014 Pike R. Alpha. All rights reserved AICPUPMI: logMSRs............................: 1 AICPUPMI: logIGPU............................: 0 AICPUPMI: logCStates.........................: 1 AICPUPMI: logIPGStyle........................: 1 AICPUPMI: MWAIT C-States.....................: 135456 AICPUPMI: MSR_CORE_THREAD_COUNT......(0x35) : 0x6000C AICPUPMI: MSR_PLATFORM_INFO..........(0xCE) : 0xC0070012100 AICPUPMI: MSR_PMG_CST_CONFIG_CONTROL.(0xE2) : 0x1E000407 AICPUPMI: MSR_PMG_IO_CAPTURE_BASE....(0xE4) : 0x20414 AICPUPMI: IA32_MPERF.................(0xE7) : 0x1FB0D22B10 AICPUPMI: IA32_APERF.................(0xE8) : 0x1D92C2C360 AICPUPMI: MSR_FLEX_RATIO.............(0x194) : 0xE0000 AICPUPMI: MSR_IA32_PERF_STATUS.......(0x198) : 0x266E00002100 AICPUPMI: MSR_IA32_PERF_CONTROL......(0x199) : 0x2100 AICPUPMI: IA32_CLOCK_MODULATION......(0x19A) : 0x0 AICPUPMI: IA32_THERM_STATUS..........(0x19C) : 0x882C0000 AICPUPMI: IA32_MISC_ENABLES..........(0x1A0) : 0x850089 AICPUPMI: MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400000 AICPUPMI: MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x2424393939393939 AICPUPMI: IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x0 AICPUPMI: MSR_POWER_CTL..............(0x1FC) : 0x25040059 AICPUPMI: MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003 AICPUPMI: MSR_PKG_POWER_LIMIT........(0x610) : 0x69F40005A9F40 AICPUPMI: MSR_PKG_ENERGY_STATUS......(0x611) : 0xBD6BF7A AICPUPMI: MSR_PKGC3_IRTL.............(0x60a) : 0x8842 AICPUPMI: MSR_PKGC6_IRTL.............(0x60b) : 0x886A AICPUPMI: MSR_PKGC7_IRTL.............(0x60c) : 0x8891 AICPUPMI: MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x141494800007F8 AICPUPMI: MSR_PP0_POWER_LIMIT........(0x638) : 0x0 AICPUPMI: MSR_PP0_ENERGY_STATUS......(0x639) : 0x9677D41 AICPUPMI: MSR_PP0_POLICY.............(0x63a) : 0x0 AICPUPMI: MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x0 AICPUPMI: MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x0 AICPUPMI: MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0 AICPUPMI: MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0 AICPUPMI: CPU Low Frequency Mode.............: 1200 MHz AICPUPMI: CPU Maximum non-Turbo Frequency....: 3300 MHz AICPUPMI: CPU Maximum Turbo Frequency........: 5700 MHz AICPUPMI: CPU P-States [ 32 (33) ] AICPUPMI: CPU P-States [ 31 32 (33) ] AICPUPMI: CPU P-States [ (12) 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 15 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 15 22 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 15 22 23 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 22 23 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 18 22 23 24 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 18 22 23 24 30 31 32 33 ] AICPUPMI: CPU P-States [ (12) 13 15 18 22 23 24 26 30 31 32 33 ] AICPUPMI: CPU C3-Cores [ 0 1 ] AICPUPMI: CPU C6-Cores [ 0 2 6 8 ] AICPUPMI: CPU P-States [ (12) 13 15 18 21 22 23 24 26 30 31 32 33 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 ] AICPUPMI: CPU C6-Cores [ 0 2 4 6 8 9 10 ] AICPUPMI: CPU P-States [ 12 13 15 18 21 (22) 23 24 26 30 31 32 33 36 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 11 ] AICPUPMI: CPU C6-Cores [ 0 2 3 4 6 8 9 10 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 8 11 ] AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 8 9 10 11 ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 (36) ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 7 8 10 11 ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 6 7 8 9 10 11 ] AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 36 (39) ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 35 36 (39) ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 35 36 38 (39) ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 6 7 8 9 10 11 ] AICPUPMI: CPU P-States [ 12 13 15 18 20 21 22 23 24 26 30 31 32 33 35 36 37 38 (39) ] AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ] AICPUPMI: CPU P-States [ (12) 13 15 18 20 21 22 23 24 26 28 30 31 32 33 35 36 37 38 39 ] AICPUPMI: CPU P-States [ (12) 13 14 15 18 20 21 22 23 24 26 28 30 31 32 33 35 36 37 38 39 ] AICPUPMI: CPU P-States [ (12) 13 14 15 18 20 21 22 23 24 25 26 28 30 31 32 33 35 36 37 38 39 ] AICPUPMI: CPU P-States [ 12 13 14 15 17 18 20 21 22 23 24 25 26 (28) 30 31 32 33 35 36 37 38 39 ] That is bizarre... You have no Cx RESIDENCY by C3/C6 states show, probably because your MSR 0xE2 is 0x1E000407 so the 0x1E.... sets the high bits. Your Cx_IRTL is not 0, are you using my MSRpatcher module for Chameleon, because it would set those values? Also, your Turbo Ratio Limit is totally off... 0x39 multiplier ? Is that an OC CPU ? Should be 0x27 for that CPU (39x100) What does your HWMonitor say, how low does your CPU Package Cores reach? Link to comment Share on other sites More sharing options...
magnifico Posted February 1, 2014 Share Posted February 1, 2014 other thing why my CPU Maximum Turbo Frequency is 5700 This is an error setting in your bios, you have by per core, or by all core ? Mhmm please why dont have in my sistem x86PlatFormPlugIn Link to comment Share on other sites More sharing options...
shilohhh Posted February 1, 2014 Share Posted February 1, 2014 Not sure what to make of this... From Pike's github: Add Intel Power Gadget style logging Note: This does not show you the P-States thatAppleIntelCPUPowerManagement.kext/mach_kernel activates, by writing tothe MSR 0x199, but instead shows you the actual state of the processor! It seems the newer version of AICPUPMI is reporting the same way as IPG. Am I wrong, or isn't this an inaccurate way to figure out if we are actually reaching all our PStates? With the older AICPUPMI I only reached 12 32 & 44 but IPG always showed 32 or above. This made sense if I was only hitting 12 for a fraction of a second from time to time and lower states weren't really working right. With the newer version I show all Pstates and I feel like it's not actually using those extra states. If I set APLF to Zero in SSDT, it locks me at 12x and I idle @ 4watts and load @ 25watts so it seems like that's the range for 12x depending on CPU load. If I set APLF correctly again, IPG sows me stepping between 32x and 44x and idle a @ 5-6watts and load @ 160-180watts. This makes me think that I'm never actually stepping below 32. Will the CPU only use 6watts at 32x when no load is present? Just trying to figure out which tool is wrong and if my PM is working correctly Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: v3.2 Copyright © 2012-2014 Pike R. Alpha. All rights reserved Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: logMSRs............................: 1 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: logIGPU............................: 0 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: logCStates.........................: 1 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: logIPGStyle........................: 1 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MWAIT C-States.....................: 135456 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_CORE_THREAD_COUNT......(0x35) : 0x6000C Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PLATFORM_INFO..........(0xCE) : 0xC0070012000 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PMG_CST_CONFIG_CONTROL.(0xE2) : 0x1E000403 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PMG_IO_CAPTURE_BASE....(0xE4) : 0x20414 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: IA32_MPERF.................(0xE7) : 0x5353C96 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: IA32_APERF.................(0xE8) : 0x71DF4BD Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_FLEX_RATIO.............(0x194) : 0xE0000 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_IA32_PERF_STATUS.......(0x198) : 0x29F400002C00 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_IA32_PERF_CONTROL......(0x199) : 0x2D00 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: IA32_CLOCK_MODULATION......(0x19A) : 0x0 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: IA32_THERM_STATUS..........(0x19C) : 0x882F0008 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: IA32_MISC_ENABLES..........(0x1A0) : 0x850089 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400001 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x393939393939 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x0 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_POWER_CTL..............(0x1FC) : 0x2104005F Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKG_POWER_LIMIT........(0x610) : 0x8006FFFF00C8FFFF Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKG_ENERGY_STATUS......(0x611) : 0x2E6C5F85 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKGC3_IRTL.............(0x60a) : 0x8850 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKGC6_IRTL.............(0x60b) : 0x8868 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKGC7_IRTL.............(0x60c) : 0x886D Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x80001FFF Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PP0_POWER_LIMIT........(0x638) : 0x80000000 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PP0_ENERGY_STATUS......(0x639) : 0x15C00BB9 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PP0_POLICY.............(0x63a) : 0x0 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x8D669D5A20 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x146BEF40 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x2AADA6C820 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0 Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: CPU Low Frequency Mode.............: 1200 MHz Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: CPU Maximum non-Turbo Frequency....: 3200 MHz Feb 1 08:09:13 11s-Hac-Pro kernel[0]: AICPUPMI: CPU Maximum Turbo Frequency........: 5700 MHz Feb 1 08:09:14 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ (32) 38 44 ] Feb 1 08:09:14 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 0 1 2 9 ] Feb 1 08:09:14 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C6-Cores [ 0 1 2 3 6 8 9 10 ] Feb 1 08:09:15 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 32 38 42 (44) ] Feb 1 08:09:15 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 8 9 ] Feb 1 08:09:15 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 8 9 10 ] Feb 1 08:09:15 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ (32) 38 39 42 44 ] Feb 1 08:09:15 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 5 8 9 10 ] Feb 1 08:09:16 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 32 38 39 42 43 (44) ] Feb 1 08:09:16 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 ] Feb 1 08:09:16 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 8 9 10 11 ] Feb 1 08:09:16 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ (32) 37 38 39 42 43 44 ] Feb 1 08:09:17 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ] Feb 1 08:09:17 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 31 (32) 37 38 39 42 43 44 ] Feb 1 08:09:18 11s-Hac-Pro kernel[0]: AICPUPMI: CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ] Feb 1 08:09:23 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 31 32 37 38 39 40 42 43 (44) ] Feb 1 08:09:23 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 31 (32) 34 37 38 39 40 42 43 44 ] Feb 1 08:09:24 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 31 (32) 33 34 37 38 39 40 42 43 44 ] Feb 1 08:09:27 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 29 31 (32) 33 34 37 38 39 40 42 43 44 ] Feb 1 08:09:28 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 28 29 31 (32) 33 34 37 38 39 40 42 43 44 ] Feb 1 08:09:29 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 28 29 31 (32) 33 34 37 38 39 40 41 42 43 44 ] Feb 1 08:09:33 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 28 29 31 (32) 33 34 36 37 38 39 40 41 42 43 44 ] Feb 1 08:09:34 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 28 29 30 31 (32) 33 34 36 37 38 39 40 41 42 43 44 ] Feb 1 08:10:01 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 28 29 30 31 (32) 33 34 35 36 37 38 39 40 41 42 43 44 ] Feb 1 08:10:04 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 27 28 29 30 31 (32) 33 34 35 36 37 38 39 40 41 42 43 44 ] Feb 1 08:10:08 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 26 27 28 29 30 31 (32) 33 34 35 36 37 38 39 40 41 42 43 44 ] Feb 1 08:10:20 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 25 26 27 28 29 30 31 (32) 33 34 35 36 37 38 39 40 41 42 43 44 ] Feb 1 08:11:36 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 23 25 26 27 28 29 30 31 (32) 33 34 35 36 37 38 39 40 41 42 43 44 ] Feb 1 08:11:52 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ (12) 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 ] Feb 1 08:12:01 11s-Hac-Pro kernel[0]: AICPUPMI: CPU P-States [ 12 23 24 25 26 27 28 29 30 31 (32) 33 34 35 36 37 38 39 40 41 42 43 44 ] Link to comment Share on other sites More sharing options...
shilohhh Posted February 1, 2014 Share Posted February 1, 2014 Mhmm please why dont have in my sistem x86PlatFormPlugIn You need to inject Plugin type 1 into CPU0 in SSDT or DSDT Link to comment Share on other sites More sharing options...
stinga11 Posted February 1, 2014 Share Posted February 1, 2014 This is an error setting in your bios, you have by per core, or by all core ? You've had the same problem? Link to comment Share on other sites More sharing options...
magnifico Posted February 1, 2014 Share Posted February 1, 2014 You've had the same problem? you, answer me, how did you set your bios to by x core or all cores Link to comment Share on other sites More sharing options...
stinga11 Posted February 1, 2014 Share Posted February 1, 2014 you, answer me, how did you set your bios to by x core or all cores WERE FIND THIS, ON CPU SECTION ? Link to comment Share on other sites More sharing options...
magnifico Posted February 1, 2014 Share Posted February 1, 2014 stinga, take a look on max turbo ratio in your OC CPU firmware settings @ Stinga please dont write don't write a great letter, is like your claim, relax relax Here 140129165505.BMP Link to comment Share on other sites More sharing options...
stinga11 Posted February 1, 2014 Share Posted February 1, 2014 stinga, take a look on max turbo ratio in your OC CPU firmware settings @ Stinga please dont write don't write a great letter, is like your claim, relax relax Here 140129165505.BMP Thanks guys you are awesome. Now my cpu show 3900 instead 5700 Thanks!!! Link to comment Share on other sites More sharing options...
bronxteck Posted February 2, 2014 Share Posted February 2, 2014 has anyone tried with voodoo pstate? it seems to work with my ivy 3770 maybe the source can be updated a bit like for faster stepping. voodoopstate files.zip 1 Link to comment Share on other sites More sharing options...
omni Posted February 2, 2014 Author Share Posted February 2, 2014 I've been testing various platforms and it seems that using a MacMini achieves and maintains lower states better than when using MacPro for example. The Turbo performance is not affected much going from MacPro to Macmini, hundred points or so in multi-core GB3, but I noticed a slightly better performance in single-core for the Macmini. Have not tried iMac yet, but somehow I never had a great success with it... Link to comment Share on other sites More sharing options...
shilohhh Posted February 2, 2014 Share Posted February 2, 2014 Thanks omni for all the good work! Is your patched AICPUPM finished at this point or are you still refining it? Link to comment Share on other sites More sharing options...
omni Posted February 2, 2014 Author Share Posted February 2, 2014 You might call it finished for X86Platform* side but I'd like to have a version for ACPI_SMC* legacy as well. I could be very well wrong, but it seems SB behaves better under ACPI_SMC than X86Platform*, yet when using ACPI_SMC other methods get invoked in AICPM that cause it to crash. The crashing can be avoided but then certain parameters don't get set either, and so it's an uphill battle to find a way around it. I'm also thinking to change my MSRpatcher module to simply force a MSR 0xE2 value of 0x1E000403 for everyone who has no Cx RESIDENCY set (or everyone in general), which could possibly fix that issue. I'll put out a new version soon for testing... Link to comment Share on other sites More sharing options...
magnifico Posted February 2, 2014 Share Posted February 2, 2014 You might call it finished for X86Platform* side but I'd like to have a version for ACPI_SMC* legacy as well. I could be very well wrong, but it seems SB behaves better under ACPI_SMC than X86Platform*, yet when using ACPI_SMC other methods get invoked in AICPM that cause it to crash. The crashing can be avoided but then certain parameters don't get set either, and so it's an uphill battle to find a way around it. I'm also thinking to change my MSRpatcher module to simply force a MSR 0xE2 value of 0x1E000403 for everyone who has no Cx RESIDENCY set (or everyone in general), which could possibly fix that issue. I'll put out a new version soon for testing... great news , i wait this for test... Link to comment Share on other sites More sharing options...
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