Mavericks kernel testing on AMD (formerly Mountain Lion kernel testing on AMD)

[Donk]

what is the different of AMD SSE3 and the Intel one and if both are the same why the stupid kernel doesn't work ... plus isn't the kernel source is available how we can't find a developer to make it working ! is it the lack of C programming or the Lack of Smart way to work this thing out of the box with AMD CPUs ?

 

You need to do at least 5 different things. Just patching the kernel source is not enough.

1. Fix xnu kernel to not use SSSE3 instruction and has been documented and done before.
    
   
2. Fix xnu kernel wherever it calls the CPUID instruction and makes use of the returned vendor string and possibly other CPUID nodes. Again this has been done before.
    
   
3. Fix any other Intel logic such as power management, to use AMD specs. Patches have been done previously.
    
   
4. Write a kernel trap to process SSSE3 opcodes from the invalid trap handler. This is so binaries where there is no source code can function correctly if they make use of the SSSE3 instructions. Hard and not much source code available.
    
   
5. Statically patch or dynamically patch binaries as they load to remove CPUID instructions with Intel specific requirements. Has been done before.
   

There may well be other things to look at but this is the minimum from my studying this over the past few years. All together this is not a simple project, and will take time. There is a new book out that may help those working on the project http://www.amazon.co...51670916&sr=8-1

[SS01]

You need to do at least 5 different things. Just patching the kernel source is not enough.

1. Fix xnu kernel to not use SSSE3 instruction and has been documented and done before.
    
   
2. Fix xnu kernel wherever it calls the CPUID instruction and makes use of the returned vendor string and possibly other CPUID nodes. Again this has been done before.
    
   
3. Fix any other Intel logic such as power management, to use AMD specs. Patches have been done previously.
    
   
4. Write a kernel trap to process SSSE3 opcodes from the invalid trap handler. This is so binaries where there is no source code can function correctly if they make use of the SSSE3 instructions. Hard and not much source code available.
    
   
5. Statically patch or dynamically patch binaries as they load to remove CPUID instructions with Intel specific requirements. Has been done before.
   

There may well be other things to look at but this is the minimum from my studying this over the past few years. All together this is not a simple project, and will take time. There is a new book out that may help those working on the project http://www.amazon.co...51670916&sr=8-1

1. Please show us where this has been documented

 

2. Look at post #324

 

3. NullCPUPowerManagement / EvilAppleIntelCPUPowerManagement

 

4. I know, this is pretty much where we're stuck

 

5. I think meklort told us how to do this before, actually

 

If we focus on Bulldozer/Trinity/Bobcat/Piledriver only for the moment, we need to change 1 to "Solve the 64-bit instant reboot problem" and get rid of 4. Heh, look at how much easier that made things..

[Donk]

Well was replying to the poster who seemed to imply it was easy, and wanted to point out that it isn't, and those working on it going to have a big, but very interesting, job getting it working.

 

1. This is the change to the bcopy.s routine that has been in other patches for Snow Leopard and Lion. Assembler change to xnu source code. http://tgwbd.org/darwin/xnu.html

2. This is a source code change to xnu and is in the C code

3. Well there are other things such as MSR and TSC related code that are CPU specific and need changing in the xnu C code. (For example cpu.c and tsc.c)

4. I haven't seen any code for this, but am still looking to find something that would help. I did think about qemu code but haven't really looked in detail.

5. Actually AndyV's work in post #324 really applies to this issue on fixing CPUID in Mach-O format executables. This is a static patcher rather than dynamic, and would mean if a 3rd party app used SSSE3 or indeed SSE4 it would likely panic when the opcode was executed. Meklort and others built a dyld patch, no source, that fixed this up on loading the executable.

 

For a Bulldozer CPU 2,3 and 5 would be needed. For those AMD processors without SSSE3, 1 and 4 are also required.

 

I don't have access to an AMD machine, but I have had an idea using VMware to see if masking the vCPU CPUID would work. This would at least see if an AMD Bulldozer CPU could boot by masking out AMD string from CPUID. I will need to have a bit more of a think about it, but may help see if the other CPUID values work. It's a bit of a long shot and if I think it is possible would need someone with AMD Bulldozer SVM enabled CPU..

[spakk]

Well was replying to the poster who seemed to imply it was easy, and wanted to point out that it isn't, and those working on it going to have a big, but very interesting, job getting it working.

 

1. This is the change to the bcopy.s routine that has been in other patches for Snow Leopard and Lion. Assembler change to xnu source code. http://tgwbd.org/darwin/xnu.html

2. This is a source code change to xnu and is in the C code

3. Well there are other things such as MSR and TSC related code that are CPU specific and need changing in the xnu C code. (For example cpu.c and tsc.c)

4. I haven't seen any code for this, but am still looking to find something that would help. I did think about qemu code but haven't really looked in detail.

5. Actually AndyV's work in post #324 really applies to this issue on fixing CPUID in Mach-O format executables. This is a static patcher rather than dynamic, and would mean if a 3rd party app used SSSE3 or indeed SSE4 it would likely panic when the opcode was executed. Meklort and others built a dyld patch, no source, that fixed this up on loading the executable.

 

For a Bulldozer CPU 2,3 and 5 would be needed. For those AMD processors without SSSE3, 1 and 4 are also required.

 

I don't have access to an AMD machine, but I have had an idea using VMware to see if masking the vCPU CPUID would work. This would at least see if an AMD Bulldozer CPU could boot by masking out AMD string from CPUID. I will need to have a bit more of a think about it, but may help see if the other CPUID values work. It's a bit of a long shot and if I think it is possible would need someone with AMD Bulldozer SVM enabled CPU..

 

 

As everyone here knows, I have no experience with programming. I want to learn, but I'm unfortunately very slow.

 

I have a few suggestions:

 

There should be more experienced programmers to participate in this project and participate.

 

The tasks should be allocated accordingly. For if only a programmer working alone on this project, the risk of failure is too great, it would be very unfortunate. Therefore, a team can be formed.

 

If I understand the basic idea of theconnatic correctly, the work will be published here.

If that is so, then all the main innovations of the project are of great importance, are always placed on the first page. Thus, each has the opportunity to see the current status of the project at a glance and if necessary to take a position.

 

We will see what will theconnatic say. (sorry for my bad english)

[spakk]

Should the project not be possible until the end of the year, so I'll replace my Phenom II X6 1100T CPU with an AMD FX8350. :wink2:

 

 

_{AMD FX-8350, 8x 4.00GHz, boxed (FD8350FRHKBOX) Price €175,71}

 

_{^{8-core "Vishera" • TDP: 125W • Manufacturing process: 32nm • L2 cache: 4x • 2MB shared L3 Cache: 8MB shared • HyperTransport: 5.2GT / s • Memory controller: Dual Channel PC3-14900U (DDR3-1866) , ECC support • Stepping: C0 • XOP, FMA3, FMA4, F16C, BMI, TBM, SSSE3, SSE4.1, SSE4.2, AVX, AES-NI, CLMUL, NX bit, AMD64, AMD-V, Turbo Core 2.0 (4.20GHz) • unlocked multiplier}}

 

_{^{UPC code: 0730143302517}}

 

 

 

http://www.gigabyte....p.aspx?pid=3894

[spakk]

I have read with IDA kernel "connatic". I have a question, how can we solve the problem with "panic (cpu 0 caller 0xffffff80002871b7)" pmap_steal_memory "@ / Users / Jimihendrix / Desktop / XNUPATCHED / osfmk / vm / vm_resident.c: 757"?. see Kernel Panic #297

 

see here

http://www.workuploa...m/image/blWzhXq

[dmazar]

pmap_steal_memory happens when there is not enough memory for the system after kernel image. When you boot with -x then memory is limited to first 4GB, but ML kernel will stop looking for more memory as soon as it finds region that is above that 4GB in that case (i386_vm_init.c, line 424). Maybe your BIOS memmap contains unsorted regions and that breaks the iterating of memory regions too early and you end up with no memory. You may check this by booting to OSX and using DarwinDumper to dump FirmwareMemoryMap.

[SS01]

dmazar: p

pmap_steal_memory happens when there is not enough memory for the system after kernel image. When you boot with -x then memory is limited to first 4GB, but ML kernel will stop looking for more memory as soon as it finds region that is above that 4GB in that case (i386_vm_init.c, line 424). Maybe your BIOS memmap contains unsorted regions and that breaks the iterating of memory regions too early and you end up with no memory. You may check this by booting to OSX and using DarwinDumper to dump FirmwareMemoryMap.

From what I can tell, this is not related to AMD, but is rather a relatively common BSD problem. from openbsd: http://nixdoc.net/man-pages/OpenBSD/pmap_steal_memory.9.html#OPTIONAL FUNCTIONS

[spakk]

pmap_steal_memory happens when there is not enough memory for the system after kernel image. When you boot with -x then memory is limited to first 4GB, but ML kernel will stop looking for more memory as soon as it finds region that is above that 4GB in that case (i386_vm_init.c, line 424). Maybe your BIOS memmap contains unsorted regions and that breaks the iterating of memory regions too early and you end up with no memory. You may check this by booting to OSX and using DarwinDumper to dump FirmwareMemoryMap.

 

I have read the kernel from connatic with IDA Pro interactive and I wonder if any of the kernels produce a fault has arisen?

see here

http://www.workupload.com/file/vhF1R31

[zchef2k]

Can someone remind me how to unban from irc.osx86.hu? I think my IP's been blocked, not my nick.

[theconnactic]

Can someone remind me how to unban from irc.osx86.hu? I think my IP's been blocked, not my nick.

 

Why do you think you've been banned?

 

The servers have been down these days.

[dmazar]

From what I can tell, this is not related to AMD, but is rather a relatively common BSD problem. from openbsd: http://nixdoc.net/ma...IONAL FUNCTIONS

Yes, it's not related to AMD. I had pmam_steal_memory KPs when doing OSX UEFI boot and had to "shrink" the memmap passed to kernel to fix it. As I said, spakk's BIOS probably provides unsorted memory regions in memmap, Chameleon passes that to kernel and kernel breaks from processing the whole memory map (if -x flag is used) and he ends up with KP because of no memory. Just my guess.

[spakk]

Yes, it's not related to AMD. I had pmam_steal_memory KPs when doing OSX UEFI boot and had to "shrink" the memmap passed to kernel to fix it. As I said, spakk's BIOS probably provides unsorted memory regions in memmap, Chameleon passes that to kernel and kernel breaks from processing the whole memory map (if -x flag is used) and he ends up with KP because of no memory. Just my guess.

 

 

what must I do so that no kernel panic message "pmam_steal_memory" comes.

As bootloader I use cparm, should I perhaps install Chameleon bootloader?. ..... If yes, what version and settings should I do?)

 

thx for your answer

 

Can someone remind me how to unban from irc.osx86.hu? I think my IP's been blocked, not my nick.

 

 

 

I have the same problem, I have several times tried to sign me, unfortunately without success.

 

 

 

eventually I gave up.

[SS01]

what must I do so that no kernel panic message "pmam_steal_memory" comes.

As bootloader I use cparm, should I perhaps install Chameleon bootloader?. ..... If yes, what version and settings should I do?)

 

thx for your answer

 

 

 

 

 

I have the same problem, I have several times tried to sign me, unfortunately without success.

 

 

 

eventually I gave up.

yes, switch to chameleon, boot with latest connactic kernel

 

irc.osx86.hu has been down these days, in the meantime we can switch to irc.systemnet.info, again on #LegacyKernel

[dmazar]

cparm's branch is Chameleon. Changing branch would not change anything. But, it is even not clear if what I write you is correct. Can you dump FirmwareMemoryMap with DarwinDumper?

And, do you need to use -x switch?

[spakk]

cparm's branch is Chameleon. Changing branch would not change anything. But, it is even not clear if what I write you is correct. Can you dump FirmwareMemoryMap with DarwinDumper?

And, do you need to use -x switch?

 

I will check it out tonight.

thx

[spakk]

Well was replying to the poster who seemed to imply it was easy, and wanted to point out that it isn't, and those working on it going to have a big, but very interesting, job getting it working.

 

1. This is the change to the bcopy.s routine that has been in other patches for Snow Leopard and Lion. Assembler change to xnu source code. http://tgwbd.org/darwin/xnu.html

2. This is a source code change to xnu and is in the C code

3. Well there are other things such as MSR and TSC related code that are CPU specific and need changing in the xnu C code. (For example cpu.c and tsc.c)

4. I haven't seen any code for this, but am still looking to find something that would help. I did think about qemu code but haven't really looked in detail.

5. Actually AndyV's work in post #324 really applies to this issue on fixing CPUID in Mach-O format executables. This is a static patcher rather than dynamic, and would mean if a 3rd party app used SSSE3 or indeed SSE4 it would likely panic when the opcode was executed. Meklort and others built a dyld patch, no source, that fixed this up on loading the executable.

 

For a Bulldozer CPU 2,3 and 5 would be needed. For those AMD processors without SSSE3, 1 and 4 are also required.

 

I don't have access to an AMD machine, but I have had an idea using VMware to see if masking the vCPU CPUID would work. This would at least see if an AMD Bulldozer CPU could boot by masking out AMD string from CPUID. I will need to have a bit more of a think about it, but may help see if the other CPUID values work. It's a bit of a long shot and if I think it is possible would need someone with AMD Bulldozer SVM enabled CPU..

 

 

 

I have found a C-Code for the high-resolution timer on many CPUs and compiler read.

 

here

[instant idiot]

Gils posted a pic over here: http://osx86.co/f102/kernel-12-0-amd-svp-t7881/page4.html#post59113

[spakk]

Gils posted a pic over here: http://osx86.co/f102....html#post59113

 

Is that not the wrong approach of Gils? He has tested the connatic custom kernel on an Intel machine. Gils should do the test on his AMD Buldozer machine, I think he has a CPU FX8120, then we can see whether or not the kernel runs. :fishing1:

[spakk]

I will check it out tonight.

thx

 

 

here is my test tonight (with only 8 GB of 16 GB of RAM installed)

booted with boot flag: -v -x cpus=6 arch=x86_64 busratio=20 maxmem=4096 npci=0x2000 ending with KPs like last time.

 

 

with boot flag: -s cpus=6 arch=x86_64

 

here the images:

 

http://www.workuploa...m/image/DlM5dKx

http://www.workuploa...m/image/rR5FVx0

 

 

Please make a few suggestions, so that I clean the problems.

 

tested on Hachintosh: GA-990FXA-UD3 with AMD Phenom II X6 1100T / 8 GB DDR3 1600 C9 / NVIDIA Geforce GTX 550 TI 3072 MB

 

With the following BIOS settings (BIOS Version F2 ,First release):

 

Intelligent Tweaker (MIT) -> • Everything left at default!

 

Standard CMOS Features---> • Mountain Lion HDD connected in the first place. All other unnecessary hardware is removed.

 

Advanced BIOS Features -> • AMD C1E [Disabled]

• Virtualization [Enabled]

• AMD 8 Col & Q. [Auto]

 

Integrated Peripherals ---> • On Chip SATA Controller [Enabled]

• On Chip SATA Type [AHCI / Native IDE]

• On-chip SATA 3.0 [Enabled]

• F_USB30 Controller [Enabled]

• SATA3 Controller [Enabled]

• SATA3 Ctrl Mode [AHCI]

• ON Board 1394 Function [Disabled]

• The rest remains unchanged!

[zchef2k]

I am of the opinion that the roadblock is userspace FIPS mode. Kernelspace FIPS mode can be avoided with fips_mode=0. During boot, /usr/libexec/cc_fips_test gets executed. No one, no kernel so far, has gotten past this point.

[spakk]

I am of the opinion that the roadblock is userspace FIPS mode. Kernelspace FIPS mode can be avoided with fips_mode=0. During boot, /usr/libexec/cc_fips_test gets executed. No one, no kernel so far, has gotten past this point.

 

and how can you fix the problem in detail?

 

Should I be using boot flag:-s cpus = 6 arch = x86_64 fips_mode = 0 boot?

or how do you mean?

[zchef2k]

 

 

and how can you fix the problem in detail?

 

Oh, I have no idea. But, if you boot with fips_mode=0 you will see it skip the FIPS POST test and claim that it is 'Bypassing FIPS mode for kernel space!" and then it hangs. Open the cc_fips_test executable in a hex or even text editor and you'll find a similar string "Bypassing FIPS mode for user space!". How to get there, with either a boot arg, kernel source modification, or binary patching is a mystery.

[spakk]

Oh, I have no idea. But, if you boot with fips_mode=0 you will see it skip the FIPS POST test and claim that it is 'Bypassing FIPS mode for kernel space!" and then it hangs. Open the cc_fips_test executable in a hex or even text editor and you'll find a similar string "Bypassing FIPS mode for user space!". How to get there, with either a boot arg, kernel source modification, or binary patching is a mystery.

 

thank you very much, I'll try. Then I will report.

[zchef2k]

 

 

and how can you fix the problem in detail?

 

Should I be using boot flag:-s cpus = 6 arch = x86_64 fips_mode = 0 boot?

or how do you mean?

 

Mind your spaces on both sides of the '='.