Mavericks kernel testing on AMD (formerly Mountain Lion kernel testing on AMD)

[spakk]

tu as raison , j'ai noté une surchauffe importante du matèriel , surtout le CPU et ses périphériques (condo/diode/mosfet) c'est dangereux pour le matèriel et j'ai eu le message "time out opengl" suivi d'artefact beaucoup plus important que sur ATI !! et maintenant nvidia ne marche plus mauvaise info de ma part !! j'y croyais pourtant .

Sorry Gils,

I have not expressed myself correctly. luckily I did not have damage hardware, but a problem with Mountain Lion, it was broken, I have reinstalled Mountain Lion and  now its works! I can only boot with Andy's amd_kernel with Clover.

Unfortunately I have no success to start with the current kernel of bronzovka in the desktop.

[spakk]

hello Spakk ,

 

il marche très bien son noyau sur Phenom/FX lequel tu as prit ? ah !!! mais il n'est pas dispo je te l'envoies en MP mais attention fais attention à ton hardware

 

it works very well on its core Phenom / FX which you took? ah! but it is not available I send thee MP but watch pay attention to your hardware

My friend, unfortunately I had no success with the last two kernel

[spakk]

with ML DP2 x86_64 ? 

I'm stupid,  testing with OS X 10.8.2 Mountain Lion DP4

[spakk]

Hi  Bronzovka, Hi Gils
the retarder (Erratum 298, aka TLB-Bug ), ie the built-TLB patch in AMD boards (BIOS) can be permanently deactivated possible from the new AM2 + motherboards with AMD 700 chipset by a tool,  see link (unfortunately all in German ) with Tools , can this information help us out of the sh_it ? please check it

Edit:

AMD Overdrive Utility 4.2.6 download link

an old version AMD Overdrive Utility

http://www.planet3dnow.de/cgi-bin/newspub/viewnews.cgi?category=2&id=1198763768

 

CrystalCPUID (x86 version, NOT the x64 version)

http://crystalmark.info/download/index-e.html#CrystalCPUID

http://www.hardwarecanucks.com/forum/o-ss-drivers-general-software/5634-helping-hand-vista-service-pack-1-vs-your-phenom.html

Phenom TLB Disable Tool and Phenom MSR tweaking tool

http://www.xtremesystems.org/forums/showthread.php?180338-Phenom-TLB-Disable-Tool-and-Phenom-MSR-tweaking-tool link off

[spakk]

it's a shame it works only on Windows 32-bit, I have a 64-bit system, so it does not work.  may be someone  in a position to write a tool for OSX which stops the TLB-bug.

[bcobco]

it's a shame it works only on Windows 32-bit, I have a 64-bit system, so it does not work.  may be someone  in a position to write a tool for OSX which stops the TLB-bug.

that bug is known, to be fixed by updated bioses. if your cpu has this bug (Phenom B2 stepping http://www.anandtech.com/show/2477/2) please use the TLB cache fix from the bios and thats all. if you have a fixed cpu stepping, you dont need that fix at all.

there is also software solution fot the bug (see linux source) from where we can see the implementation of the bugfix.

 

when i taked about that TLB bug fix, i was meaning in how that bugfix handles that incorrect cpu parameters to avoid that issue.

in our case, the "incorrect situation" would be all those intel instructions unsupported on amd cpus. i was wondering if its possible to inspire in this solution

 

unluckily i dont understand source code to involve deeper into this,

[spakk]

that bug is known, to be fixed by updated bioses. if your cpu has this bug (Phenom B2 stepping http://www.anandtech.com/show/2477/2) please use the TLB cache fix from the bios and thats all. if you have a fixed cpu stepping, you dont need that fix at all.

there is also software solution fot the bug (see linux source) from where we can see the implementation of the bugfix.

 

when i taked about that TLB bug fix, i was meaning in how that bugfix handles that incorrect cpu parameters to avoid that issue.

in our case, the "incorrect situation" would be all those intel instructions unsupported on amd cpus. i was wondering if its possible to inspire in this solution

 

unluckily i dont understand source code to involve deeper into this,

 

 

bcobco, thanks for your quick response, but in my BIOS I did not find this option for activation or deactivation of the TLB bug. I have installed the latest BIOS update, and can not remember the previous BIOS versions have a activation or deactivation of the Bug admitted.

when the PC starts I see during boot: Processor: AMD Phenom (tm) II X6 1100T Processor (CPUID: 00100FA0 ID: 00BF) what are these information? the patch is active or disabled, sorry for my lack of knowledge.

[spakk]

Information whether or not I think they will not accéssible interface bios. It should read ROM directly via an application to this effect as expected for a graphics card that would be to simply flash the bios

Gils, there exist on the AMD website various microcode_amd.bin files for various CPUs, I do not know if we can embed these bin files in clover? under the bin folder?

 

 

 

 

This package provides latest microcode patches

for AMD processor families >= 0x10.

 

See http://www.amd64.org/support/microcode.html

for details.

 

Microcode patches are included in container files:

- 'microcode_amd.bin' (for AMD CPU families 10h - 14h)

- 'microcode_amd_fam15h.bin' (for AMD CPU family 15h)

 

Please read the file INSTALL for install instructions.

Please read the file LICENSE for licensing information.

 

The container files include following microcode patches:

 

    mc_patch_01000083_PUB-v4/mc_patch_01000083.asm

    mc_patch_01000084_PUB-v4/mc_patch_01000084.asm

    mc_patch_010000C7_PUB-v1/mc_patch_010000C7.asm

    mc_patch_010000C8_PUB-v1/mc_patch_010000C8.asm

    mc_patch_010000D9_PUB-v1/mc_patch_010000D9.asm

    mc_patch_010000DA_PUB-v1/mc_patch_010000DA.asm

    mc_patch_010000DB_PUB-v1/mc_patch_010000DB.asm

    mc_patch_010000DC_PUB-v1/mc_patch_010000DC.asm

    mc_patch_03000027_PUB-v1/mc_patch_03000027.asm

    mc_patch_05000028_PUB-v3/mc_patch_05000028.asm

    mc_patch_0500010D_PUB-v1/mc_patch_0500010D.asm

    mc_patch_06000624_PUB-v1/mc_patch_06000624.asm

 

***********************************************************************

Copyright 2008, 2012 ADVANCED MICRO DEVICES, INC.  All Rights Reserved.

 

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and I do not know if these files, disable the TLB bug?

amd-ucode-latest.tar

Edited July 17, 2013 by spakk

[spakk]

\amd-ucode-2012-01-17\microcode_amd.bin.README

 

;******************************************************************************
; The associated microcode container file fixes the errata as documented in
; Revision Guide for AMD Family 10h Processors, order #41322,
; Revision Guide for AMD Family 12h Processors, order #44739,
; Revision Guide for AMD Family 14h Models 00h-0Fh Processors, order #47534,
; for different revisions of AMD processors as follows:
;
; CPUIDFn[0000_0001]_EAX; ID;         Errata fixed;
;
; 0x00100F22;             0x01000083; 244, 260, 280, 302, 308, 315, 342;
; 0x00100F23;             0x01000083; 244, 260, 280, 302, 308, 315, 342;
; 0x00100F2A;             0x01000084; 244, 260, 280, 302, 308, 315, 342;
; 0x00100F42;             0x010000DB; 342, 440, 573;
; 0x00100F43;             0x010000C8; 407, 440;
; 0x00100F52;             0x010000DB; 342, 440, 573;
; 0x00100F53;             0x010000C8; 407, 440;
; 0x00100F62;             0x010000C7; 407, 440;
; 0x00100F63;             0x010000C8; 407, 440;
; 0x00100F80;             0x010000DA; 419, 440, 573;
; 0x00100F81;             0x010000D9; #406, #407, #440, #573, #669;
; 0x00100F91;             0x010000D9; #406, #407, #440, #573, #669;
; 0x00100FA0;             0x010000DC; 438, 440, 573;
; 0x00300F10;             0x03000027; #564, #573, #662, #686;
; 0x00500F10;             0x05000028; #461, #564, #594, #595;
; 0x00500F20;             0x0500010D; #461, #564, #594, #639, #662, #686;
;
;******************************************************************************

\amd-ucode-2012-01-17\microcode_amd_fam15h.bin.README
 

;******************************************************************************
; The associated microcode container file fixes the errata as documented in
; Revision Guide for AMD Family 15h Models 00h-0Fh Processors, order #48063,
; for different revisions of AMD processors as follows:
;
; CPUIDFn[0000_0001]_EAX; ID;         Errata fixed;
;
; 0x00600F12;             0x06000624; #659, #660, #661, #668, #671, #672, #673;
;
;******************************************************************************
 

how can we integrate these microcode.bin-files during the boot of OSX?

[Overclocked Tardis]

Hey folks, greetings

 

I got Bronya's 10.8.3 rc 4 working on my AMD A-10 5800k APU (with an integrated 7660D) using Clover r1888. I used the kernel to install and boot 10.8.3

 

Quick specs:

An Aptio board from MSI (FM2-A55M-E33)

AMD A10 5800k APU

Integrated 7660D(I couldn't even get to Clover's GUI while using this integrated GPU, I had to fetch an old PCIe GeForce 9400GT)

8Gigs of Ram

 

What went wrong:

 

6 minutes or so after booting to the desktop, I'd get a kernel panic. Everything up until that point is smooth as butter ( not considering software OpenGL)

As stated in the first post of this thread and in the amd nvidia thread, I had to remove those GeForce kexts to avoid the gray screen, but in return, experience the wonders of software mode GL.

Also, I've tried andy's kernels with Clover and It seems as if I can't get to the desktop.

 

 

I'm totally new to clover, so I may be missing something somewhere. the amount of options are overwhelming, but booting an untouched, vanilla osx iso made me moist.

 

But yeah, I plan to play around with 10.8.2 tonight with various kernels and clover and we'll see how far I get with this setup. Not asking for help or anything, just wanted to chime in as an A-10 user, as I've not seen anyone else with these in this thread.

 

 

Thanks for all the hard work!!!

 

update:

The instability was caused by an incorrect bus/TSC numbers. Once corrected, everything remains stable.

[spakk]

It makes sense to integrate the TLB patch in the DSDT, Gil's idea is good

 

This part of the patch modifies the involved MSR registers to disable the TLB-fix if applied via bios:

 

 

/* enable workaround for AMD Erratum 298 if necessary */
+ if ((c->x86 == 0x10) && (c->x86_model x86_mask != 3)) {
+ /* re-enable TLB caching if BIOS disabled it */
+ rdmsrl(MSR_K8_HWCR, value);
+ value &= ~(1UL + wrmsrl(MSR_K8_HWCR, value);
+ rdmsrl(0xC0011023, value);
+ value &= ~(1UL + wrmsrl(0xC0011023, value);
+ /* enable OS workaround */
+ e298_bug = 1;
+ printk(KERN_INFO "AMD erratum 298 workaround enabled\n");
+ }

 

more info see here: http://www.xtremesystems.org/forums/showthread.php?171105-Howto-disable-the-tlb-fix-with-CrystalCPU

I do not know if this information is useful?

[Andy Vandijck]

It makes sense to integrate the TLB patch in the DSDT, Gil's idea is good

 

This part of the patch modifies the involved MSR registers to disable the TLB-fix if applied via bios:

 

more info see here: http://www.xtremesystems.org/forums/showthread.php?171105-Howto-disable-the-tlb-fix-with-CrystalCPU

I do not know if this information is useful?

I'll take a peek.

I got some free time on my hands...

EDIT:

/* AnV: AMD TLB Fix */
void FixAMDTLB(void)
{
    uint64_t value = 0;

    /* re-enable TLB caching if BIOS disabled it */

    /* MSR_K8_HWCR mod */
    value = rdmsr64(0xC0010015);
    value &= ~(1UL << 3);
    wrmsr64(0xC0010015, value);

    /* MSR_C0011023 mod */
    value = rdmsr64(0xC0011023);
    value &= ~(1UL << 1);
    wrmsr64(0xC0011023, value);
}

Should do the trick.

I added it to cpuid.c and the declaration in cpuid.h

I'll compile the kernel now.

New boot argument also added: -notlbfix

This disables the patch above.

I put the function in cpuid_set_info.

Kernel compile is busy...

EDIT2: Kernel compile done.

Source diff is included as usual...

SinetekBronzovkAnVoodoo_RC7.diff.zip

amd_kernel.zip

[spakk]

I'll take a peek.

I got some free time on my hands...

EDIT:

/* AnV: AMD TLB Fix */
void FixAMDTLB(void)
{
    uint64_t value = 0;

    /* re-enable TLB caching if BIOS disabled it */

    /* MSR_K8_HWCR mod */
    value = rdmsr64(0xC0010015);
    value &= ~(1UL << 3);
    wrmsr64(0xC0010015, value);

    /* MSR_C0011023 mod */
    value = rdmsr64(0xC0011023);
    value &= ~(1UL << 1);
    wrmsr64(0xC0011023, value);
}

Should do the trick.

I added it to cpuid.c and the declaration in cpuid.h

I'll compile the kernel now.

New boot argument also added: -notlbfix

This disables the patch above.

I put the function in cpuid_set_info.

Kernel compile is busy...

EDIT2: Kernel compile done.

Source diff is included as usual...

Many thanks, you are now as faster as the light

 

Unfortunately I can not test at the moment, sitting in the office when I'm home I will test your new kernel and the patch, many thanks for the quick processing.

Edited July 18, 2013 by spakk

[Andy Vandijck]

Many thanks, you are now as faster as the light

 

Unfortunately I can not test at the moment, sitting in the office when I'm home I will test your new kernel and the patch, many thanks for the quick processing.

No problem, free time means time to check things out

[spakk]

No problem, free time means time to check things out

If this should work, then mavericks is ready for AMD- hackintosh , or what do you think andy?

[Andy Vandijck]

If this should work, then mavericks is ready for AMD- hackintosh , or what do you think andy?

When we get the Mavericks kernel source we will see.

You never know what they changed.

But lets hope yes

EDIT: According to the internet AMD CPU's with this fix run faster

[+ira]

if it works it is the revolution in AMD purists!!

 

I'm still at work, I can not test, spakk your impressions?

I can test it but i don't know if my specs would fit the need for a test, can someone briefly explain what this patch is for? I'm following the posts about TLB but i cannot get it because my lack of knowledge and time...

[Andy Vandijck]

I can test it but i don't know if my specs would fit the need for a test, can someone briefly explain what this patch is for? I'm following the posts about TLB but i cannot get it because my lack of knowledge and time...

It disables the AMD TLB "fix" that is set by the BIOS.

This enables thus TLB caching on AMD CPU's...

[+ira]

It disables the AMD TLB "fix" that is set by the BIOS.

This enables thus TLB caching on AMD CPU's...

Thank you Andy, i take a time to read about TLB, what i found is that this is only related to L3 cache but my CPU didn't have it so i assume this patch has nothing to do with my CPU (Athlon II X2 240), i'm right?

[bcobco]

booting here:

 

Last login: Thu Jul 18 17:35:09 on console
ccs-iMac:~ cc$ sysctl -A kern hw
kern.ostype: Darwin
kern.osrelease: 12.3.0
kern.osrevision: 199506
kern.version: Darwin Kernel Version 12.3.0: do 18 jul 2013 16:05:36 CEST; SinetekBronzovkAnVoodoo v1.0.0:xnu-2050.22.13-AMD/BUILD/obj/RELEASE_X86_64
kern.maxvnodes: 66560
kern.maxproc: 1064
kern.maxfiles: 12288
kern.argmax: 262144
kern.securelevel: 0
kern.hostname: ccs-iMac.local
kern.hostid: 0
kern.clockrate: { hz = 100, tick = 10000, tickadj = 2, profhz = 100, stathz = 100 }
kern.posix1version: 200112
kern.ngroups: 16
kern.job_control: 1
kern.saved_ids: 1
kern.boottime: { sec = 1374161372, usec = 0 } Thu Jul 18 17:29:32 2013
kern.nisdomainname:
kern.maxfilesperproc: 10240
kern.maxprocperuid: 709
kern.ipc.maxsockbuf: 4194304
kern.ipc.sockbuf_waste_factor: 8
kern.ipc.somaxconn: 128
kern.ipc.mbstat: Format:S,mbstat Length:580 Dump:0xa002000054010000000000004b010000...
kern.ipc.nmbclusters: 32768
kern.ipc.soqlimitcompat: 1
kern.ipc.mb_stat: Format:S,mb_stat Length:960 Dump:0x07000000000000006d62756600000000...
kern.ipc.mleak_sample_factor: 500
kern.ipc.mb_normalized: 0
kern.ipc.mb_watchdog: 0
kern.ipc.sosendminchain: 16384
kern.ipc.sorecvmincopy: 16384
kern.ipc.sosendjcl: 1
kern.ipc.sosendjcl_ignore_capab: 0
kern.ipc.sodefunctlog: 0
kern.ipc.sothrottlelog: 0
kern.ipc.sotcdb: 1
kern.ipc.maxsockets: 512
kern.ipc.njcl: 10920
kern.ipc.njclbytes: 16384
kern.ipc.soqlencomp: 0
kern.ipc.io_policy.throttled: 0
kern.ipc.sendfileuiobufs: 64
kern.usrstack: 1392476160
kern.netboot: 0
kern.sysv.shmmax: 4194304
kern.sysv.shmmin: 1
kern.sysv.shmmni: 32
kern.sysv.shmseg: 8
kern.sysv.shmall: 1024
kern.sysv.semmni: 87381
kern.sysv.semmns: 87381
kern.sysv.semmnu: 87381
kern.sysv.semmsl: 87381
kern.sysv.semume: 10
kern.aiomax: 90
kern.aioprocmax: 16
kern.aiothreads: 4
kern.corefile: /cores/core.%P
kern.coredump: 1
kern.sugid_coredump: 0
kern.delayterm: 0
kern.shreg_private: 0
kern.posix.sem.max: 10000
kern.usrstack64: 140734585864192
kern.nx: 0
kern.tfp.policy: 2
kern.procname:
kern.speculative_reads_disabled: 0
kern.osversion: 12D78
kern.safeboot: 1
kern.lctx.last: 1
kern.lctx.count: 0
kern.lctx.max: 8192
kern.rage_vnode: 0
kern.tty.ptmx_max: 127
kern.threadname:
kern.sleeptime: { sec = 0, usec = 0 } Thu Jan 1 01:00:00 1970
kern.waketime: { sec = 0, usec = 0 } Thu Jan 1 01:00:00 1970
kern.willshutdown: 0
kern.progressmeterenable: 0
kern.progressmeter: 0
kern.hibernatefile:
kern.bootsignature: 60453f40f249cac57a691756c86bd4333275f3ed

kern.hibernatemode: 0
kern.nbuf: 16384
kern.maxnbuf: 16384
kern.jnl_trim_flush: 240
kern.flush_cache_on_write: 0
kern.sugid_scripts: 0
kern.zleak.active: 0
kern.zleak.max_zonemap_size: 1610612736
kern.zleak.global_threshold: 805306368
kern.zleak.zone_threshold: 100663296
kern.uuid: 06F6E814-9DAE-32F6-A8F2-A08D3C7AE85D
kern.bootargs: boot-uuid=6AC566AB-6447-3CC0-917A-88ECD2133AA0 rd=*uuid -v npci=0x2000 -notlbfix -x
kern.num_files: 790
kern.num_vnodes: 18146
kern.num_tasks: 2048
kern.num_threads: 10240
kern.num_taskthreads: 2048
kern.namecache_disabled: 0
kern.ignore_is_ssd: 0
kern.preheat_pages_max: 256
kern.preheat_pages_min: 8
kern.speculative_prefetch_max: 24576
kern.speculative_prefetch_max_iosize: 524288
kern.vm_page_free_target: 2000
kern.vm_page_free_min: 1500
kern.vm_page_free_reserved: 100
kern.vm_page_speculative_percentage: 5
kern.vm_page_speculative_q_age_ms: 500
kern.vm_max_delayed_work_limit: 32
kern.vm_max_batch: 256
kern.timer_coalescing_enabled: 1
kern.setthread_cpupercent: 0
kern.singleuser: 0
kern.affinity_sets_enabled: 1
kern.affinity_sets_mapping: 1
kern.slide: 0
kern.kdebug_thread_block: 0
kern.stack_size: 16384
kern.stack_depth_max: 8664
kern.ipc_portbt: 0
kern.sched: traditional
kern.msgbuf: 65536
kern.wq_yielded_threshold: 2000
kern.wq_yielded_window_usecs: 30000
kern.wq_stalled_window_usecs: 200
kern.wq_reduce_pool_window_usecs: 5000000
kern.wq_max_timer_interval_usecs: 50000
kern.wq_max_threads: 512
kern.wq_max_constrained_threads: 64
kern.secure_kernel: 0
kern.ostype = Darwin
kern.osrelease = 12.3.0
kern.osrevision = 199506
kern.version = Darwin Kernel Version 12.3.0: do 18 jul 2013 16:05:36 CEST; SinetekBronzovkAnVoodoo v1.0.0:xnu-2050.22.13-AMD/BUILD/obj/RELEASE_X86_64
kern.maxvnodes = 66560
kern.maxproc = 1064
kern.maxfiles = 12288
kern.argmax = 262144
kern.securelevel = 0
kern.hostname = ccs-iMac.local
kern.hostid = 0
kern.clockrate: hz = 100, tick = 10000, profhz = 100, stathz = 100
Use pstat to view kern.vnode information
Use ps to view kern.proc information
Use pstat to view kern.file information
kernel is not compiled for profiling
kern.profiling: kern.posix1version = 200112
kern.ngroups = 16
kern.job_control = 1
kern.saved_ids = 1
kern.boottime = Thu Jul 18 17:29:32 2013

kern.nisdomainname =
kern.maxpartitions: no such MIB
kern.kdebug: value is not available
kern.update: no such MIB
kern.osreldate: no such MIB
kern.ntp_pll: no such MIB
kern.bootfile: no such MIB
kern.maxfilesperproc = 10240
kern.maxprocperuid = 709
kern.dumpdev: no such MIB
kern.ipc: no such MIB
kern.dummy: no such MIB
kern.dummy: no such MIB
kern.usrstack = 1392476160
kern.logsigexit: no such MIB
kern.symfile: Input/output error
kern.procargs: Invalid argument
kern.dummy: no such MIB
kern.netboot = 0
kern.panicinfo: no such MIB
kern.sysv: no such MIB
kern.dummy: no such MIB
kern.dummy: no such MIB
kern.aiomax = 90
kern.aioprocmax = 16
kern.aiothreads = 4
kern.procargs2: Invalid argument
kern.corefile = /cores/core.%P
kern.coredump = 1
kern.sugid_coredump = 0
kern.delayterm = 0
kern.shreg_private = 0
kern.proc_low_pri_io: no such MIB
kern.low_pri_window: no such MIB
kern.low_pri_delay: no such MIB
kern.posix: no such MIB
kern.usrstack64 = 140734585864192
kern.nx = 0
kern.tfp: no such MIB
kern.procname =
kern.threadsigaltstack: no such MIB
kern.speculative_reads_disabled = 0
kern.osversion = 12D78
kern.safeboot = 1
kern.lctx: no such MIB
kern.rage_vnode = 0
kern.tty: no such MIB
kern.check_openevt: Invalid argument
kern.thread_name = kern
hw.ncpu: 2
hw.byteorder: 1234
hw.memsize: 4294967296
hw.activecpu: 2
hw.physicalcpu: 2
hw.physicalcpu_max: 2
hw.logicalcpu: 2
hw.logicalcpu_max: 2
hw.cputype: 7
hw.cpusubtype: 4
hw.cpu64bit_capable: 1
hw.cpufamily: 1114597871
hw.cacheconfig: 2 1 1 2 0 0 0 0 0 0
hw.cachesize: 4294967296 65536 524288 4194304 0 0 0 0 0 0
hw.pagesize: 4096
hw.busfrequency: 800000000
hw.busfrequency_min: 800000000
hw.busfrequency_max: 800000000
hw.cpufrequency: 3000000000
hw.cpufrequency_min: 3000000000
hw.cpufrequency_max: 3000000000
hw.cachelinesize: 64
hw.l1icachesize: 65536
hw.l1dcachesize: 65536
hw.l2cachesize: 524288
hw.l3cachesize: 4194304
hw.tbfrequency: 1000000000
hw.packages: 1
hw.optional.floatingpoint: 1
hw.optional.mmx: 1
hw.optional.sse: 1
hw.optional.sse2: 1
hw.optional.sse3: 1
hw.optional.supplementalsse3: 1
hw.optional.sse4_1: 0
hw.optional.sse4_2: 0
hw.optional.x86_64: 1
hw.optional.aes: 0
hw.optional.avx1_0: 0
hw.optional.rdrand: 0
hw.optional.f16c: 0
hw.optional.enfstrg: 0
hw.optional.patcher_opts: 48
hw.machine = x86_64
hw.model = iMac8,1
hw.ncpu = 2
hw.byteorder = 1234
hw.physmem = 2147483648
hw.usermem = 563269632
hw.pagesize = 4096
hw.disknames: no such MIB
hw.diskstats: no such MIB
hw.epoch = 0
hw.floatingpoint: no such MIB
hw.machinearch: no such MIB
hw.vectorunit = 1
hw.busfrequency = 800000000
hw.cpufrequency = 3000000000
hw.cachelinesize = 64
hw.l1icachesize = 65536
hw.l1dcachesize = 65536
hw.l2settings = 1
hw.l2cachesize = 524288
hw.l3settings = 1
hw.l3cachesize = 4194304
hw.tbfrequency = 1000000000
hw.memsize = 4294967296
hw.availcpu = 2
ccs-iMac:~ cc$

 

hw.l3cachesize = 4194304 wrong, i will try to check myself

 

regarding the TLB bug... the bios automatically applies the patch if it detects a cpu with the B2 Stepping, in other case, the patch is not applied. seems logic to me. post B2 revisions are not affected, so no TLB fix must be applied.

[bcobco]

 

the purpose of the TLB bug fix is to see if the CPU caches are cleared for proper operation, the only way to see if this is the cause is to look if there is still the graphics bug.

nvidia fails when trying to do graphics acceleration. compatible modes only (-x boot flag)

+    /* kaitek:
+     * sysenter is used for 32-bit software, while syscall is used for 64-bit
+     * software. on amd, the situation is that 32-bit software running in legacy
+     * mode works, and 64-bit software running in long mode also works. 32-bit
+     * software running in compatibility mode, however, makes use of sysenter
+     * which is not available under either long sub-mode on amd processors.
+     *
+     *                     +--------------------------+--------------------------+
+     *                     |          amd64           |          intel64         |
+     * +-------------------+--------+-----------------+--------+-----------------+
+     * | mode              |        |       long      |        |      ia-32e     |
+     * +-------------------+ legacy +--------+--------+ legacy +--------+--------+
+     * | sub-mode          |        | 64-bit | compat |        | 64-bit | compat |
+     * +-------------------+--------+--------+--------+--------+--------+--------+
+     * | syscall/sysret    |   yes  |   yes  |   yes  |   no   |   yes  |   no   |
+     * | sysenter/sysexit  |   yes  |   no   |   no   |   yes  |   yes  |   yes  |
+     * +-------------------+--------+--------+--------+--------+--------+--------+
+     *
+     */

http://stackoverflow.com/questions/9506353/how-to-invoke-a-system-call-via-sysenter-in-inline-assembly-x86-amd64-linux

http://semipublic.comp-arch.net/wiki/SYSENTER/SYSEXIT_vs._SYSCALL/SYSRET

 

maybe the win is in translating (intel's) sysenter/sysexit to (amd's) syscall/sysret ???

Edited July 18, 2013 by bcobco

[spakk]

It would be very nice if it were true, we need to look further

[bcobco]

1. i am not native english speaker, my english is not very good but i will do my best

i dont have technical knowledge, im still learning, just basic notions... so the things im about to say can be completely wrong!

intel and amd implement the same thing (?) in different ways (sysenter vs syscall)

is this the main -amd hackintosh- issue? if yes, can it be fixed?

[instant idiot]

I'll take a peek.

I got some free time on my hands...

EDIT:

/* AnV: AMD TLB Fix */
void FixAMDTLB(void)
{
    uint64_t value = 0;

    /* re-enable TLB caching if BIOS disabled it */

    /* MSR_K8_HWCR mod */
    value = rdmsr64(0xC0010015);
    value &= ~(1UL << 3);
    wrmsr64(0xC0010015, value);

    /* MSR_C0011023 mod */
    value = rdmsr64(0xC0011023);
    value &= ~(1UL << 1);
    wrmsr64(0xC0011023, value);
}

Should do the trick.

I added it to cpuid.c and the declaration in cpuid.h

I'll compile the kernel now.

New boot argument also added: -notlbfix

This disables the patch above.

I put the function in cpuid_set_info.

Kernel compile is busy...

EDIT2: Kernel compile done.

Source diff is included as usual...

Hi Andy!

 

Unfortunately, I don't think I see any difference (with a 6570) from before: still little artifacts everywhere, Cinebench gives the "red pixel error", and OpenGL apps have a lot of black squares and have a lot of missing characters in their text. Interestingly, unlike everyone else, I have not seen any artifacts whatsoever in Launchpad so far. I am, however, seeing lots of black lines in Firefox, flickering/disappearing Dock, and disappearing file names in Finder.

[Shaneee]

Is sysenter and syscall files or kernel commands? If they are files could a roll back from say ML DP2 or Lion work?