Jump to content

Mavericks kernel testing on AMD (formerly Mountain Lion kernel testing on AMD)


theconnactic
 Share

6,414 posts in this topic

Recommended Posts

@chef: do you also have the panic on corecrypto or do you have any success in booting ML?

 

I'm eager to test these latest kernels but a crash on my filer hosed my test environment in ESXi. As soon as I can get back up and going I will let you know. It may be a day or so.

 

Glad to see the flurry of participation over the last week or so. Thank you all for your contributions.

Link to comment
Share on other sites

I know what you have in mind... Same as me, patch the kext...

 

@chef: is that the first bit of the ecx register?

 

@chef: is that the first bit of the ecx register?

Link to comment
Share on other sites

I know what you have in mind... Same as me, patch the kext...

 

@chef: is that the first bit of the ecx register?

 

@chef: is that the first bit of the ecx register?

 

I believe the nomenclature would be 'the last bit of the level 1 ECX register.'

 

This may help. Mind you all I did was the above mask, though, and FIPS mode became a non-issue.

 

http://kb.vmware.com/selfservice/microsites/search.do?language=en_US&cmd=displayKC&externalId=1993

Link to comment
Share on other sites

Indeed the highest bit of the 32bit register it is

ecx & 0xefffffff

Would be the override... I'll investigate...

Link to comment
Share on other sites

Patch the corecrypto.kext seems to be a must for AMD CPUs, unless we develop a way to mask the bad sse3 instruction on the fly.

 

Andy, can you adapt you patch for Lion 10.7.5, please? I have a lion 10.7.5 partition up and running, and i'd like to test specifically your changes to the ssse3 emulator. It's easy with Lion because, you know, we haven't any corecrypto.kext we must patch. :)

 

Thank you.

  • Like 1
Link to comment
Share on other sites

Good news... just booted ML with modified core crypto.

I changed the address of the sha1 and sha256 functions (SSE3 ones) to their non-sse3 counterparts (2 functions changed).

Try them with and without fips_mode=0.

Let me know ;)

On my Intel it booted, I hope on AMD now too...

 

working on rebuilding the test environment now. What bootloader are you using, ANV? Link?

Chameleon 2.1 with hack to replace APIC table...

corecrypto.kext.zip

  • Like 2
Link to comment
Share on other sites

Hi @ ll, I unfortunately had a long working day.

Here is my test with Andy last ML Kernel with Mountain Lion 10.8 and 10.8.3 on my AMD Phenom II X6

 

http://www.workupload.com/file/SbCooLi

 

http://www.workupload.com/file/257zmBC

 

http://www.workupload.com/file/cS1lRNk

 

http://www.workupload.com/file/JHSo2u9

 

http://www.workupload.com/file/zChGLwd

 

http://www.workupload.com/file/F1B9KX9

Link to comment
Share on other sites

Good news... just booted ML with modified core crypto.

I changed the address of the sha1 and sha256 functions (SSE3 ones) to their non-sse3 counterparts (2 functions changed).

Try them with and without fips_mode=0.

Let me know ;)

On my Intel it booted, I hope on AMD now too...

Chameleon 2.1 with hack to replace APIC table...

 

This with or without the emulator or fips mode. Passes the corecrypto kext :)

 

ImageUploadedByTapatalk1355253083.440076.jpg

Link to comment
Share on other sites

Test with Andys last ML Kernel with Lion 10.7.4 ,on my AMD Phenom II X6 follows.

 

it stops at:

PFM64 44cpu 0xfff10000000, 0xf0000000

PCI configuration begin

 

though I booted with NPCI = 0x2000

Link to comment
Share on other sites

Hi, folks!

 

With the ssse3 emulator enabled, i got a kernel panic just after a page size 9xxx error. Sorry the lack of a pic or vid. Mountain Lion 10.8.2 here.

 

On the backtraces:

_panic + 0xc6

_kernel_trap + 0x8c6

_return_from_trap + 0xcd

_bcopy + 0x16

_vm_commpage_init + 0x72

_scale_setup + 0x198

_call_continuation + 0x17

 

Will try without it.

 

EDIT: without the ssse3 emulator enabled, the patched corecrypto.kexy loaded an ran just fine, but the kernel froze first at [PCI Configuration Begin], because i forgot to add the npci boot flag. With it, the boot freezes at Kernel is LP64.

 

The ssse3 emulator isn't ready yet.

 

Thank you very much, Andy, and congratulations for the kext patching.

Link to comment
Share on other sites

Well, at least we are making progress... now only fixing the last bits in IOCatalogue.cpp and OSKext.cpp... if we can do that it should work...

It needs new functions for ML though... maybe Bronzovka could help with it?

Glad to hear that at least corecrypto is fixed... :-D

  • Like 1
Link to comment
Share on other sites

rite it didnt panic it just stopped at Kernel is LP64

 

only using -v -enable_ssse3emu npci=0x2000

 

sorry picture is a bit screwed ;)http://cl.ly/image/1p0Y0z3D1K31

 

latest kernel and corecrypto.kext

 

will do more testing tomorrow

 

Its the disk timing out. Same on mine (more or less). Happens for me attached as both an IDE or a SCSI disk. OSX looks to have support for the VMWare hardware devices, though.

 

I've got FakeSMC loaded, this disk otherwise boots fine on my i5 machine (different kernel of course).

 

anv.jpg

Link to comment
Share on other sites

 Share

×
×
  • Create New...