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SpeedStepper (now supports Mountain Lion 10.8.3)

flAked

By flAked,
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Goron
Goron
Posted
Posted

Absolutely NO patch works for 11D50b (10.7.3 with AICPUPM v. 185.0.0) here, even patched Bios 2103 doesn´t :(

 

Any hints to get AICPUPM to load on 10.7.3 (11D50b) on Sabertooth P67????

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Blah101
Blah101
Posted
Posted

I have a small problem/ question. My i5 uses turbo boost to OC to 4.5 and my core is set to 1.33. However, when running SMC monitor, my vcore reads as 1.6, which is way above what is needed and not safe to run at. Can someone tell me if this is a miss reading? If not, how do I fix this?

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delirumhappy
delirumhappy
Posted
Posted

I have a small problem/ question. My i5 uses turbo boost to OC to 4.5 and my core is set to 1.33. However, when running SMC monitor, my vcore reads as 1.6, which is way above what is needed and not safe to run at. Can someone tell me if this is a miss reading? If not, how do I fix this?

 

take a look at this: http://www.insanelymac.com/forum/index.php?showtopic=274782&st=20

 

You'll need to patch your IntelCPUMonitor. People generally have had success with this.

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Mohamed Khairy
Mohamed Khairy
Posted
Posted

Script updated to work with 10.8 DP2 which is non-fat

AICPMPatch.pl.zip

 

 

i tried it with DP2 & DP3 and patching is done

 

but i got this panic :(

 

post-378955-0-49569500-1334995377_thumb.jpg

 

so must use null to by pass this panic

 

 

and tried to patch my bios but my dell notebook bios is different from asus bios

 

have only one CpuPei and can't find on it this code 800018EB050D0080

 

this my bios

n5110a9_stock.rar

 

 

hope helping on this :)

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juanerson
juanerson
Posted
Posted

Exactly same Kernel Panic as Mohamed Khairy here in 10.7.4 (11E46), booting with "UseKernelCache=No" to prevent instant reboot... So, at this point the Patch seems to be insufficient. Maybe a new parts to write operations (MSR registers) are blocked in AICPM.kext (versions 193.0 = 10.7.4 and 196.0 = DP3) or something else about it?

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juanerson
juanerson
Posted
Posted

Well. Now is working partially fine. At least the system boots without NullCPU.

 

I need to correct my opinion about the AICPMPatch, please sorry guys. Because the Patcher - Script by oldnapalm is working very well, as expected... my respect to him and of course to all the people involved in this project. The problem seems coming from the SSDT tables, so now I have NO tables from /Extra, it booting fine, using GenerateCStates=Yes and DropSSDT=Yes to avoid LPC errors. But I have NO readings of P-States, even using GeneratePStates=Yes is NOT working this flag right now. So, I have NO native SpeedStep (EIST) support, but fortunately C1E (Max / min multipliers) is running. I will do more tests with some custom/compatibles SSDT table(s) for P-States. Please sorry my English, and Good Luck.

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Mohamed Khairy
Mohamed Khairy
Posted
Posted

but

 

with out DropSSDT=Yes i got more pstates

MSRDumper PStatesReached: 8 10 11 13 14 17 18 19 22 23

and under ACPI_SMC_Platformplugin got performance state arrey

 

with DropSSDT=Yes

 

MSRDumper PStatesReached: 8 11 12 16 26 27 29

 

i got turbo post but less pstates

and under acpi_smc ..... there is no performance state arrey

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juanerson
juanerson
Posted
Posted (edited)

Revoboot is NOT a requirement FOR THIS PROCEDURE, at all.

 

I have installed Chameleon 2.1svn 1925, all my SSDT tables in /Extra for C&PStates (named and loading like SSDT.aml, SSDT-1.aml, SSDT-2.aml... etc).

Captura de pantalla 2012-04-24 a la(s) 17.57.59.png

But If you prefer, the C-States table can be generated automatically by the flag "GenerateCStates=Yes". So, one less table from /Extra, for you.

 

The fix must be applied into the SSDT table of P-States (is just one table for sandy bridge). And, of course "DropSSDT=Yes" to avoid the bad factory one(s).

 

THE SSDT TABLE UPLOADED BY VCH888 IS A VERY GOOD EXAMPLE (GIGABYTE MOTHERBOARD AND i5-2500K).

 

PLEASE, DO NOT USE THE ATTACHED TO LOAD ANYTHING. I WANT TO BE CLEAR... THAT'S MY OWN TABLE, EXTRACTED FROM MY OWN BIOS - FIRMWARE, FOR MY OWN CPU (LITERALLY). JUST COMPARE THE IMPORTANT "_PSS" OR "APSS" SECTIONS WITH YOURS, AND MAKE YOUR OWN CHANGES. APART TO THAT SECTION, YOUR TABLE(S) COULD BE VERY DIFFERENT IN SOME OTHER ASPECTS, FOR SURE.

TABLES ONLY FOR REFERENCE.zip

Edited by juanerson
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Mohamed Khairy
Mohamed Khairy
Posted
Posted

Revoboot is NOT a requirement at all.

 

I have installed Chameleon 2.1svn 1925, all my SSDT tables in /Extra for C&PStates (named and loading like SSDT.aml, SSDT-1, SSDT-2.. etc).

post-270577-0-86658600-1335306379_thumb.png

The fix must be applied into the SSDT table for P-States (is just one table for sandy bridge). And of course "DropSSDT=Yes" to avoid the bad factory ones.

 

can you share your original ssdt tables and edited ones

so i can do one for me :)

 

thanks

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Mohamed Khairy
Mohamed Khairy
Posted
Posted

edit i used the ssdt.dsl of Z68XP-UD3R_i2500K that was on topic

and edited frequency to begin from 800 to 2900

 

and this worked fine to me

 

MSRDumper PStatesReached: 8 11 12 13 16 18 19 21 22 25 26 27 29

 

there is 22 state on ioregistry

 

didn't notice that you edited your post will try to use mine ssdt and edit it like yours one :)

 

 

thanks again

 

 

SSDT.aml.zip

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juanerson
juanerson
Posted
Posted

That specific value should coming in your factory table, which can be extracted in windows with AIDA64. But there is not the important part of the fix... look in the ioreg. Then, you don't need calculate it... please see the other example and compare, is more simple.

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Mohamed Khairy
Mohamed Khairy
Posted
Posted

That specific value should coming in your factory table, extracted in windows with AIDA64. You don't need calculate it... see the other example, is more simple.

 

thanks my table only contain 8 states

 

any way i got values from macbookpro 8.1 io registry that came with Intel® Core™ i5-2415M CPU @ 2.30GHz

and there is 22 state and values is typical to my cpu :)

 

will put this the rest of values ;)

 

-----------------------------------------------

just done ;)

post-378955-0-86491600-1335326827_thumb.png

 

SSDT.aml.zip

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asstastic
asstastic
Posted
Posted

DropSSDT=Yes fixed kernel panics on boot with 10.7.3 for me.

 

Update: Only get 2 p-states. I noticed in my IOReg PerformanceStateArray that p-state values jump from 0x14 to 0x1d

SpeedStep.tiff

 

 

I experimented with several versions of MacBookPro8_2.plist in ACPI_SMC_PlatformPlugin.kext

 

10.6.7 plist: 2 p-ststes

No plist: 2 p-states

10.7.0 plist: System lockup and CMOS corruption, could not test p-states

SpeedStep.tiff

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rama
rama
Posted
Posted

I'm trying to get this patch to work on a Dell vostro 3550 laptop. I have 10.7.3 installed (aicpupm ver. 167.3.0) The patch has gone successfully, but when I boot without Nullcpupm or with the -allowCPUPM flag, I get all the way to the osx GUI, but then the laptop goes to sleep, If I press the power button it almost boots, then goes back to sleep and I can't get it to come back, It just loops like this endlessly. Is this likely a DSDT issue with sleep functions? is there any know workaround?

thanks.

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haxzion
haxzion
Posted
Posted

I'm trying to get this patch to work on a Dell vostro 3550 laptop. I have 10.7.3 installed (aicpupm ver. 167.3.0) The patch has gone successfully, but when I boot without Nullcpupm or with the -allowCPUPM flag, I get all the way to the osx GUI, but then the laptop goes to sleep, If I press the power button it almost boots, then goes back to sleep and I can't get it to come back, It just loops like this endlessly. Is this likely a DSDT issue with sleep functions? is there any know workaround?

thanks.

 

i don't think your problem is related to speedstepper.since you don't get a KP then the patch works fine..

Could you give us some details?

Which bootloader - custom SSDT or pstates auto generation?

Have you tried to boot with -x ?

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beta992
beta992
Posted
Posted

Could somebody please let me show to generate a SSDT for my i5-2400 CPU? I'm trying to read the instructions given here, but I don't understand the edits.

I have already patch ACPM, and I can boot without any problems on ML DP3.

 

Chameleon generates C&P-states:

5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 1
5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 0
5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 2
5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 3

 

Do I need any edit in my DSDT? Do I need to paste a plist file into ACPM? How can I create a SSD?

 

Hope someone can help me, :)

 

Thanks.

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haxzion
haxzion
Posted
Posted

Could somebody please let me show to generate a SSDT for my i5-2400 CPU? I'm trying to read the instructions given here, but I don't understand the edits.

I have already patch ACPM, and I can boot without any problems on ML DP3.

 

Chameleon generates C&P-states:

5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 1
5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 0
5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 2
5/3/12 5:24:22.000 PM kernel[0]: P-State Stepper Error 18 at step 2 in context 2 on CPU 3

 

Do I need any edit in my DSDT? Do I need to paste a plist file into ACPM? How can I create a SSD?

 

Hope someone can help me, :)

 

Thanks.

 

First of all don't let chameleon generate anything in ML and since you have pathced successfully your ACPM you don't need to do anything else to it.The reason we patch ACPM is because we don't have a gigabyte board and we wanna avoid KP on boot.

Since your system boots you are good. Now, in order to get proper speedstep you need CPU definitions in your DSDT for your cpu like:

Scope (_PR)
{
	Processor (P000, 0x01, 0x00000410, 0x06)
	{
	}
	Processor (P001, 0x02, 0x00000410, 0x06)
	{
	}
	Processor (P002, 0x03, 0x00000410, 0x06)
	{
	}
	Processor (P003, 0x04, 0x00000410, 0x06)
	{
	}
}

 

and a proper SSDT for your cpu.Since we have the same cpu you could test mine.

 

ssdt.aml.zip

 

You can also read here http://www.insanelymac.com/forum/index.php?showtopic=278374

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beta992
beta992
Posted
Posted

First of all don't let chameleon generate anything in ML and since you have pathced successfully your ACPM you don't need to do anything else to it.The reason we patch ACPM is because we don't have a gigabyte board and we wanna avoid KP on boot.

Since your system boots you are good. Now, in order to get proper speedstep you need CPU definitions in your DSDT for your cpu like:

Scope (_PR)
{
	Processor (P000, 0x01, 0x00000410, 0x06)
	{
	}
	Processor (P001, 0x02, 0x00000410, 0x06)
	{
	}
	Processor (P002, 0x03, 0x00000410, 0x06)
	{
	}
	Processor (P003, 0x04, 0x00000410, 0x06)
	{
	}
}

 

and a proper SSDT for your cpu.Since we have the same cpu you could test mine.

 

ssdt.aml.zip

 

You can also read here http://www.insanelym...howtopic=278374

Thanks! Going to test this. :)

 

EDIT tested:

5/4/12 10:51:06.000 PM kernel[0]: MSRDumper CoreMulti(33) 
5/4/12 10:51:06.000 PM kernel[0]: MSRDumper PStatesReached: 16 32 33 34 
5/4/12 10:51:07.000 PM kernel[0]: MSRDumper CoreMulti(33) 
5/4/12 10:51:07.000 PM kernel[0]: MSRDumper PStatesReached: 16 32 33 34 
5/4/12 10:51:07.000 PM kernel[0]: MSRDumper CoreMulti(32) 
5/4/12 10:51:07.000 PM kernel[0]: MSRDumper PStatesReached: 16 32 33 34 
5/4/12 10:51:08.000 PM kernel[0]: MSRDumper CoreMulti(32) 
5/4/12 10:51:08.000 PM kernel[0]: MSRDumper PStatesReached: 16 32 33 34 
5/4/12 10:51:08.000 PM kernel[0]: MSRDumper CoreMulti(32) 
5/4/12 10:51:08.000 PM kernel[0]: MSRDumper PStatesReached: 16 32 33 34

 

It seems that it works, but how to calculate your PStates? Is there an app or some (easy) method to do that?

It never hits 34 btw, is this normal? Could you show me how to generate a SSDT?

 

I have GenerateCStates=Yes & DropSSDT=Yes in boot.plist to boot successfully.

 

Thanks for helping me with this. :)

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