SpeedStepper (now supports Mountain Lion 10.8.3)

[bombata1251]

Works on asus p8z68 Deluxe!

Speedstep works!

Turbo is recognized Pstates 16-44!!!

Thanks!!

[skyw00lker]

Where do I get the AppleCPUPowerManagement.kext

 

I got the 166.0.0 on the installer usb but the 167.0.0 can't be found or anyone else on my computer.

[SteveRings]

10.7.3 (11D16) is out for dev and manually modifying 167.2.0 with 'like' changes which you made to 167.0.0 yields a bootable and executable machine but I'm stuck in sslloooww. Just one PState; the good news is my machine runs much cooler

 

Is your patcher something you intend to update? I realize I am early but I was enjoying the POWER and now I feel, well, slightly lethargic.

 

When I say 'like', I calculated an offset from the 'first' in the new module to the 'first' in the old module and changed all of the wrmsr with matching (6, I believe) and nearly matching (4) locations. I ended up with the same changed versus unchanged (strings 00000f30 vs 00009090) in the same order (I think, my editor seemed a bit dodgey ).

 

Anyway, GeneratePStates/CStates doesn't help the cause, either. I am running a Dell L702x with a i7-2630QM so it may be they've done something to cripple it but I just wanted you to know, if it's still an active task on your radar.

 

Thanks so much for your work - it is awesome!

[olegpronin]

anybody please update the patcher for 10.7.3 new beta, thanks

[SteveRings]

anybody please update the patcher for 10.7.3 new beta, thanks

I hesitate to post a patcher as it is not mine. The addresses which appear to be equivalent in the AICPUPM 167.2.0 are:

 

9D1A

9DE2

9E60

9EA9

A764 <--<< I pulled this out (changed back to 0F30) as it does not appear to be a wrmsr ...

A816

A8F4

AF40

1130A

113E8

 

This whole process won't take more than 10 minutes if you follow my instructions:

 

http://www.suavetech.com/0xed/0xed.html

 

1) Download the 0xED.app editor from link above.

2) Place a copy of the entire AICPUPM.kext on your desktop.

3) Open the 0xED (you can do this from you Downloads folder if you wish) editor and using the File menu, open the binary inside the kext (the Open will drill down into the kext just like it was a normal folder) (Picture 1, below).

4) Go to the Edit menu, Write Mode and set to Overwrite

5) Type each address into the Go To Offset box

6) Verify that the two bytes are 0f30 (this means your address was correct) and type 9090 (just type, the cursor will advance for you) (Picture 2, below).

7) Repeat steps 5 & 6 nine times (I find that AF64 is not a necessary address but it works either way)

8) Press the big red save button - the binary will be replaced in the kext.

9) Exit 0xED.app

10) Install the kext with Kext Helper b7.app or whatever you use. Finished!

 

Picture 1:

 

Picture 2:

 

As flAked is the author, if you have issues, it is probably best to wait for him to respond. You use these at your risk as I have limited knowledge on the subject.

[androdev]

you are close. On my MSI I had also only CpuPei and that was enough, but what is strange you are not able to find 800018EB050D0080. I also remember that when I was using some tool to search for that bits sth was wrong and I searched for few less bits like 050D0080 and found the whole string.

Remember to use flasher which verify checksum - if u did sth wrong you will have chance to not flash with corrupt file..

Need some help from people who understands how this works.

 

I have AMI Aptio bios on my Dell N5110 notebook. Also with one CpuPei and CpuPeiBeforeMem.

But unable to find this hex string 800018EB050D0080.

How exactly did you find which byte is MSR lock?

[jazzyguy]

Does anyone know how we would enable turbo boost?

[kishunv]

Does anyone know how we would enable turbo boost?

Use you own p-states in dsdt

For example section for mine i5-2410M

 

Scope (_PR)

{

Processor (CPU0, 0x01, 0x00004010, 0x06)

{

Name (_CST, Package (0x03)

{

0x02,

Package (0x04)

{

ResourceTemplate ()

{

Register (FFixedHW,

0x01, // Bit Width

0x02, // Bit Offset

0x0100000000000000, // Address

,)

},

One,

One,

0x03E8

},

Package (0x04)

{

ResourceTemplate ()

{

Register (FFixedHW,

0x01, // Bit Width

0x02, // Bit Offset

0x0300000000000020, // Address

,)

},

0x03,

0x60,

0x015E

}

})

Name (_PSS, Package (0x16)

{

Package (0x06)

{

0x0B54,

0x88B8,

0x0A,

0x0A,

0x1D00,

0x1D00

},

Package (0x06)

{

0x0AF0,

0x88B8,

0x0A,

0x0A,

0x1C00,

0x1C00

},

Package (0x06)

{

0x0A8C,

0x88B8,

0x0A,

0x0A,

0x1B00,

0x1B00

},

Package (0x06)

{

0x0A28,

0x88B8,

0x0A,

0x0A,

0x1A00,

0x1A00

},

Package (0x06)

{

0x09C4,

0x88B8,

0x0A,

0x0A,

0x1900,

0x1900

},

Package (0x06)

{

0x0960,

0x88B8,

0x0A,

0x0A,

0x1800,

0x1800

},

Package (0x06)

{

0x08FC,

0x88B8,

0x0A,

0x0A,

0x1700,

0x1700

},

Package (0x06)

{

0x0898,

0x8068,

0x0A,

0x0A,

0x1600,

0x1600

},

Package (0x06)

{

0x0834,

0x7997,

0x0A,

0x0A,

0x1500,

0x1500

},

Package (0x06)

{

0x07D0,

0x7197,

0x0A,

0x0A,

0x1400,

0x1400

},

Package (0x06)

{

0x076C,

0x6B0E,

0x0A,

0x0A,

0x1300,

0x1300

},

Package (0x06)

{

0x0708,

0x64A6,

0x0A,

0x0A,

0x1200,

0x1200

},

Package (0x06)

{

0x06A4,

0x5D1D,

0x0A,

0x0A,

0x1100,

0x1100

},

Package (0x06)

{

0x0640,

0x56F9,

0x0A,

0x0A,

0x1000,

0x1000

},

Package (0x06)

{

0x05DC,

0x50F6,

0x0A,

0x0A,

0x0F00,

0x0F00

},

Package (0x06)

{

0x0578,

0x49D8,

0x0A,

0x0A,

0x0E00,

0x0E00

},

Package (0x06)

{

0x0514,

0x4418,

0x0A,

0x0A,

0x0D00,

0x0D00

},

Package (0x06)

{

0x04B0,

0x3E7C,

0x0A,

0x0A,

0x0C00,

0x0C00

},

Package (0x06)

{

0x044C,

0x37CA,

0x0A,

0x0A,

0x0B00,

0x0B00

},

Package (0x06)

{

0x03E8,

0x326B,

0x0A,

0x0A,

0x0A00,

0x0A00

},

Package (0x06)

{

0x0384,

0x2D2B,

0x0A,

0x0A,

0x0900,

0x0900

},

Package (0x06)

{

0x0320,

0x26E4,

0x0A,

0x0A,

0x0800,

0x0800

}

})

Method (_PPC, 0, NotSerialized)

{

Return (Zero)

}

}

Processor (CPU1, 0x02, 0x00000410, 0x06)

{

Alias (^CPU0._CST, _CST)

Alias (^CPU0._PSS, _PSS)

Alias (^CPU0._PPC, _PPC)

}

Processor (CPU2, 0x03, 0x00000410, 0x06)

{

Alias (^CPU0._CST, _CST)

Alias (^CPU0._PSS, _PSS)

Alias (^CPU0._PPC, _PPC)

}

Processor (CPU3, 0x04, 0x00000410, 0x06)

{

Alias (^CPU0._CST, _CST)

Alias (^CPU0._PSS, _PSS)

Alias (^CPU0._PPC, _PPC)

}

Processor (CPU4, 0x05, 0x00000410, 0x06)

{

}

Processor (CPU5, 0x06, 0x00000410, 0x06)

{

}

Processor (CPU6, 0x07, 0x00000410, 0x06)

{

}

Processor (CPU7, 0x08, 0x00000410, 0x06)

{

}

}

 

Upper step

0x0B54,

0x88B8,

0x0A,

0x0A,

0x1D00,

0x1D00

[davidm71]

Hi,

 

I have an Asus P8Z68 Deluxe board using bios 706 which I have I believe successfully patched into the CpuPie modules the updated hex code to allow native use of AICPUPM Speedstep. I was able to upgrade my bios with out failure and reboot with the virgin AICPUPM kext file. I have included that bios file for others with the same board. USE WITH CAUTION. I take no responsibility for any bricked boards that may arise.

 

Worked for me!

 

Edit: Removed not to violate rules and regulations. If anyone wants a copy pm me...

[jazzyguy]

Use you own p-states in dsdt For example section for mine i5-2410M

Scope (_PR) { Processor (CPU0, 0x01, 0x00004010, 0x06) { Name (_CST, Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0100000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0300000000000020, // Address ,) }, 0x03, 0x60, 0x015E } }) Name (_PSS, Package (0x16) { Package (0x06) { 0x0B54, 0x88B8, 0x0A, 0x0A, 0x1D00, 0x1D00 }, Package (0x06) { 0x0AF0, 0x88B8, 0x0A, 0x0A, 0x1C00, 0x1C00 }, Package (0x06) { 0x0A8C, 0x88B8, 0x0A, 0x0A, 0x1B00, 0x1B00 }, Package (0x06) { 0x0A28, 0x88B8, 0x0A, 0x0A, 0x1A00, 0x1A00 }, Package (0x06) { 0x09C4, 0x88B8, 0x0A, 0x0A, 0x1900, 0x1900 }, Package (0x06) { 0x0960, 0x88B8, 0x0A, 0x0A, 0x1800, 0x1800 }, Package (0x06) { 0x08FC, 0x88B8, 0x0A, 0x0A, 0x1700, 0x1700 }, Package (0x06) { 0x0898, 0x8068, 0x0A, 0x0A, 0x1600, 0x1600 }, Package (0x06) { 0x0834, 0x7997, 0x0A, 0x0A, 0x1500, 0x1500 }, Package (0x06) { 0x07D0, 0x7197, 0x0A, 0x0A, 0x1400, 0x1400 }, Package (0x06) { 0x076C, 0x6B0E, 0x0A, 0x0A, 0x1300, 0x1300 }, Package (0x06) { 0x0708, 0x64A6, 0x0A, 0x0A, 0x1200, 0x1200 }, Package (0x06) { 0x06A4, 0x5D1D, 0x0A, 0x0A, 0x1100, 0x1100 }, Package (0x06) { 0x0640, 0x56F9, 0x0A, 0x0A, 0x1000, 0x1000 }, Package (0x06) { 0x05DC, 0x50F6, 0x0A, 0x0A, 0x0F00, 0x0F00 }, Package (0x06) { 0x0578, 0x49D8, 0x0A, 0x0A, 0x0E00, 0x0E00 }, Package (0x06) { 0x0514, 0x4418, 0x0A, 0x0A, 0x0D00, 0x0D00 }, Package (0x06) { 0x04B0, 0x3E7C, 0x0A, 0x0A, 0x0C00, 0x0C00 }, Package (0x06) { 0x044C, 0x37CA, 0x0A, 0x0A, 0x0B00, 0x0B00 }, Package (0x06) { 0x03E8, 0x326B, 0x0A, 0x0A, 0x0A00, 0x0A00 }, Package (0x06) { 0x0384, 0x2D2B, 0x0A, 0x0A, 0x0900, 0x0900 }, Package (0x06) { 0x0320, 0x26E4, 0x0A, 0x0A, 0x0800, 0x0800 } }) Method (_PPC, 0, NotSerialized) { Return (Zero) } } Processor (CPU1, 0x02, 0x00000410, 0x06) { Alias (^CPU0._CST, _CST) Alias (^CPU0._PSS, _PSS) Alias (^CPU0._PPC, _PPC) } Processor (CPU2, 0x03, 0x00000410, 0x06) { Alias (^CPU0._CST, _CST) Alias (^CPU0._PSS, _PSS) Alias (^CPU0._PPC, _PPC) } Processor (CPU3, 0x04, 0x00000410, 0x06) { Alias (^CPU0._CST, _CST) Alias (^CPU0._PSS, _PSS) Alias (^CPU0._PPC, _PPC) } Processor (CPU4, 0x05, 0x00000410, 0x06) { } Processor (CPU5, 0x06, 0x00000410, 0x06) { } Processor (CPU6, 0x07, 0x00000410, 0x06) { } Processor (CPU7, 0x08, 0x00000410, 0x06) { } }

Upper step 0x0B54, 0x88B8, 0x0A, 0x0A, 0x1D00, 0x1D00

 

I don't see what to put where?

 

And where did you get that program from?

[kishunv]

jazzyguy

I don't see what to put where? - It's not easy way, you should find your own SSDT table with p-states(AIDA in Windows) and put p-states data in your dsdt.aml

And where did you get that program from? - SMC Monitor, it show which p-states and c-state available.

[magnifico]

Flaked on my gigabyte dont work...because?

[haxzion]

Flaked on my gigabyte dont work...because?

 

I don't think you need this for Gigabyte boards.Just a stock aicpupm and a proper DSDT.

Dam i want a gigabyte board too

 

BTW my speedstep results...

Lion 10.7.2

smbios:imac12,2

patched AICPUPM

stepper copied from MacBookPro 8,3

with SSDT.aml for I5 2400 (stock)

PStatesReached: 16 17 21 25 30 32 33 (almost there )

Geekbench 8450-8500

[iStigPL]

I don't think you need this for Gigabyte boards.Just a stock aicpupm and a proper DSDT.

Dam i want a gigabyte board too

 

gigabyte mb is the worst choice - a lot of work with DSDT and never guaranted to have 100% working. Asus and MSI with patched BIOS and you can biuld 100% vanilla system.

[magnifico]

Dont work on snow with Gigabyte

[XLR]

I make patched BIOSes for SB mobo. Everything is working like charm. For P8Z68 Deluxe after flashing BIOS geekbench results increased by 1500 points compared to SpeedStepper. The same for MSI.

Sounds interesting, can you post any more info?

[haxzion]

gigabyte mb is the worst choice - a lot of work with DSDT and never guaranted to have 100% working. Asus and MSI with patched BIOS and you can biuld 100% vanilla system.

 

actually the best mb choice for a sandy bridge hackintosh system is any Gigabyte with a Z68 chip

[magnifico]

On my gigabyte ( z68 ) don't work ( on Snow) but on Lion working perfect...because?

[haxzion]

On my gigabyte ( z68 ) don't work ( on Snow) but on Lion working perfect...because?

 

Because Lion came out with sandy bridge Macs and i think 10.6.8 Snow Leopard supports sb too.

[anibalin]

Hi guys, Im a bit puzzled. Asus p8p67 Le. I tweaked the bios successfully (thanks for that) but I realized that C & P states are not generated:

Customizing SystemID with : e0a278a5-d268-e011-b4a2-f46d0429bdaa
Read HFS+ file: [hd(0,2)/Extra/DSDT.aml] 32080 bytes.
ACPI table not found: SSDT.aml
FADT: Restart Fix applied!
FADT: Using custom DSDT!
ACPI CPUs not found: C-States not generated !!!
ACPI CPUs not found: P-States not generated !!!
FADT: Restart Fix applied!
FADT: Using custom DSDT!
ACPI CPUs not found: C-States not generated !!!
ACPI CPUs not found: P-States not generated !!!
Starting Darwin x86_64

 

Using Chimera 1.6, this is org.chameleon.Boot.plist:

<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>Boot Banner</key>
<string>No</string>
<key>EthernetBuiltIn</key>
<string>Yes</string>
<key>GUI</key>
<string>No</string>
<key>Graphics Mode</key>
<string>1920x1200x32</string>
<key>GraphicsEnabler</key>
<string>Yes</string>
<key>Kernel</key>
<string>mach_kernel</string>
<key>Kernel Flags</key>
<string>npci=0x2000 darkwake=0</string>
<key>Legacy Logo</key>
<string>Yes</string>
<key>Timeout</key>
<string>2</string>
<key>Wait</key>
<string>No</string
   <key>DropSSDT</key>
  <string>Yes</string>
   <key>GeneratePStates</key>
 <string>Yes</string>
 <key>GenerateCStates</key>
 <string>Yes</string>
 <key>EnableC2State</key>
 <string>Yes</string>
 <key>EnableC3State</key>
 <string>Yes</string>
 <key>EnableC4State</key>
 <string>Yes</string>
 <key>EnableC6State</key>
 <string>Yes</string>
 <key>UseKernelCache</key>
 <string>Yes</string>
</dict>
</plist>

The thing is that msrdumper shows P states:

 

12/2/11 11:58:38.000 AM kernel: MSRDumper PStatesReached: 16 23 35 36 37

 

What is actually happening? Is chameleon actually generating P states?

Thanks for the light.

[haxzion]

Hi guys, Im a bit puzzled. Asus p8p67 Le. I tweaked the bios successfully (thanks for that) but I realized that C & P states are not generated:

 

Add cpu definitions in your DSDT...something like

Scope (_PR)
{
	Processor (P000, 0x01, 0x00000410, 0x06)
	Processor (P001, 0x02, 0x00000410, 0x06)
	Processor (P002, 0x03, 0x00000410, 0x06)
	Processor (P003, 0x04, 0x00000410, 0x06)

}

this is for a 4core cpu....

 

Please add your specs in your signature..

[generaltlt]

how about the patch for 10.7.3 AppleIntelCPUPowerManagement.kext?

[flAked]

Just a quick update, yes there will be a patch for 1.7.3 but I won't support every developer preview.

[anibalin]

Add cpu definitions in your DSDT...something like

Scope (_PR)
{
	Processor (P000, 0x01, 0x00000410, 0x06)
	Processor (P001, 0x02, 0x00000410, 0x06)
	Processor (P002, 0x03, 0x00000410, 0x06)
	Processor (P003, 0x04, 0x00000410, 0x06)

}

this is for a 4core cpu....

 

Please add your specs in your signature..

 

 

Added the correct info to my dsdt:

	Scope (_PR)
	{
		Processor (CPU0, 0x01, 0x00000410, 0x06)
		{
		}
		Processor (CPU1, 0x02, 0x00000410, 0x06)
		{
		}
		Processor (CPU2, 0x03, 0x00000410, 0x06)
		{
		}
		Processor (CPU3, 0x04, 0x00000410, 0x06)
		{
		}
		Processor (CPU4, 0x05, 0x00000410, 0x06)
		{
		}
		Processor (CPU5, 0x06, 0x00000410, 0x06)
		{
		}
		Processor (CPU6, 0x07, 0x00000410, 0x06)
		{
		}
		Processor (CPU7, 0x08, 0x00000410, 0x06)
		{
		}
[/codeBOX]

 

bdmesg:

[codeBOX]
Customizing SystemID with : e0a278a5-d268-e011-b4a2-f46d0429bdaa
Read HFS+ file: [hd(0,2)/Extra/DSDT.aml] 32259 bytes.
ACPI table not found: SSDT.aml
FADT: Restart Fix applied!
FADT: Using custom DSDT!
Found ACPI CPU: CPU0
Found ACPI CPU: CPU1
Found ACPI CPU: CPU2
Found ACPI CPU: CPU3
Found ACPI CPU: CPU4
Found ACPI CPU: CPU5
Found ACPI CPU: CPU6
Found ACPI CPU: CPU7
SSDT with CPU C-States generated successfully
P-States: min 0x10, max 0x0
RSDT: Added 1 SSDT table(s)
FADT: Restart Fix applied!
FADT: Using custom DSDT!
P-States: min 0x10, max 0x0
Added 1 SSDT table(s) into XSDT
Starting Darwin x86_64
[/codeBOX]

 

Nice :-)

On the other hand Im having CST Evaluation Failed and LPC device failed:

[codeBOX]
12/4/11 7:04:40.000 PM kernel: ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed
12/4/11 7:04:40.000 PM kernel: DSMOS has arrived
12/4/11 7:04:40.000 PM kernel: ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed
12/4/11 7:04:40.000 PM kernel: ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized
[/codeBOX]

 

lspci -nn

[codeBOX]
00:1f.0 ISA bridge [0601]: Intel Corporation P67 Express Chipset Family LPC Controller [8086:1c46] (rev 05)
00:1f.3 SMBus [0c05]: Intel Corporation 6 Series/C200 Series Chipset Family SMBus Controller [8086:1c22] (rev 05)
[/codeBOX]

 

kextstat, however, shows that AppleLPC is being loaded:

[codeBOX]
82 0 0xffffff7f8190a000 0xe000 0xe000 com.apple.driver.AppleSMBusController (1.0.10d0) <23 9 8 5 4 3>
61 0 0xffffff7f81907000 0x3000 0x3000 com.apple.driver.AppleSMBusPCI (1.0.10d0) <9 5 4 3>
59 0 0xffffff7f819cf000 0x3000 0x3000 com.apple.driver.AppleLPC (1.5.3) <9 5 4 3>
[/codeBOX]

 

dsdt:

[codeBOX]
Device (SBUS)
{
Name (_ADR, 0x001F0003)
Device (BUS0)
{
Name (_CID, "smbus")
Name (_ADR, Zero)
Device (DVL0)
{
Name (_ADR, 0x57)
Name (_CID, "diagsvault")
}
}
Method (_DSM, 4, NotSerialized)
{
Store (Package (0x02)
{
"device-id",
Buffer (0x04)
{
0x30, 0x3A, 0x00, 0x00
}
}, Local0)
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
Return (Local0)
}
}

----
}
Method (_DSM, 4, NotSerialized)
{
Store (Package (0x02)
{
"device-id",
Buffer (0x04)
{
0x18, 0x3A, 0x00, 0x00
}
}, Local0)
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
Return (Local0)
}
[/codeBOX]

 

org.chameleon.boot.plist

[codeBOX]
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>Boot Banner</key>
<string>No</string>
<key>EthernetBuiltIn</key>
<string>Yes</string>
<key>GUI</key>
<string>No</string>
<key>Graphics Mode</key>
<string>1920x1200x32</string>
<key>GraphicsEnabler</key>
<string>No</string>
<key>Kernel</key>
<string>mach_kernel</string>
<key>Kernel Flags</key>
<string>npci=0x2000 darkwake=0</string>
<key>Legacy Logo</key>
<string>Yes</string>
<key>Timeout</key>
<string>2</string>
<key>Wait</key>
<string>No</string
<key>DropSSDT</key>
<string>Yes</string>
<key>GeneratePStates</key>
<string>Yes</string>
<key>GenerateCStates</key>
<string>Yes</string>
<key>UseKernelCache</key>
<string>Yes</string>
</dict>
</plist>
[/codeBOX]

 

Msrdumper.kext sadly only shows 2 states.

Specs: i7 2600k / Asus p8p67 LE (1004 bios) / 10.7.2 / dsdt.aml / 12,1 imac/ chimera 1.6

 

Thanks in advance guys.

[Kynyo]

Are P-States C-States Working?

Even the system is stressed the results are the same! 9 9 9)

I have system from signature with no use of DSDT!

Enabled All correct functions on the BIOS. Speedstep, S3, C2,C3,C4

MacPro 5,1 SMBIOS

Bootloader: Chameleon 2.1 RC5

Thanks in advance!

 

EDIT2: Anyone have a proper DSDT for Gigabyte EP45T-DS3R? BIOS F4C CPU Intel Core2Duo E8400?

Sleep also doesen't work, it gets sleep but fans and mouse/keyboard remain powered on!

These are my temps, can confirm speedstep, c-states, p-states, workin'?

Any help 'll be appreciated!

Thanks in advance!

I guess I've posted in the correct section!