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[DSDT] nForce 680i DSDT Development


iLeopod
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Nforce 680i DSDT

This Thread is to shows easy fixes for power management i use a EVGA with P32 Bios

My LSPCI

00:00.0 Host bridge [0600]: nVidia Corporation C55 Host Bridge [10de:03a1] (rev a2)
00:00.1 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03ac] (rev a1)
00:00.2 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03aa] (rev a1)
00:00.3 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03a9] (rev a1)
00:00.4 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03ab] (rev a1)
00:00.5 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03a8] (rev a2)
00:00.6 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b5] (rev a1)
00:00.7 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b4] (rev a1)
00:01.0 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03ad] (rev a1)
00:01.1 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03ae] (rev a1)
00:01.2 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03af] (rev a1)
00:01.3 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b0] (rev a1)
00:01.4 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b1] (rev a1)
00:01.5 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b2] (rev a1)
00:01.6 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b3] (rev a1)
00:02.0 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03b6] (rev a1)
00:02.1 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03bc] (rev a1)
00:02.2 RAM memory [0500]: nVidia Corporation C55 Memory Controller [10de:03ba] (rev a1)
00:03.0 PCI bridge [0604]: nVidia Corporation C55 PCI Express bridge [10de:03b7] (rev a1)
00:09.0 RAM memory [0500]: nVidia Corporation MCP55 Memory Controller [10de:0369] (rev a2)
00:0a.0 ISA bridge [0601]: nVidia Corporation MCP55 LPC Bridge [10de:0360] (rev a3)
00:0a.1 SMBus [0c05]: nVidia Corporation MCP55 SMBus [10de:0368] (rev a3)
00:0b.0 USB Controller [0c03]: nVidia Corporation MCP55 USB Controller [10de:036c] (rev a1)
00:0b.1 USB Controller [0c03]: nVidia Corporation MCP55 USB Controller [10de:036d] (rev a2)
00:0d.0 IDE interface [0101]: nVidia Corporation MCP55 IDE [10de:036e] (rev a1)
00:0e.0 IDE interface [0101]: nVidia Corporation MCP55 SATA Controller [10de:037f] (rev a3)
00:0e.1 IDE interface [0101]: nVidia Corporation MCP55 SATA Controller [10de:037f] (rev a3)
00:0e.2 IDE interface [0101]: nVidia Corporation MCP55 SATA Controller [10de:037f] (rev a3)
00:0f.0 PCI bridge [0604]: nVidia Corporation MCP55 PCI bridge [10de:0370] (rev a2)
00:0f.1 Audio device [0403]: nVidia Corporation MCP55 High Definition Audio [10de:0371] (rev a2)
00:11.0 Bridge [0680]: nVidia Corporation MCP55 Ethernet [10de:0373] (rev a3)
00:12.0 Bridge [0680]: nVidia Corporation MCP55 Ethernet [10de:0373] (rev a3)
01:00.0 VGA compatible controller [0300]: nVidia Corporation G92 [GeForce 9800 GT] [10de:0605] (rev a2)
02:07.0 FireWire (IEEE 1394) [0c00]: Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) [104c:8023]
02:0a.0 Ethernet controller [0200]: Atheros Communications Inc. Atheros AR5001X+ Wireless Network Adapter [168c:0013] (rev 01)

 

  1. DTGP
    add before or after the first Method
    Method (DTGP, 5, NotSerialized)
    {
    	If (LEqual (Arg0, Buffer (0x10)
    			{
    				/* 0000 */	0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, 
    				/* 0008 */	0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
    			}))
    	{
    		If (LEqual (Arg1, One))
    		{
    			If (LEqual (Arg2, Zero))
    			{
    				Store (Buffer (One)
    					{
    						0x03
    					}, Arg4)
    				Return (One)
    			}
    
    			If (LEqual (Arg2, One))
    			{
    				Return (One)
    			}
    		}
    	}
    
    	Store (Buffer (One)
    		{
    			0x00
    		}, Arg4)
    	Return (Zero)
    }


  2. _WAK
    Removes warning
    add into Method (_WAK, 1, NotSerialized)
    Return (Package (0x02)
    	{
    		Zero, 
    		Zero
    	})


  3. HPET
    add before Memory32Fixed
     
    					IRQNoFlags ()
    						{0}
    					IRQNoFlags ()
    						{8}
    					IRQNoFlags ()
    						{11}
    					IRQNoFlags ()
    						{15}


     

  4. HDEF (General audio)
    change Device Name on Name (_ADR, 0x000F0001) to HDEF
    		   Device (HDEF)
    		{
    			Name (_ADR, 0x000F0001)
    			Method (_DSM, 4, NotSerialized)
    			{
    				Store (Package (0x04)
    					{
    						"layout-id", 
    						Buffer (0x04)
    						{
    							0x0C, 0x00, 0x00, 0x00
    						}, 
    
    						"PinConfigurations", 
    						Buffer (Zero) {}
    					}, Local0)
    				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
    				Return (Local0)
    			}
    		}


  5. SBUS
    Replace all SMB0 with SBUS and add below Name (_ADR, 0x000A0001)
       Method (_DSM, 4, NotSerialized)
    			{
    				Store (Package (0x04)
    					{
    						"name", 
    						"pci10de,aa2", 
    						"device-id", 
    						Buffer (0x04)
    						{
    							0xA2, 0x0A, 0x00, 0x00
    						}
    					}, Local0)
    				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
    				Return (Local0)
    			}
    
    			Device (BUS0)
    			{
    				Name (_CID, "smbus")
    				Name (_ADR, Zero)
    				Device (DVL0)
    				{
    					Name (_ADR, 0x57)
    					Name (_CID, "diagsvault")
    				}
    			}


  6. LPCB
    on our DSDT VT86
    Replace all VT86 with LPCB ann ad below Name (_ADR, 0x000A0000)
    Method (_DSM, 4, NotSerialized)
    			{
    				Store (Package (0x02)
    					{
    						"device-id",
    						Buffer (0x04)
    						{
    							0xAE, 0x0A, 0x00, 0x00 
    						}
    					}, Local0)
    				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
    				Return (Local0)


    so far i tried it's not possible to inject the real device id with DSDT patches but with an LegacyKext (attached at End) its possible to inject the real ID.

 

 

Downloads:

OLDDSDT.aml.zip

 

LPC_injector.kext.zip

 

IOREG file:

Mac_Pro.ioreg.zip

original dsdt dumped with Linux

orginaldsdt.dsl.zip

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I think i've got nearly sleep working. (fans are still running,but wake possible). Change sleep mode in bios or pmstate in osx made no difference.

This should be a short DIYS Guide it will get maybe updated

This was done an an nforce 680i Board it will may be apply also to others but things could be look different

Use search function to find the locations.

U can use DSDTSE or the latest ISAL on mich_de's topic and any text editor.

First be sure u have LPC and SMB kext loaded.

Delete the Device FDC0 and Mem.

Then apply the following patches:

 

The right Side is the old stuff and the left how it should look.

 

post-407466-1297972314_thumb.jpg

 

post-407466-1297972325_thumb.jpg

 

post-407466-1297972333_thumb.jpg

USB0

post-407466-1297972340_thumb.jpg

USB2

 Device (EHC1)
		{
			Name (_ADR, 0x000B0001)
			OperationRegion (P020, PCI_Config, 0x49, One)
			Field (P020, AnyAcc, NoLock, Preserve)
			{
				U0WK,   1
			}

			Method (_DSM, 4, NotSerialized)
			{
				Store (Package (0x0F)
					{
						"device-id", 
						Buffer (0x04)
						{
							0xA6, 0x0A, 0x00, 0x00
						}, 

						"AAPL,clock-id", 
						Buffer (One)
						{
							0x0A
						}, 

						"built-in", 
						Buffer (One)
						{
							0x00
						}, 

						"device_type", 
						Buffer (0x05)
						{
							"EHCI"
						}, 

						"AAPL,current-available", 
						0x04B0, 
						"AAPL,current-extra", 
						0x02BC, 
						"AAPL,current-in-sleep", 
						0x03E8, 
						Buffer (One)
						{
							0x00
						}
					}, Local0)
				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
				Return (Local0)
			}

			Method (_PSW, 1, NotSerialized)
			{
				If (Arg0)
				{
					Store (One, U0WK)
				}
				Else
				{
					Store (Zero, U0WK)
				}
			}

			Method (_S1D, 0, NotSerialized)
			{
				Return (One)
			}

			Method (_S3D, 0, NotSerialized)
			{
				Return (One)
			}

			Name (_PRW, Package (0x02)
			{
				0x05, 
				0x04
			})
		}

 

 

post-407466-1297972350_thumb.jpg

 

Add this before the end:

post-407466-1297972357_thumb.jpg

 

Thanks and credits go to MaLd0n and all other DSDT DEVS.

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This stuff is not really needed!!!

Method (_DSM, 4, NotSerialized)
							{
								Store (Package (0x0A)
									{
										"AAPL,slot-name", 
										Buffer (0x09)
										{
											"Built In"
										}, 

										"built-in", 
										Buffer (One)
										{
											0x00
										}, 

										"device_type", 
										Buffer (0x10)
										{
											"AHCI Controller"
										}, 

										"model", 
										Buffer (0x1C)
										{
											"nForce SATA/AHCI Controller"
										}, 

										"name", 
										Buffer (0x1C)
										{
											"nForce SATA/AHCI Controller"
										}
									}, Local0)
								DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
								Return (Local0)
							}

 

And further ideas, questions or success stories a welcome.

 

Later i will uploade my current DSDT.

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  • 2 weeks later...

There are 2 different : AppleSMBusController.kext and AppleSMBusPCI.kext. They are loaded on some mac models. On some Pc u get an error in kernel log when they're not loaded.

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  • 2 weeks later...

Thanks for your reply. I'm happy to be not the only one with this board.

 

According sleep the DSM method actually disables sleep. Im no't sure if sleep could be done by dsdt edits maybe Driver hacking is needed The problem is nForceATA everything else are apple kexts. Also native shutdown mods doesn't work. But how i understand the are based on one Restart .kext (not sure about the name) that never worked on Nforce Boards.

 

An other topic that must be possible is to inject the SATA Chipset names in System Profiler, sure it's only cosmetics but looks nice :-)

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The post about how I got it compiling and working under a 64-bit kernel are here:

http://www.insanelymac.com/forum/index.php...p;#entry1520885

 

The source code is located in the attachment.

 

 

I have to say that so far stability with your DSDT having both CPU cores enabled is working fine so far. Typically I've always had freezes when using 2 cores. I'm not sure if that's something you worked on fixing in the DSDT or whether it's the kernel I use. I'm currently using nawcom's legacy kernel.

 

I haven't tested sleep functionality so far since I don't really use sleep.

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Do u mean freezes without kp. So far as i know its happen when spotlight tries to indexes NTFS drives. I currently i have totally disabled Spotlight and all runs smooth with vanilla kernel

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I've never been able to run a vanilla kernel. That's odd.

 

Edit:

I stand corrected. For the first time ever I just tried booting a vanilla 10.6.6 kernel and it worked. The last time I had Mac OS X installed, as far as kernel 10.6.4, I could not boot with the vanilla kernel. I'm surprised it worked.

 

 

So what kernel extensions do you use?

 

My motherboard has an onboard Marvell 88E1116 NIC.

 

So the extensions I currently have installed are:

 

/Extra/Extensions:

AnyAppleUSBKeyboard

AnyAppleUSBMouse

AppleNForceATA

Disabler

OpenHaltRestart

fakesmc.V2.5

 

/System/Library/Extensions:

ALC885.kext

AppleHDA.kext (10.6.2)

nForceLAN.0.64.5

 

I think that's about it.

 

Edit:

Updated extensions I use.

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  • 3 weeks later...

A couple of things:

 

 

1) I was able to successfully update to 10.6.7 without having to do anything else. I just told Software Update to update from 10.6.6 to 10.6.7, rebooted, and everything was fine.

 

2) Having both cores enabled is still too unstable for me. It's fine if I'm just using IRC or browsing the web, but if I try to do any kind of large file transfer, or do a lot on the system at once, it will almost certainly spinlock. So I'm just going to stick with using one core for now. :D

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I have no freeze problems only problems on large file transfers over USB. I have spotlight completely disabled. Maybe u can try legacy kernel from nawcom.

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  • 1 month later...
I've never been able to run a vanilla kernel. That's odd.

 

Edit:

I stand corrected. For the first time ever I just tried booting a vanilla 10.6.6 kernel and it worked. The last time I had Mac OS X installed, as far as kernel 10.6.4, I could not boot with the vanilla kernel. I'm surprised it worked.

 

 

So what kernel extensions do you use?

 

My motherboard has an onboard Marvell 88E1116 NIC.

 

So the extensions I currently have installed are:

 

/Extra/Extensions:

AnyAppleUSBKeyboard

AnyAppleUSBMouse

AppleNForceATA

Disabler

OpenHaltRestart

fakesmc.V2.5

 

/System/Library/Extensions:

ALC885.kext

AppleHDA.kext (10.6.2)

nForceLAN.0.64.5

 

I think that's about it.

 

Edit:

Updated extensions I use.

 

As for the kernel panic, you should have in /Extra/Extensions/:

 

EITHER fakesmc.kext (v1 or v2) and NullCPUPowerManagement.kext (preferred option)

 

OR netkas' Snow Leopard dsmos.kext and Kabyl's Leopard Disabler.kext (only if preferred option results in kernel panics)

 

NOT both or a mix of both...........

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@verdant i was just reading old threads and found this:

 

 

so this is our To Do to get sleep working

 

Im open for IDEAS :(

 

 

To fix sleep you first have to understand what the OSPM does. Let's start by adding a handy list (for everyone with PC insomnia):

 

1) OSPM decides (through a policy scheme) to place the system into a sleeping state.

2) _TTS(Sx) is run, where Sx is the desired sleep state to enter.

3) OSPM notifies all native device drivers of the sleep state transition.

4) _PTS is run.

5) OSPM readies system for the sleep state transition.

6) _GTS is run.

7) OSPM writes the sleep vector and the system enters the specified Sx sleep state.

8) System Wakes up.

9) _BFS is run.

10) OSPM readies system for the return from the sleep state transition.

11) _WAK is run.

12) OSPM notifies all native device drivers of the return from the sleep state transition.

13) _TTS(0) is run to indicate the return to the S0 state.

 

Now note the red parts here because I can assure you that the problem is right there. You only have to find it. Which should be easy – with my latest DSDT – because I already did the dirty work :)

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  • 2 months later...
@verdant i was just reading old threads and found this:

 

 

so this is our To Do to get sleep working

 

Im open for IDEAS :)

 

 

Hi iLeopod,

 

Regarding this post, I have asked MaLd0n and also want to ask you if I can make as much reference as necessary to your IM DSDT topics and posts in my nForce Lion Install Guide section on DSDT modding of nForce MOBOs......?

 

Cheers

verdant

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I have NVIDIA nForce 650i SLI+430i chipset, my board is MSI P6N SLI V2

 

I am trying to get sleep to work on Lion

 

I don't understand what Store and Return "Package" means in the intel disassembled syntax

 

Is there some tutorial about DSDT?

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Hi,

 

I have a n680i mobo (Dell XPS720), so I am much interested by your thread!!!

I am completely knew to DSDT patching, so I am currently documenting myself.

Question: would it be possible to integrate your work with DSDT Patcher?

 

I am running SL10.6.8 in 64 bits, as per Verdant's guide, in preparation for Lion install.

Since my "update", no more LAN (onboard chip was working well with BCM5722Dkext), no more USB mass storage, no more firewire working...

So, appart to have my CPU correctly identified and the 64 bits enabled, I am kinda stuck with my system...

 

I use Chameleon bootlaoder on CD, wich I created with BootCDMaker in order to use the Lion_support_filev1 from Verdant...

 

I think that I need to patch my DSDT in order fix all these issues... need to learn how anyway but I think that your job will greatly help me!

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hi all.

 

First i don't use my nForce Board anymore. (because of the random lockups on the 680i).

 

The DSDT can enable Speedsteeping, Firewire, Audio Injection, Ethernet Built-in, Remove USB and other warnings.

 

But it seems like DSDT is not the way to sleep for our Motherboard. I would say because of the non native ahci chipset.

 

About PCI CONFIG BUG

 

Try to remove Name (_BBN, Zero) at PCI0

 

 

and adding :

 

Method (_BBN, 0, NotSerialized)

{

Return (SECB)

}

 

Method (_STA, 0, NotSerialized)

{

Return (0x0F)

}

on the PCI Bridges.

© http://www.projectosx.com/forum/index.php?...ost&p=15233

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