AnVAL (ACPI Loader)

[valv]

@00Diabolic, @JBraddock,

am really honored with your thoughts about this humble effort.

btw, I couldn't get a more valuable donation than the time u 've been all offering. Plus, I earned a treasure: your friendliness. Thank u all.

even tough, donations would motivate the lazy old monkey

[mitch_de]

Beta4B break shutdown ?

Hi val , i "see" that my shutdown seems to stopped working (system hangs at last shutdown steps). Sleep works (as before).

I use FixFSB=No . Can it be that FixShutdown needs FixFSB= Yes ? ( i guess not).

Are there code changes in this area (shutdown) since Version 3C ? The boot info says "Restart Fix done" (or similar)

Only 1-2 of 10 shutdowns work (so i posted that all works ). OpenHaltRestart ( i removed) works more sure (9.9 of 10)

[rednous]

mitch_de, strange that your shut down is corrupted. mine is OK with beta4b. would you like to post my DSDT to investigate?

 

EDIT: I've tested the shut down right now with both FixFSB=Yes & FixFSB=No and the system shuts down correcly.

 

I'm attaching my current DSDT for reference: (yep, too much editions and corrections for a year, but it could be useful. I used the Gigabyte DSDT Patches and DSDT with EP45-DS3 threads by iSoprano and Blackosx to built my DSDT.

 

[mitch_de]

mitch_de, strange that your shutdown is corrupted. mine is OK with beta4b. would you like to post my DSDT to investigate?

Which part is the dsdt part of shutdown problems ? I cant remember it - to much dsdt changes in last 12 months.

[rednous]

mitch, unfortunately i dont know (remember) which is the part responsible for the shut down in the DSDT, but the above attached (mine current) could be use to you or any one else

[valv]

Can it be that FixShutdown needs FixFSB= Yes ? ( i guess not).

Are there code changes in this area (shutdown) since Version 3C ? The boot info says "Restart Fix done" (or similar)

Only 1-2 of 10 shutdowns work (so i posted that all works ). OpenHaltRestart ( i removed) works more sure (9.9 of 10)

This is really strange. To answer your first question, no nothing where edited in that manner. Also I think u meant RestartFix, wasn't u?

When u power-off your machine, do u use the power button or the shutdown item from menu (Soft-off)?

[danielkza]

I never said Valv was overclocking through the bootloader it just does not calculate my cpu clock correctly with the new FixFSB flag used. The only way to actually OC in OSX is through the FSB unless you have a CPU with a unlockable multiplier (AKA busratio). Very few CPUS have a unlocked multiplier and in your real bios the only option you are given is the ability to push the FSB value higher. Even with a unlocked multiplier this option would not be available (or would not work) in OSX only in your real bios. The FSB overclock in theory based on how OSX works should be able to be pushed up by telling OSX it has a faster FSB then it does. I would imagine this would be much less stable then doing it in your real bios though. My system is a laptop and it has no options to OC at all and I dont really care about OCing. I just want the full speed my system has available to it since my Bios incorrectly passes my FSB as 736 I get crippled speed through out my system in OSX.

 

I'm not the only one with this problem, though I am the only one with an Intel system that has it. Lots of AMD users report the same issue.

OSX wouldn't be able to set the running FSB without resorting to some trickery, like talking directly to the clock generating chip, which most likely would cause much more trouble than benefit (that's exactly how SetFSB works on Windows, you can Google it if you want to know more). Getting OSX to detect the actual clocks is fundamental for all it's timings to work right, and all you'd get from faking them would be faulty programs.

 

BTW, I tried Beta4B, and it seems to report the FSB properly, but only if I don't overclock my E7300: it will always show 1066 with FixBSB=Yes, no matter what I do. With FixFSB=No, I get much closer to the actual values: 3.71GHz when I'm running at 3.8GHz, with the FSB off by 40MHz for either 1520Mhz (shows 1480Mhz) or 1600MHz (shows 1560Mhz). Is this the expected behavior?

[valv]

OSX doesn't attempt (and probably wouldn't be able to) tell the CPU what parameters to use: that's a job for the BIOS, and as in Windows, the only way to set your FSB by software is issuing special control codes for your specific clock control chip (Google for SetFSB). The problem we need to solve is how to acurately inform OSX of the running frequencies that it depends on for proper timing.

 

BTW, I tried Beta4B, and it seems to report the FSB properly, but only if I don't overclock my E7300: it will always show 1066 with FixBSB=Yes, no matter what I do. With FixFSB=No, I get much closer to the actual values: 3.71GHz when I'm running at 3.8GHz, with the FSB off by 40MHz for either 1520Mhz (shows 1480Mhz) or 1600MHz (shows 1560Mhz). Is this the expected behavior?

Even though you 're right about fixfsb (also a grub mod exists with the same name for your info), I do not agree with u. Sure OSX and any OS tells the cpu what parameters to use (It is the way speed-step actually works) threw ACPI. googling for OSPM should give u some directions, but it 'd be better to look at the ACPI Specs.

(Issuing special control codes) wmsr is not even used here. In fact all what is done, is reading from those. That is, the suggested FixFSB is for people not getting the right infos when dumping from the usual msrs. Thus it was fine to dump the correct values from alternative msrs. The point is those ones do only reflect stock values. That's why even when u edit your bios, only stock values are shown. It is more about giving choices for people to get their right values dumped, and passed to the OS.

[danielkza]

Even though you 're right about fixfsb (also a grub mod exists with the same name for your info), I do not agree with u. Sure OSX and any OS tells the cpu what parameters to use (It is the way speed-step actually works) threw ACPI. googling for OSPM should give u some directions, but it 'd be better to look at the ACPI Specs.

(Issuing special control codes) wmsr is not even used here. In fact all what is done, is reading from those. That is, the suggested FixFSB is for people not getting the right infos when dumping from the usual msrs. Thus it was fine to dump the correct values from alternative msrs. The point is those ones do only reflect stock values. That's why even when u edit your bios, only stock values are shown. It is more about giving choices for people to get their right values dumped, and passed to the OS.

I indeed forgot about SpeedStep. But if you stop and think about it, it isn't very helpful for overclocking: you still can't go over the factory-locked multiplier no matter what you set in the DSDT. You can't change the FSB with it either, so in the end the best you can get is underclocking. I'll edit my post so it looks less confuse.

 

And thanks for the clarification on FixFSB. Is there any way to get 'proper' FSB detection, like in Windows, that works for overclocking as well? Or are the MSRs register the only way to go? I might be able to help with the code a little, but I know only average C/++ and have no experience whatsoever in such low-level works.

[valv]

I indeed forgot about SpeedStep. But if you stop and think about it, it isn't very helpful for overclocking: you still can't go over the factory-locked multiplier no matter what you set in the DSDT. You can't change the FSB with it either, so in the end the best you can get is underclocking. I'll edit my post so it looks less confuse.

 

And thanks for the clarification on FixFSB. Is there any way to get 'proper' FSB detection, like in Windows, that works for overclocking as well? Or are the MSRs register the only way to go? I might be able to help with the code a little, but I know only average C/++ and have no experience whatsoever in such low-level works.

Intially the deal wasn't about to overclock, but to get more or less accurate values for those that couldn't get 'em when relying on the old algo. Thus it could be part of a future todo list. On the actual code, neither dsdt is used (for the respective FixFSB & busratio parts) for the reason u 've taken care to mention. I don't know what windows uses other than msrs. The point is which ones, and which logic sits behind 'em (as of relying on tsc; that one doesn't seem to be the most accurate one in my humble thinking).

btw, I 'd be glad to know which parts on the code u 'd be wanting to fine-tune. latest code would be committed asap.

Edit: Regarding acpi, I think accurate values could be dumped from there also. One advantage, is the fact that the oemssdt (so to say) does reflect any Bios changes. Also the fbsd folks rely on this one to get their values correctly dumped. This probably would get proper FSB detection to everybody (oc 'ers included).

Greetz

[danielkza]

Intially the deal wasn't about to overclock, but to get more or less accurate values for those that couldn't get 'em when relying on the old algo. Thus it could be part of a future todo list. On the actual code, neither dsdt is used (for the respective FixFSB & busratio parts) for the reason u 've taken care to mention. I don't know what windows uses other than msrs. The point is which ones, and which logic sits behind 'em (as of relying on tsc; that one doesn't seem to be the most accurate one in my humble thinking).

btw, I 'd be glad to know which parts on the code u 'd be wanting to fine-tune. latest code would be committed asap.

I assume an algo. that works for overclocked CPUs would work for everything else: it would detect the actual FSB, so most issues would be solved. I'll try to dig out as much info as I can on the subject. I'd be nice if we could have the code for something like CPU-Z

 

I'll check out Chameleon's source so I can start to learn a bit about the code, and if you want me to take a look at anything please tell me so I can at least give it a shot.

[valv]

I assume an algo. that works for overclocked CPUs would work for everything else: it would detect the actual FSB, so most issues would be solved. I'll try to dig out as much info as I can on the subject. I'd be nice if we could have the code for something like CPU-Z

 

I'll check out Chameleon's source so I can start to learn a bit about the code, and if you want me to take a look at anything please tell me so I can at least give it a shot.

yeah, there is too much over the net, and just to list 'em here would not be an easy affaire for someone like me. but I think looking at fbsd's kernel code would be a good start. bear in mind that we need to honor APSL.

Thus GPL may be incompatible. sorry

[danielkza]

yeah, there is too much over the net, and just to list 'em here would not be an easy affaire for someone like me. but I think looking at fbsd's kernel code would be a good start. bear in mind that we need to honor APSL.

Thus GPL may be incompatible. sorry

That got me thinking: we could try to use some code from e.g. FreeBSD. No licensing issues for it.

[00diabolic]

Valv I was just thinking. I got this kext from someone on IM that said it helps with FSB detection by allowing you to specify your own FSB value. Its apparently part of EFI Smbios code. Anyway take a look at it and see if maybe you can use it or get an idea from it. However whatever code is in here it does not work for me or its not compatible with the vanilla kernel I never figured out which it was.

 

Hope it helps...

CPUMhzFix.kext_FSB_Fix_Does_not_work.zip

[mitch_de]

This is really strange. To answer your first question, no nothing where edited in that manner. Also I think u meant RestartFix, wasn't u?

When u power-off your machine, do u use the power button or the shutdown item from menu (Soft-off)?

 

Hi, i use the Menue : Shutdown....

 

I am unsure, but i got , even using Beta4B, shutdown working (2 times) if i used sleep(+wakeup) at least once before shutdown.

[gimox]

which version are u using?

good joke if it is one, but it seems like u merged your sysctl dump from E7500 and edited the brand_string with the one from N280

I thought N280 should have cpu model 28. Isn't ? If am wrong, correct me!

It seems you 're using this model

image source is here

confirmed here

 

 

i copy paste the info in terminal. I have not read the cpu model first....mmm you are right the my cpu model must be 28 but it isn't.

I think the "problem" is the patched kernel by tea. If you remember, the atom processor are banned in SL from 10.6.2 and we need a patched kernel that send a different model "core 2 solo" to prevent KP.

So my processor is atom but recognized as 23 for prevent kp.....i think....

 

I have many problem with this. My objective is a speedstep vanilla. i try the nbi merklor project but now i passed to your bootloader because it has many new feature and it work very good in my machine, i think the problem for speedstepping is in the not recognized bus i have the same problem with chameleon rc4 and nbi.

 

it's not a joke but a problem

 

 

now i edit my smbios.plist and add this command

 

smexternalclock 166

smcputype 257

remember the n280 has 667 bus

 

and this is the result.

(it's speedstepping with voodoopower)

 

hw.busfrequency = 664000000
hw.cpufrequency = 1500000003
hw.tbfrequency = 1000000000
hw.busfrequency: 664000000
hw.busfrequency_min: 664000000
hw.busfrequency_max: 666666668
hw.cpufrequency: 1500000003
hw.cpufrequency_min: 1000000002
hw.cpufrequency_max: 1666666670
hw.tbfrequency: 1000000000
netbook:~ gimox$ sysctl -a | grep cpu
hw.ncpu = 2
hw.cpufrequency = 1000000002
hw.availcpu = 2
hw.ncpu: 2
hw.activecpu: 2
hw.physicalcpu: 1
hw.physicalcpu_max: 1
hw.logicalcpu: 2
hw.logicalcpu_max: 2
hw.cputype: 7
hw.cpusubtype: 4
hw.cpu64bit_capable: 0
hw.cpufamily: 1114597871
hw.cpufrequency: 1166666669
hw.cpufrequency_min: 1000000002
hw.cpufrequency_max: 1666666670
hw.cputhreadtype: 1
machdep.cpu.max_basic: 10
machdep.cpu.max_ext: 2147483656
machdep.cpu.vendor: GenuineIntel
machdep.cpu.brand_string: Intel(R) Atom(TM) CPU N280   @ 1.66GHz
machdep.cpu.family: 6
machdep.cpu.model: 23
machdep.cpu.extmodel: 1
machdep.cpu.extfamily: 0
machdep.cpu.stepping: 2
machdep.cpu.feature_bits: 3219782655 4244373
machdep.cpu.extfeature_bits: 1048576 1
machdep.cpu.signature: 67266
machdep.cpu.brand: 0
machdep.cpu.features:  FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM SSE3 DSCPL EST TM2 SSSE3 TPR PDCM
machdep.cpu.extfeatures:  XD LAHF
machdep.cpu.logical_per_package: 2
machdep.cpu.cores_per_package: 1
machdep.cpu.microcode_version: 525
machdep.cpu.mwait.linesize_min: 0
machdep.cpu.mwait.linesize_max: 0
machdep.cpu.mwait.extensions: 0
machdep.cpu.mwait.sub_Cstates: 131616
machdep.cpu.thermal.sensor: 1
machdep.cpu.thermal.dynamic_acceleration: 0
machdep.cpu.thermal.invariant_APIC_timer: 0
machdep.cpu.thermal.thresholds: 2
machdep.cpu.thermal.ACNT_MCNT: 1
machdep.cpu.arch_perf.version: 3
machdep.cpu.arch_perf.number: 2
machdep.cpu.arch_perf.width: 40
machdep.cpu.arch_perf.events_number: 7
machdep.cpu.arch_perf.events: 0
machdep.cpu.arch_perf.fixed_number: 1
machdep.cpu.arch_perf.fixed_width: 40
machdep.cpu.cache.linesize: 64
machdep.cpu.cache.L2_associativity: 8
machdep.cpu.cache.size: 512
machdep.cpu.tlb.inst.small: 32
machdep.cpu.tlb.data.small: 16
machdep.cpu.tlb.data.small_level1: 2028621756
machdep.cpu.tlb.data.large_level1: 64
machdep.cpu.address_bits.physical: 32
machdep.cpu.address_bits.virtual: 32
machdep.cpu.core_count: 1
machdep.cpu.thread_count: 2

schermo.tiff

[kizwan]

i copy paste the info in terminal. I have not read the cpu model first....mmm you are right the my cpu model must be 28 but it isn't.

I think the "problem" is the patched kernel by tea. If you remember, the atom processor are banned in SL from 10.6.2 and we need a patched kernel that send a different model "core 2 solo" to prevent KP.

So my processor is atom but recognized as 23 for prevent kp.....i think....

 

I have many problem with this. My objective is a speedstep vanilla. i try the nbi merklor project but now i passed to your bootloader because it has many new feature and it work very good in my machine, i think the problem for speedstepping is in the not recognized bus i have the same problem with chameleon rc4 and nbi.

 

it's not a joke but a problem

This solved the mystery. I'll take your word for it. For the record, I never doubt you.

[valv]

Valv I was just thinking. I got this kext from someone on IM that said it helps with FSB detection by allowing you to specify your own FSB value. Its apparently part of EFI Smbios code. Anyway take a look at it and see if maybe you can use it or get an idea from it. However whatever code is in here it does not work for me or its not compatible with the vanilla kernel I never figured out which it was.

 

Hope it helps...

No src, no joy. ask riws if he could give you the code (what I doubt). thank u anyway. specifying own FSB value is not a big hassle to implement. The question here is if we should go in this direction. Would be useful? I don't think so, since we 're all getting right values (except oc').

Future migration to ACPI based detection should make a more accurate detection to everybody, and even oc 'ed configs.

 

Hi, i use the Menue : Shutdown....

 

I am unsure, but i got , even using Beta4B, shutdown working (2 times) if i used sleep(+wakeup) at least once before shutdown.

Looking further at the ACPI Specs, I found this out:

"ACPI supports up to two general-purpose register blocks as described in the FADT (see section 5, “ACPI Software Programming Model”) and an arbitrary number of additional GPE blocks described as devices within the ACPI namespace. Each register block contains two registers: an enable and a status register. Each register block is 32-bit aligned. Each register in the block is accessed as a byte. It is up to the specific design to determine if these bits retain their context across sleeping or soft-off states. If they lose their context across a sleeping or soft-off state, then BIOS resets the respective enable bit prior to passing control to the OS upon waking."

I 'd suggest u dump your FADT (if not done already) and patch it according to this post

 

i copy paste the info in terminal. I have not read the cpu model first....mmm you are right the my cpu model must be 28 but it isn't.

I think the "problem" is the patched kernel by tea. If you remember, the atom processor are banned in SL from 10.6.2 and we need a patched kernel that send a different model "core 2 solo" to prevent KP.

So my processor is atom but recognized as 23 for prevent kp.....i think....

This explains it all, dumb me. Faking the cpu model could be done from bootloader, but I don't know if it 'd work w/o a legacy kernel (probably more stuff where made there). Am gonna research a little.

Greetz

[gimox]

No src, no joy. ask riws if he could give you the code (what I doubt). thank u anyway. specifying own FSB value is not a big hassle to implement. The question here is if we should go in this direction. Would be useful? I don't think so, since we 're all getting right values (except oc').

Future migration to ACPI based detection should make a more accurate detection to everybody, and even oc 'ed configs.

 

Looking further at the ACPI Specs, I found this out:

"ACPI supports up to two general-purpose register blocks as described in the FADT (see section 5, “ACPI Software Programming Model”) and an arbitrary number of additional GPE blocks described as devices within the ACPI namespace. Each register block contains two registers: an enable and a status register. Each register block is 32-bit aligned. Each register in the block is accessed as a byte. It is up to the specific design to determine if these bits retain their context across sleeping or soft-off states. If they lose their context across a sleeping or soft-off state, then BIOS resets the respective enable bit prior to passing control to the OS upon waking."

I 'd suggest u dump your FADT (if not done already) and patch it according to this post

 

This explains it all, dumb me. Faking the cpu model could be done from bootloader, but I don't know if it 'd work w/o a legacy kernel (probably more stuff where made there). Am gonna research a little.

Greetz

 

 

 

i think it can't by done by bootloader, merklort has a chameleon trunk that patch the kernel with the different cpumodel if the model is not compatible with SL (only ATOM ). i prefer use a bootloader that not patch the kernel evrythink somthink change because somthink is good and somthink crash.

fake a cpu model in bootloader can resolve evrythink and can be a solution for evryone has a netbook but i think is not possible.

 

So if is not 100% stable i prefere add a patched kernel.

 

But the problem is because i can not change FSB and ratio in com.apple.boot.plist ???

[00diabolic]

No src, no joy. ask riws if he could give you the code (what I doubt). thank u anyway. specifying own FSB value is not a big hassle to implement. The question here is if we should go in this direction. Would be useful? I don't think so, since we 're all getting right values (except oc').

Future migration to ACPI based detection should make a more accurate detection to everybody, and even oc 'ed configs.

 

Valv if FSB value is not a big hassle to implement I am shocked you have not already done this.

 

Please take a vote on this I would bet anyone even if they dont have FSB issues would not mind this being implemented.

 

This would be a HUGE help to anyone with detection problems. Can you please try to do this? No bootloader has done it and if you can youl be the first to add this important feature.

[valv]

No bootloader has done it and if you can youl be the first to add this important feature.

Probably not the first, as D.F.E already implemented this feature few years ago. Also GRUB has one (setfsb mod). U know, it wouldn't give much progress (especially in your case) because a different FSB value (200Mhz) is already being injected whichever solution u use (with or without FixFSB, as u 've been suggesting )

[00diabolic]

Probably not the first, as D.F.E already implemented this feature few years ago. Also GRUB has one (setfsb mod). U know, it wouldn't give much progress (especially in your case) because a different FSB value (200Mhz) is already being injected whichever solution u use (with or without FixFSB, as u 've been suggesting )

 

Your talking about smbios.plist right? Well as for the FSB injection I have proven that is only superficial and others in this same thread have also.

 

I dont want to use GRUB because I dont use Linux and DFE does not work for me I tried it and it broke everything. Plus I really like a Darwin/chameleon based bootloader as I understand it so well and it works great for everything else.

Can you look into a set FSB key for your bootloader?

 

:-)

[kup]

Is the FSB section of AsereBLN's work not public? I know his Memory detection isn't but I'm not sure about the bus detection?

[smitty244]

I'm not sure if this is what you are looking for, but if you are using an i3/i5 CPU with a 6xx or lower model # you can try fixing it by doing a quick patch yourself in the source code - if you find where it says:

 

/* Nehalem CPU model */
		if (p->CPU.Family == 0x06 && (p->CPU.Model == 0x1a || p->CPU.Model == 0x1e)) {

 

And add in your own CPU Model # you might be able to fix the auto FSB detection. So you would change the above to

 

/* Nehalem CPU model */
		 if (p->CPU.Family == 0x06 && (p->CPU.Model ==  0x1a || p->CPU.Model == 0x1e || p->CPU.Model == 0x25)) {

for any Core i3/ i5 (up to 6xx series)/i7 (up to 6xx series mobile)

 

Or change it to

 

/* Nehalem CPU model */
		  if (p->CPU.Family == 0x06 && (p->CPU.Model ==  0x1a || p->CPU.Model == 0x1e || p->CPU.Model == 0x2c)) {

for the Core i7 980X

 

Build the source and replace your boot file. That fixed the issues on my i3 build and should on most others, as the default value just has support for the i5 750 and the i7 8xx and 9xx to i7 975 series. After you make the change you can also change FSB values in the BIOS and they will be correctly detected.

 

If you want, I have attached my boot files with the patch applied for both i3/i5/i7 and i7 980X. If this helps out a lot of people hopefully the developer can integrate it into the next version.

boot_i3_i5_i7_Debug.zip

boot_i7_980x_Debug.zip

boot_i3_i5_i7.zip

boot_i7_980x.zip

[valv]

@smitty244,

 

First off, thanks. Those you 're talking about are already implemented in AnVAL. Give it a try and see for your self.

thank u anyway.