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GA-EX58 and GA-X58A DSDT native power management modifications

d00d

By d00d,
in Power Management

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aikidoka25
aikidoka25
Posted
Posted

i just realized my unit doesn't have the following entry

To confirm, use ioreg to look at IOService:/AppleACPIPlatformExpert/CPU0@0/AppleACPICPU/ACPI_SMC_PlatformPlugin.
You will see CPUPLimit with a value of 0x0, a different value if it's not activated, or not there at all if not enabled.

 

but it has native pm as indicated below 

Oct 17 11:50:37 localhost kernel[0]: IOAPIC: Version 0x20 Vectors 64:87
Oct 17 11:50:37 localhost kernel[0]: ACPI: System State [S0 S3 S4 S5] (S3)
Oct 17 11:50:37 localhost kernel[0]: AppleIntelCPUPowerManagement: Turbo Ratios 1112
Oct 17 11:50:37 localhost kernel[0]: AppleIntelCPUPowerManagement: initialization complete
Oct 17 11:50:37 localhost kernel[0]: RTC: Only single RAM bank (128 bytes)
Oct 17 11:50:37 localhost kernel[0]: mbinit: done (96 MB memory set for mbuf pool)

 

where should i check? i don't understand about the vid part, should i change something at bios level?

is the boot loader important? i think i am still using PC EFI 10.6.

please give some pointers.

 

EDIT:

second question: i am using ATI HD4870 but didn't see any AGPM entries in the kernel log (we have a good success with mini311 using that injector), should i use the injector developed by master chief here?

 

TIA!

 

kernel 64bit 10.6.4

Darwin GigaMacPro.local 10.4.0 Darwin Kernel Version 10.4.0: Fri Apr 23 18:27:12 PDT 2010; root:xnu-1504.7.4~1/RELEASE_X86_64 x86_64

 

the unit is set as macpro4,1

<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>SMbiosversion</key>
<string>MP31.88Z.00C1.B00.0802091544</string>
<key>SMmanufacter</key>
<string>Apple Inc.</string>
<key>SMmemmanufacter</key>
<string>Corsair XMS3</string>
<key>SMmempart</key>
<string>TR3X661600C9</string>
<key>SMmemserial_1</key>
<string>000123-01234567-0</string>
<key>SMmemserial_2</key>
<string>EMPTY</string>
<key>SMmemserial_3</key>
<string>000123-01234567-1</string>
<key>SMmemserial_4</key>
<string>EMPTY</string>
<key>SMmemserial_5</key>
<string>000123-01234567-2</string>
<key>SMmemserial_6</key>
<string>EMPTY</string>
<key>SMmemspeed</key>
<string>1333</string>
<key>SMmemtype</key>
<string>24</string>
<key>SMproductname</key>
<string>MacPro4,1</string>
<key>SMserial</key>
<string>SECRETNUMBER</string>
<key>SMsystemversion</key>
<string>1.0</string>
</dict>
</plist>

 

boot.plist

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
<key>GraphicsEnabler</key>
<string>Yes</string>
<key>EthernetEnabler</key>
<string>Yes</string>
<key>Kernel</key>
<string>mach_kernel</string>
<key>Kernel Flags</key>
<string></string>
<key>Timeout</key>
<string>2</string>
<key>Default Partition</key>
<string>hd(1,2)</string>
<key>Wake</key>
<string>Yes</string>
<key>Theme</key>
<string>Choose_Your_OS</string>
<key>DropSSDT</key>
<string>yes</string>
</dict>
</plist>

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aschar1
aschar1
Posted
Posted
Thanks, before the CPU heatsink and Northbridge temps were inverted? With the last build could you check if you're in 32 or 64 bits please?

 

PS: Do you know what auxiliary value stand for?

 

look at the source it87x.cpp processor=heatsink, system=Northbridge and auxiliary=Ambient

 

works here with 64bit and 32bit

 

i changed the sensores in info.plist of plugin it87x.kext

 

This version is fully configurable -slice didnt have the chance to change Mozodojos source -what he did before with the assembla version.

 

source here: http://github.com/Mozodojo/FakeSMC

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The Real Deal
The Real Deal
Posted
Posted

Fellas,

 

I am currently switching from BIOS F12/AsereBLN to F13m/C2RC5 (mozodojo with C-States ability) and i meet some problems.

 

 

Before and after the switch, i have managed to get these elements (relative to power/speedstep management):

 

 

Hardware still identified as Macpro4,1

 

Same loaded kexts: AppleIntelCPUPowerManagement, AppleIntelCPUPowerManagementClient, AppleLPC, AppleHPET

 

 

Before: modified DSDT for P-States / After: untouched DSDT (CPU scope)

 

 

Message in .log before (courtesy of d00d's post):

 

kernel[0]: AppleIntelCPUPowerManagementClient: ready
kernel[0]: AppleIntelCPUPowerManagement: Turbo Ratios 1112
kernel[0]: AppleIntelCPUPowerManagement: initialization complete

 

 

 

 

Message in .log after (here it is the first problem):

 

Oct 25 17:36:48 localhost kernel[0]: AppleIntelCPUPowerManagementClient: ready
Oct 25 17:37:02 Mac-Pro-de-Nicolas kernel[0]: ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized
Oct 25 17:37:02 Mac-Pro-de-Nicolas kernel[0]: vmmon: Registering for power state changes
Oct 25 17:39:19 localhost kernel[0]: AppleIntelCPUPowerManagement: initialization complete

 

 

 

Before and after: speedstep is functionnal (mark-i report => x21 to x12 in idle) (kinda weird maybe considering the kernel.log message above); one and only difference i have to enable C3,... state in the BIOS now, but it's not a big deal and i still don't use the DVID feature FYI. The cores temperatures/geekbench score is quite similars.

 

But, the behavior when it's time to overclock is quite different; it seems it couldn't be handled despite the same BIOS settings. The major issue is my CPU with approx 20 degres hotter than before :thumbsup_anim:

 

 

Is anyone could have some leads to follow, any suggestions? Do you think the loader could be the guilty? :(

 

Other than, these two points, everything rolls. :)

 

 

 

PS: FYI, with this last BIOS, there is no need from now on to unplugged my bluetooth dongle to boot.

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cartri
cartri
Posted
Posted
Fellas,

 

I am currently switching from BIOS F12/AsereBLN to F13m/C2RC5 (mozodojo with C-States ability) and i meet some problems.

 

 

Before and after the switch, i have managed to get these elements (relative to power/speedstep management):

 

 

Hardware still identified as Macpro4,1

 

Same loaded kexts: AppleIntelCPUPowerManagement, AppleIntelCPUPowerManagementClient, AppleLPC, AppleHPET

 

 

Before: modified DSDT for P-States / After: untouched DSDT (CPU scope)

 

 

Message in .log before (courtesy of d00d's post):

 

kernel[0]: AppleIntelCPUPowerManagementClient: ready
kernel[0]: AppleIntelCPUPowerManagement: Turbo Ratios 1112
kernel[0]: AppleIntelCPUPowerManagement: initialization complete

 

 

 

 

Message in .log after (here it is the first problem):

 

Oct 25 17:36:48 localhost kernel[0]: AppleIntelCPUPowerManagementClient: ready
Oct 25 17:37:02 Mac-Pro-de-Nicolas kernel[0]: ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized
Oct 25 17:37:02 Mac-Pro-de-Nicolas kernel[0]: vmmon: Registering for power state changes
Oct 25 17:39:19 localhost kernel[0]: AppleIntelCPUPowerManagement: initialization complete

 

 

 

Before and after: speedstep is functionnal (mark-i report => x21 to x12 in idle) (kinda weird maybe considering the kernel.log message above); one and only difference i have to enable C3,... state in the BIOS now, but it's not a big deal and i still don't use the DVID feature FYI. The cores temperatures/geekbench score is quite similars.

 

But, the behavior when it's time to overclock is quite different; it seems it couldn't be handled despite the same BIOS settings. The major issue is my CPU with approx 20 degres hotter than before :thumbsup_anim:

 

 

Is anyone could have some leads to follow, any suggestions? Do you think the loader could be the guilty? :(

 

Other than, these two points, everything rolls. :)

 

 

 

PS: FYI, with this last BIOS, there is no need from now on to unplugged my bluetooth dongle to boot.

Sorry again for entering in the middle of a conversation, but about your acpi platform smc lpc driver is caused by the ich10R lpc being a different dev-id if ich10 (3a18 vs 3a16). The changes trough DSM will let you with things working, but same error. If you check your ioreg you will notice something like this to lpc:

 

| | | "IOPersonalityPublisher" = "ICH10R.driver.AppleLPC"

in opposition to

| | | "IOPersonalityPublisher" = "com.apple.driver.AppleLPC"

given by original ich10 (no R).

 

note that newer versions of OSX (10.6.5) are omitting the publisher personality. The possible fix is to hex edit the main module with the 3a18 instead of 3a16 on this device (and correct checksums before reinserting).

This may lead windows to reinstall ich10 lpc devices, but its a one time problem.

 

PS: They created a lmod 15 for usb in their acpi and the references to it in the rest of the modules, so we dont need to wrta every usb port.

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cartri
cartri
Posted
Posted

I was meaning only the lpc interfice device id, not the whole ich 10 ids...

 

I was meaning only the lpc interfice device id, not the whole ich 10 ids...

 

see your 1F root IOName (PX40 by your photo), it should match the lpc interface - as it is the lpc interface

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audio01
audio01
Posted
Posted

Hi,

 

What about changing the PCI Root address to 0 in the DSDT instead of using this key in com.apple.Boot.plist:

 

<key>PciRoot</key>

<string>1</string>

 

Something like:

 

		Device (PCI0)
	{
		Name (_UID, Zero)
...

 

So we make the PCI Root = 0 instead of 1 that Chameleon (and derivates) can't detect.

 

It seems to work ok and no side effects. All my devices are correctly detected inside de PCI0@0 tree.

 

Any word about this?

 

Cheers!

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d00d
d00d
Posted
  • Author
Posted
I was meaning only the lpc interfice device id, not the whole ich 10 ids...

 

 

 

see your 1F root IOName (PX40 by your photo), it should match the lpc interface - as it is the lpc interface

Read post 1, item 21.

 

Hi,

 

What about changing the PCI Root address to 0 in the DSDT instead of using this key in com.apple.Boot.plist:

 

<key>PciRoot</key>

<string>1</string>

 

Something like:

 

		Device (PCI0)
	 {
		 Name (_UID, Zero)
...

 

So we make the PCI Root = 0 instead of 1 that Chameleon (and derivates) can't detect.

 

It seems to work ok and no side effects. All my devices are correctly detected inside de PCI0@0 tree.

 

Any word about this?

 

Cheers!

That's not true; ABLN1.1.x, Chameleon-Mozodojo, and C2RC5 all detect PciRoot.
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audio01
audio01
Posted
Posted
Read post 1, item 21.

 

That's not true; ABLN1.1.x, Chameleon-Mozodojo, and C2RC5 all detect PciRoot.

 

Oh, ok. I was thinking about Voodoo's released "official" RC4. So it seems that the parts of the guide at 1º post where adds the "PCIRoot=1" are obsolete for the newer bootloaders.

 

Cheers!

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cartri
cartri
Posted
Posted
Read post 1, item 21.

 

Yeah, nice feature, but if you look at the 13h betas for the UD5/Extreme you will notice lacking 4 zeros in rsdt (which would be dynamically fulfilled by ssdt), i was thinking they would correct that by this time. Anyway, if the loader does that, its easier for the end user.

But good news is that they have added correct ppminit for cfgd 20 this time, so if the rsdt gets completely loaded as is, dynamic/automatic c-states should work for most cpus by the simple addition of space for the table getting loaded (zeros) at unbooted RSDT. I could not check newer versions, kind of stuck in 13h.

 

by the way, sorry for not sending you that message..

"meu caro amigo, eu bem queria lhe escrever, mas o correio andou arisco..."

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jhrfc
jhrfc
Posted
Posted
Fellas,

 

I am currently switching from BIOS F12/AsereBLN to F13m/C2RC5 (mozodojo with C-States ability) and i meet some problems.

 

Hi,

Out of interest what prompted you to do this? To stay up to date, simplify dsdt, or some other reason?

Just interested as, I'm using F12/Asere and as it works fine, so I'm loath to change.

Cheers

Jon

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The Real Deal
The Real Deal
Posted
Posted

For the reasons you mentioned above and to have some new features too. You should give it a try and do a fresh update; the hackintosh scene is quite active, so to be up to date as well. :P

 

I just have a trouble with my C-States to solve (no turbo ratio 1112, high temps under OC conditions).. as far as i know i have correctly patched my DSDT, filled my boot.plist

 

 

And i couldn't test if this BIOS is better than the F12 for overclocking. :yoji:

 

Other than that, everything else is fine.

 

 

EDIT: no RAM proper frequency detection with C2RC5 though, but i live with it.

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The Real Deal
The Real Deal
Posted
Posted 

00:1a.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4
00:1a.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5
00:1a.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6
00:1a.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2
00:1b.0 Audio device: Intel Corporation 82801JI (ICH10 Family) HD Audio Controller
00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 1
00:1c.1 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 2
00:1c.4 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 5
00:1c.5 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 6
00:1d.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1
00:1d.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2
00:1d.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3
00:1d.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90)
00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller

 

Please correct me if i am wrong, my LPC device is badly patched?

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cartri
cartri
Posted
Posted 
00:1a.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #4
00:1a.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #5
00:1a.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #6
00:1a.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #2
00:1b.0 Audio device: Intel Corporation 82801JI (ICH10 Family) HD Audio Controller
00:1c.0 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 1
00:1c.1 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 2
00:1c.4 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 5
00:1c.5 PCI bridge: Intel Corporation 82801JI (ICH10 Family) PCI Express Port 6
00:1d.0 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #1
00:1d.1 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #2
00:1d.2 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB UHCI Controller #3
00:1d.7 USB Controller: Intel Corporation 82801JI (ICH10 Family) USB2 EHCI Controller #1
00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90)
00:1f.0 ISA bridge: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller

 

Please correct me if i am wrong, my LPC device is badly patched?

That what i was talking, your px40 ioname must be the one of 10 and not 10R, dsming a interface was not enough.

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The Real Deal
The Real Deal
Posted
Posted
Mine is 10R and I have CStates, he needs to read post 1, item 21.

 

 

Do you mean:

 

21. (added 20100726) Add the following to com.apple.Boot.plist if you're using the C2RC5 (trunk revision 192 and newer) bootloader;

 

<key>GenerateCStates</key>

<string>yes</string>

 

 

It's the very first thing i have done ;)

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