DSDT fixes for Gigabyte boards

[relikwie]

UPDATE - 4 - ICH9 users, we need device Id injection for SMBus. My latest DSDT has this and also few more refinements as per Master Chief.

dsdt.aml_22_10_2009.zip

 

 

This DSDT works for me for all the above fixes, so please do be careful and make appropriate changes to your DSDT by comparison.

 

Hi iSoprano, is it save to use the bits from your posted aml file on my board? I have the revision 2.1 of the DS3P.

 

and do I understand correctly that with these fixes, I have to remove both nullcpu.. and sleepenabler?

and that when using this the apple kextst, temps become slightly higher and possible sleep issue?

if so, I wonder why all the effort if it introduces these drawbacks, or is this for the sake of "as vanilla as I can get it" battle.

 

thanks...

[iSoprano]

Hi iSoprano, is it save to use the bits from your posted aml file on my board? I have the revision 2.1 of the DS3P.

 

and do I understand correctly that with these fixes, I have to remove both nullcpu.. and sleepenabler?

and that when using this the apple kextst, temps become slightly higher and possible sleep issue?

if so, I wonder why all the effort if it introduces these drawbacks, or is this for the sake of "as vanilla as I can get it" battle.

 

thanks...

 

Yes, the objective is to get close to a real Mac. We don't need nullcpu and sleepenabler. For me sleep works fine, except autosleep (i'm using pleasesleep until this is fixed) Also I'm able to have vanilla speedstepping with AppleIntelCPUPowerManagement kext loaded and temps are around 35C - 42C

 

since my board is an ICH9, sometimes I need to do device injection for AppleLPC, SMBus, USB's. Even though I don't accept any responsibilty, you could give it a try with my dsdt but ONLY after commenting out this bit from the DSDT.

 

 

 Name (_PSS, Package (0x04)
       {
           Package (0x06)
           {
               0x0D5C, 
               0xFDE7, 
               0x0A, 
               0x0A, 
               0x0926, 
               Zero
           }, 

           Package (0x06)
           {
               0x0BE0, 
               0xFDE8, 
               0x0A, 
               0x0A, 
               0x0822, 
               One
           }, 

           Package (0x06)
           {
               0x0A64, 
               0xFDE7, 
               0x0A, 
               0x0A, 
               0x071D, 
               0x02
           }, 

           Package (0x06)
           {
               0x0A64, 
               0xFDE7, 
               0x0A, 
               0x0A, 
               0x071D, 
               0x03
           }
       })

 

This P-state value is calculated for my CPU.

[Master Chief]

There are two leftovers, forgotten after the LNKx parts have been removed, which can be found under Device (LPCB)

                OperationRegion (PIRQ, PCI_Config, 0x60, 0x04)
               Scope (\)
               {
                   Field (\_SB.PCI0.LPCB.PIRQ, ByteAcc, NoLock, Preserve)
                   {
                       PIRA,   8, 
                       PIRB,   8, 
                       PIRC,   8, 
                       PIRD,   8
                   }
               }

               OperationRegion (PIR2, PCI_Config, 0x68, 0x04)
               Scope (\)
               {
                   Field (\_SB.PCI0.LPCB.PIR2, ByteAcc, NoLock, Preserve)
                   {
                       PIRE,   8, 
                       PIRF,   8, 
                       PIRG,   8, 
                       PIRH,   8
                   }
               }

Find them and remove them. Getting ready for the next removal/modification. Same target device. Look here:

                OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)
               Field (LPC0, AnyAcc, NoLock, Preserve)
               {
                           Offset (0x20), 
                   PARC,   8, 
                   PBRC,   8, 
                   PCRC,   8, 
                   PDRC,   8, 
                           Offset (0x28), 
                   PERC,   8, 
                   PFRC,   8, 
                   PGRC,   8, 
                   PHRC,   8, 
                           Offset (0x40), 
                   IOD0,   8, 
                   IOD1,   8, 
                           Offset (0x60), 
                       ,   10, 
                   XPME,   1, 
                           Offset (0x64), 
                   AG3E,   1, 
                           Offset (0xB0), 
                   RAEN,   1, 
                       ,   13, 
                   RCBA,   18
               }

I don't know what was going on over at Apple Gigabyte – if they even did this them selfs – but looking at this block, and knowing that 0x40 + Offset (0x20) is 0x60, makes:

 

PIRA = PARC

PIRB = PBRC

PIRC = PCRC

PIRD = PDRC

 

And since 0x40 + Offset (0x28) is 0x68, makes:

 

PIRE = PERC

PIRF = PFRC

PIRG = PGRC

PIRH = PHRC

 

The names do not match, no. However, we are going to remove these anyway. Let's change that last block into:

                OperationRegion (LPC0, PCI_Config, 0xA0, 0x60)
               Field (LPC0, AnyAcc, NoLock, Preserve)
               {
                       ,   10, 
                   XPME,   1, 
                           Offset (0x04), 
                   AG3E,   1, 
                           Offset (0x50), 
                   RAEN,   1, 
                       ,   13, 
                   RCBA,   18
               }

What I've done is to take 0x40 and add the Offset (0x60) giving me that 0xA which I used to replace the 0x40 with. I also needed to change the length, which was set to 0xC0, and thus I took 0xC0 and subtracted the same value (0x60) from it, giving me 0x60 which I used to replace the 0xC0 with. And so on (0x64-0x60 = 0x04) and (0xB) - 0x60 = 0x50).

 

I used the Intel datasheet (ICH9R-316972) to verify my findings, which I'll share with you here for future reference:

 

13.1.17 PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control Register (LPC I/F—D31:F0)

13.1.19 PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control Register (LPC I/F—D31:F0)

13.1.21 LPC_IBDF—IOxAPIC Bus:Device:Function (LPC I/F—D31:F0)

 

Happy Hacking and Good Luck!

[Master Chief]

Hi iSoprano, is it save to use the bits from your posted aml file on my board? I have the revision 2.1 of the DS3P.

Yes, it is safe to use his DSDT.

 

and do I understand correctly that with these fixes, I have to remove both nullcpu.. and sleepenabler?

You don't have to do anything. It's your choice, but at least now you have the option.

 

and that when using this the apple kextst, temps become slightly higher and possible sleep issue?

The temperatures should become lower, and sometimes even much lower. And is sleep and auto sleep working for you? If yes, then you want to keep a close eye on all changes to Method _WAK and Method _PTS (Prepare To Sleep).

 

if so, I wonder why all the effort if it introduces these drawbacks, or is this for the sake of "as vanilla as I can get it" battle.

Sometimes things are not obvious, until they hit you – you can either wait for the Apple truck to hit you, or step aside in time and join us. Welcome aboard.

[FKA]

Can somebody please have a look at this?

 

dsdt24_10_09.dsl.zip

 

I've edited iSoprano's GA-EP35-DS3L 22_10_09 DSDT for my GA EP35 DS4 - I think they're pretty much identical dsdt's?

 

Using MP3,1

It works and SMBUS additions are working - with/without legacy SMC

and everything else OK

 

Problem is i now cant get p states working.

Help appreciated.

 

D.

[Master Chief]

Can somebody please have a look at this?

 

dsdt24_10_09.dsl.zip

 

I've edited iSoprano's GA-EP35-DS3L 22_10_09 DSDT for my GA EP35 DS4 - I think they're pretty much identical dsdt's?

 

Using MP3,1 It works and SMBUS additions are working - with/without legacy SMC and everything else OK

 

Problem is i now cant get p states working. Help appreciated.

 

D.

Do not use his PR scope, but the one you had previously in your DSDT.

[mitch_de]

Anyone has expirience with the platformprofiler (helps getting mor easy consomizing the platform for gpu+cpu powermanagement ) ?

http://www.applelife.ru/topic/20260-platfo...-snow-leopard/

[falkyre]

Hi all,

 

I've been following this thread with some interest and was wondering would the DSDT posted in post 1 work with a GA-EP35-DS3R? I have one and it is a little different from the GA-EP35-DS3L.

 

Thanks!

[Master Chief]

Next up is Device RTC which currently looks like this, or something similar like this (using mm67's latest DSDT as an example):

                Device (RTC)
               {
                   Name (_HID, EisaId ("PNP0B00"))
                   Name (ATT0, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0070,             // Range Minimum
                           0x0070,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                   })
                   Name (ATT1, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0070,             // Range Minimum
                           0x0070,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                   })
                   Method (_CRS, 0, NotSerialized)
                   {
                       Return (ATT0)
                   }
               }

Which quite frankly is also rather hideous. Time for us to do some clean ups. And this is the result:

                Device (RTC) // Renamed from: RTC0
               {
                   Name (_HID, EisaId ("PNP0B00"))
                   Name (_CRS, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0070,             // Range Minimum
                           0x0070,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                   })
               }

Much easier to read, and does what it is supposed to do, but now without the extra bits. Let's do one more today. Again using mm67's DSDT as an example. Next up is Device TIMR which currently looks like this in his DSDT:

                Device (TIMR)
               {
                   Name (_HID, EisaId ("PNP0100"))
                   Name (ATT6, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0040,             // Range Minimum
                           0x0040,             // Range Maximum
                           0x00,               // Alignment
                           0x04,               // Length
                           )
                   })
                   Method (_CRS, 0, NotSerialized)
                   {
                       Return (ATT6)
                   }
               }

Again looking rather hideous. But more importantly, also limited to only one timer! And looking at page 336 of the Intel Datasheet. Yup. Lucky us, we have two PIT's (actually three but the other one is RESERVED). Anyway. Let's start by doing the forgotten cleanups (by Gigabyte) and add the second timer. Here's what it looks like after the mods:

                Device (TIMR)
               {
                   Name (_HID, EisaId ("PNP0100"))
                   Name (_CRS, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0040,             // Range Minimum
                           0x0040,             // Range Maximum
                           0x00,               // Alignment
                           0x04,               // Length
                           )
                       IO (Decode16,
                           0x0050,             // Range Minimum
                           0x0050,             // Range Maximum
                           0x00,               // Alignment
                           0x04,               // Length
                           )
                   })
               }

[nrgexplosion]

Hi all,

 

I've been following this thread with some interest and was wondering would the DSDT posted in post 1 work with a GA-EP35-DS3R? I have one and it is a little different from the GA-EP35-DS3L.

 

Thanks!

 

I have that board, everything works with the posted one except sleep (I also have a Q6600 though)... sleep seems to restart my computer. I've also added 889a patch, ehci fix and lan built-in to mine. Other issue is that it temporarily loads multiple cpu profiles and then finally unloads the others and keeps merome (something that did not happen when I was using my own edited dsdt)... need to analyze the differences between the two board. But they are close enough that mostly there is no problem.

[falkyre]

I have that board, everything works with the posted one except sleep (I also have a Q6600 though)... sleep seems to restart my computer. I've also added 889a patch, ehci fix and lan built-in to mine. Other issue is that it temporarily loads multiple cpu profiles and then finally unloads the others and keeps merome (something that did not happen when I was using my own edited dsdt)... need to analyze the differences between the two board. But they are close enough that mostly there is no problem.

 

I have a Q6600 as well and the DSDT I am using right now gives me sleep no issues. The thing I'm look at most is lower my CPU temps with the SpeedStep. What kexts are you using in /Extra?

[nrgexplosion]

TIMR fix is giving me

Error 4095 - ^ syntax error, unexpected PARSEOP_DEVICE

 

Any idea why that might be?

[Master Chief]

Let's go nuts today and do one more. Here's what mm67's IPIC looks like:

                Device (IPIC)
               {
                   Name (_HID, EisaId ("PNP0000"))
                   Name (_CRS, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0020,             // Range Minimum
                           0x0020,             // Range Maximum
                           0x01,               // Alignment
                           0x02,               // Length
                           )
                       IO (Decode16,
                           0x00A0,             // Range Minimum
                           0x00A0,             // Range Maximum
                           0x01,               // Alignment
                           0x02,               // Length
                           )
                   })
               }

Which I changed into the following:

                Device (IPIC)
               {
                   Name (_HID, EisaId ("PNP0000"))
                   Name (_CRS, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0020,             // Range Minimum
                           0x0020,             // Range Maximum
                           0x01,               // Alignment
                           0x02,               // Length
                           )
                       IO (Decode16,
                           0x00A0,             // Range Minimum
                           0x00A0,             // Range Maximum
                           0x01,               // Alignment
                           0x02,               // Length
                           )
                       IO (Decode16, // Master Controller Edge/Level Triggered Register (ICH9R-316972.pdf / 13.4.10 / page 472)
                           0x04D0,             // Range Minimum
                           0x04D0,             // Range Maximum
                           0x01,               // Alignment
                           0x02,               // Length
                           )
                   [color="#FF0000"]IRQNoFlags ()
                           {2}[/color]
               }

Please note that you might need to remove the IRQNoFlags () {2} bits (in red) but that works just fine here.

 

What to do if sleeps worked fine, but got broken with one of the modifications in this thread?

Easy. Then you simply check Method _PTS (Prepare To Sleep) and see what was changed. Re-insert the lines one by one, or all at once and then take out the changes one by one. I tell you this: That should take care of sleep!

[nrgexplosion]

nvm fixed

[Master Chief]

TIMR fix is giving me

Error 4095 - ^ syntax error, unexpected PARSEOP_DEVICE

 

Any idea why that might be?

Not exactly. But I'll attach a fixed DSDT shortly, so that you (and the rest) can have a look at.

 

Edit: I see you already fixed it. Great, but what exactly was the problem? Just share what you did, so that others can learn from your mistake, or be quite

 

Edit: The attached archive has two error, and thus yo have to fix Field LPC0 like this:

                OperationRegion (LPC0, PCI_Config, 0xA0, 0x60)
               Field (LPC0, AnyAcc, NoLock, Preserve)
               {
                       ,   10, 
                   XPME,   1, 
                           Offset (0x04), 
                   AG3E,   1, 
                           Offset (0x50), 
                   RAEN,   1, 
                       ,   13, 
                   RCBA,   18
               }

Note the new length being 0x60 – as it was supposed to be in the first place – and the new Offset (0x50) which is still

Offset (0x60) in the archive. Again fix this!!!

FIX_4.zip

[Master Chief]

...

This is also followed by a small flashing of few lines from Netkas's 10.5 PC-EFI booter.

...

I agree with you about the verbose messages, dumped by the boot loader, which should shut the F up until I use -v to boot. The good news is that at least this can be done, IMHO work for Netkas, who can do this in his sleep. Or are there any other takers?

[rednous]

Master Chief,

 

i just wanna say hude thanx to you and all others contributing to this marvelous thread. i read your initial code for modifying the USBs but i got stuck, since im not very programming oriented guy i got my current dsdt patched following the Blackosx guide -- it's written for users like me -- complete newbies in this field

 

dsdt is very tricky and time consuming but i'll complete it your way one day, eventually.

 

also, i like very much your style of expression and cheers

[Master Chief]

Hehe, thanks.

 

The reason for using the alternate way is the call for PNOT in _WAK and EC. I haven't had enough PDCs for PNOT, only a PDC0 defined in CPU0, nothing more. Should I just send the PNOT method and all of its callers to hell, so I can restore my old _PR scope?

Please attach the fixed DSDT and I'll have a look.

 

What 'bout the dead auto-sleep?

Please see post #162 i.e. you have got to do this yourself, or without my help – I have lots of other things to do.

 

Update: Hmm... Today OS X said that he won't bother the DVD drive, so will do auto sleep. (I'm sure that was the case earlier too, but I've started checking every new DSDT.aml build with sleep and wake with keyboard/mouse/power button.) Yea, it did, but after wake is when it's started thinking otherwisely. All in all, first sleep works, then wake makes me enjoy the infamous no-sleep-coz-of-optical-drive.

Check Method _WAK with a previous DSDT that did work for you – note that this Method takes care of there-init part after sleep and startup. Making me think that the error can be found in Method _PTS

 

Update 2: Just checked reboot and shutdown w/o OHR kext, and only the latter (shutdown) works.

Thanks for testing. I am starting to wonder if there is anyone who can restart without a helper tool like OpenHaltRestart.kext

[nrgexplosion]

Fixed it by editing manually rather than copying and pasting. Wouldn't compiled with the IRQ bits at all (47) errors, but the rest of that snipped and all of the others compiled cleanly. I'm still trying to determine why all profiles are loaded temporarily (after a few mins the others are unloaded and the correct -- merom remains).

I'm still also trying to fix sleep. Deep sleep restarts my computer. i am using the same p states as the dsdt posted on this thread for my Q6600. Speedstepping etc does work.

My motherboard is however a slight varient (at least 99% identical dsdt to the one I was already using which had too much junk so I figured I'd save some time). My board is ep35c-ds3r. Aside from that one issue though everything seems perfect.

What's next?

Oh and I have the mikey assertion as well, but that has to do with HDA properly loading right?

[milanca]

Hi guys,

 

my working combination, used mm67's method with CST and PSS from original tables, EP35-DS3 Q6600.

Everything is fine, temp low again and CSTInfo loaded.

 

code removed.

 

But now i lost sleep, actually it restarts on wake. Looks like i'm going in circles.

[Master Chief]

Hi guys,

 

my working combination, used mm67's method with CST and PSS from original tables, EP35-DS3 Q6600. Everything is fine, temp low again and CSTInfo loaded.

 

<snip />

 

But now i lost sleep, actually it restarts on wake. Looks like i'm going in circles.

Please change that huge/ugly code block into a codebox combo. That'll add scrollbars and thus it'll be a lot smaller. Thank you very much.

 

See post #162 And what do you expect from people here without a copy of the working and broken DSDT? Mind reading?

 

...

I'm still trying to determine why all profiles are loaded temporarily (after a few mins the others are unloaded and the correct -- merom remains).

Let me help you a little: Comment out SBUS/EC and let me know if it still unloads the kexts

 

I'm still also trying to fix sleep. Deep sleep restarts my computer. ...

See post #162 to be able to find this problem yourself.

 

What's next?

Fixing sleep?

 

Oh and I have the mikey assertion as well, but that has to do with HDA properly loading right?

Part of it yes.

 

LATER

[blackosx]

But I'll attach a fixed DSDT shortly, so that you (and the rest) can have a look at.

Hi Master Chief

 

Just to help you gain an overall picture, I have tried using your DSDT (supplied in Fix_4.zip) on my system.

It works great and this is what happens on my system....

 

I lose my custom desktop picture and I see the default desktop picture.

My Serial_ATA devices in System Profiler display as ICH10 AHCI. The only way I know how to fix this is with this method, which changes them to Intel ESB2 AHCI and I get my desktop picture back. (I know you have pointed me here before).

 

I can shutdown without OpenHaltRestart but restart just closes machine down but fans and lights stay on (Same I think as Matthew L. posted).

 

My machine enters sleep almost instantly, where as before it took slightly longer. And wakes up perfectly with keyboard and mouse.

 

Regarding Speedstepping, I am not too clued up on that to be able to report properly on it. Like you said earlier, maybe I shouldn't even be using the Scope (_PR) in it, but with only fakesmc.kext, LegacyHDA.kext, and PlatformUUID.kext in my E/E my temps are showing as 42 degrees which I think shows it working?

 

I also needed to change the HDEF for my ALC888.

 

Thanks and hope this helps.

 

EDIT: I have replaced the Scope (_PR) with my original untouched one for now and attached my revised file here for reference.

Revised_for_GA_EP45_DS3L.zip

[keeza]

Man, gone away for a few days and we're up to 9 pages already!!!

 

Back soon when I've caught up

 

Interestingly I used MM67's latest dsdt for comparison purposes - his dsdt compiled with no errors. Mine wouldn't compile, practically identical except for the p-state bit, graphics, LAN etc.

I got 40 errors.

 

Guess what fixed it?

 

Removing my LAN devices from my dsdt.

 

So I'll start over....be back soon.

[cparm]

What to do if sleeps worked fine, but got broken with one of the modifications in this thread?

Easy. Then you simply check Method _PTS (Prepare To Sleep) and see what was changed. Re-insert the lines one by one, or all at once and then take out the changes one by one. I tell you this: That should take care of sleep!

 

hi, first i want to say that i really appreciate your work and the time you spending to answer to everyone,

 

 

ok, my problem is that if i apply EC, LCPB, SBUS patches, the OS go to sleep as it should (no fan), but when i trying to wake, it reboot,

do you know the region or the method or the device that i should check ?

 

i had checked method _wak and _pts line by line, but it still rebooting when i want to wake the OS, any other idea ?

[nrgexplosion]

Same problem exactly, checked all of those sections to previous dsdt before reboot issue.

 

hi, first i want to say that i really appreciate your work and the time you spending to answer to everyone,

 

 

ok, my problem is that if i apply EC, LCPB, SBUS patches, the OS go to sleep as it should (no fan), but when i trying to wake, it reboot,

do you know the region or the method or the device that i should check ?

 

i had checked method _wak and _pts line by line, but it still rebooting when i want to wake the OS, any other idea ?