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DSDT fixes for Gigabyte boards

iSoprano

By iSoprano,
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blackosx
blackosx
Posted
Posted

My system reacts the same as AudiSport's with it restarting rather than waking from sleep if the 'Start up automatically after a power failure' box is unticked.

 

I have tried it with both

Store (Zero, \_SB.PCI0.LPCB.AG3E)

Store (One, \_SB.PCI0.LPCB.AG3E)

and the same happens.

 

My system will only wake from sleep with the 'Start up automatically after a power failure' box ticked.

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mm67
mm67
Posted
Posted
Good to know.

 

 

This is clearly another bug in the GigaByte BIOS since this setting (read LPCB:PCI register 0xA4) controls the state to return to after a power failure. It has nothing to do with sleep, but let's figure out how to solve this. Now. The value of register A4 is 38 for the checked state and 39 for an unchecked state. And the former corresponds with this text in the ICH datasheet:

 

"System will return to S0 state (boot) after power is re-applied.

 

And if that is what you need for resume after sleep, then you must use Store (Zero, \_SB.PCI0.LPCB.AG3E) and use Store (One, \_SB.PCI0.LPCB.AG3E) only for shutdown.

 

Using Store (Zero, \_SB.PCI0.LPCB.AG3E) in PTS works, then it doesn't matter if that System preference setting is ticked or not. But why do you want to use Store (One, \_SB.PCI0.LPCB.AG3E) for shutdown, on Gigabyte that does nothing, that setting is defined in Bios setup. This works:

    Method (_PTS, 1, NotSerialized)
   {
Store (Zero, \_SB.PCI0.LPCB.AG3E)
       Or (Arg0, 0xF0, Local0)
       Store (Local0, DBG1)

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Master Chief
Master Chief
Posted
Posted
Using Store (Zero, \_SB.PCI0.LPCB.AG3E) in PTS works, then it doesn't matter if that System preference setting is ticked or not.

And you have to use either this DSDT patch or tick the check box for resume to work?

 

But why do you want to use Store (One, \_SB.PCI0.LPCB.AG3E) for shutdown, on Gigabyte that does nothing, that setting is defined in Bios setup...

There are two kinds of power failures. One where the register state is retained and one where everything is lost. That's when our BIOS setting comes in place (Asus BIOS also has settings for this). The DSDT patch is for the accidental short term (user initiated) power failures only.

 

Note: You might want to change the BIOS settings and do a lspci -xxxvvv > before.txt / after.txt to locate the register state change(s).

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blackosx
blackosx
Posted
Posted

Sorry guys. Wake from sleep now works without the checkbox ticked, thanks mm67. I had the code under the if statement.

 

When it didn't work, my _PTS method looked like this..

Method (_PTS, 1, NotSerialized)
   {
       Or (Arg0, 0xF0, Local0)
       Store (Local0, DBG1)
       If (LEqual (Arg0, 0x05))
       {
           Store (Zero, \_SB.PCI0.LPCB.AG3E)
       }
   }

Now it works with this...

    Method (_PTS, 1, NotSerialized)
   {
       Store (Zero, \_SB.PCI0.LPCB.AG3E)
       Or (Arg0, 0xF0, Local0)
       Store (Local0, DBG1)
   }

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kdawg
kdawg
Posted
Posted
After upgrading my DSDT editor to EVO DSTSE things have gone a lot smoother. However, I still get one error when trying to compile; /Library/Application Support/EvOSoftware/DSDT/DSDTFiles/dsdt.dsl 1: ehcify (\_SB.PCI0.PEX2, 0x02) Error 4096 - ^ syntax error, unexpected PARSEOP_NAMESEG, expecting PARSEOP_DEFINITIONBLOCK

 

I am not sure why I am getting this error, seeing how I never touched that part in the DSDT. What the guide had me change posted no errors yet I am stuck one this last snag. I included my latest attempt at USB fix (and my successful HPET fix for MacPro4,1 speedsteping and vanilla AppleCPUPM.kext) with all the changes I have done. Any suggestions?

 

 

 

sry my attachment failed to u/l ><

 

I might try another text editor like TextWrangler or BBEdit. That file you posted is messed up. Looks like you might have some weird character in there from copy and pasting. EVO DSTSE has a lot of problems. Re do your DSDT by hand in one of the two editor I mentioned then recompile. No more copy and pasting.

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xboxdude
xboxdude
Posted
Posted

I've spotted some interesting behaviour with speedstep not working when a particular area of my DSDT file is amended - I'm not sure why but having tried it 3 times back and forth, I can confirm that this definitely does affect speedstep on my machine.

 

Speedstep works fine when the PCIB section is like this:

 

Device (PCIB) // Renamed from HUB0

{

Name (_ADR, 0x001E0000)

Name (_PRT, Package (0x
0C
)

{

Package (0x04) { 0xFFFF, Zero, Zero, 0x14 },

Package (0x04) { 0xFFFF, One, Zero, 0x13 },

Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 },

Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 },

Package (0x04) { 0x0001FFFF, Zero, Zero, 0x13 },

Package (0x04) { 0x0001FFFF, One, Zero, 0x12 },

Package (0x04) { 0x0001FFFF, 0x02, Zero, 0x10 },

Package (0x04) { 0x0001FFFF, 0x03, Zero, 0x14 },

Package (0x04) { 0x0007FFFF, Zero, Zero, 0x17 },

Package (0x04) { 0x0007FFFF, One, Zero, 0x17 },

Package (0x04) { 0x0007FFFF, 0x02, Zero, 0x17 },

Package (0x04) { 0x0007FFFF, 0x03, Zero, 0x17 }

})

 

Method (_PRW, 0, NotSerialized)

{

Return (Package (0x02)

{

0x0B,

0x05

})

}

}

 

However, when it is set as follows, speedstep stops working:

 

Device (PCIB) // Renamed from HUB0

{

Name (_ADR, 0x001E0000)

Name (_PRT, Package (0x
08
)

{

Package (0x04) { 0xFFFF, Zero, Zero, 0x14 },

Package (0x04) { 0xFFFF, One, Zero, 0x13 },

Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 },

Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 },

Package (0x04) { 0x0001FFFF, Zero, Zero, 0x13 },

Package (0x04) { 0x0001FFFF, One, Zero, 0x12 },

Package (0x04) { 0x0001FFFF, 0x02, Zero, 0x10 },

Package (0x04) { 0x0001FFFF, 0x03, Zero, 0x14 }

})

 

Method (_PRW, 0, NotSerialized)

{

Return (Package (0x02)

{

0x0B,

0x05

})

}

}

It may be worth those having speedstep problems trying this out for themselves... I've seen a few DSDTs without this in. (And if anyone knows why this happens, please do enlighten me). :(

 

 

Confirmed working for me too:-

 

Sorry guys. Wake from sleep now works without the checkbox ticked, thanks mm67. I had the code under the if statement.

 

    Method (_PTS, 1, NotSerialized)
   {
       Store (Zero, \_SB.PCI0.LPCB.AG3E)
       Or (Arg0, 0xF0, Local0)
       Store (Local0, DBG1)
   }

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Master Chief
Master Chief
Posted
Posted
Maybe he tried using it only during shutdown.

 

BTW. No changes in lspci output when I change that bios setting.

What about the chipset configuration registers (PM'ed script)?

 

 

Sorry guys. Wake from sleep now works without the checkbox ticked, thanks mm67. I had the code under the if statement.

Glad to hear that the fail safe is working for you – no more wakeup troubles caused by an unintentional change of the checkbox ;)

 

 

 

 

I've spotted some interesting behaviour with speedstep not working when a particular area of my DSDT file is amended - I'm not sure why but having tried it 3 times back and forth, I can confirm that this definitely does affect speedstep on my machine.

...

So where is the extra code coming from? Is that part of your vanilla DSDT? Or did you copy/paste it from some other DSDT floating around here?

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xboxdude
xboxdude
Posted
Posted

It was in my vanilla DSDT - only spotted it after comparing my DSDT with some others here and noting the effect it had when removed. Worth noting if just utilising someone elses DSDT.

 

So where is the extra code coming from? Is that part of your vanilla DSDT? Or did you copy/paste it from some other DSDT floating around here?
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mm67
mm67
Posted
Posted
What is the error do you get? If none, what about the log files?

 

Note: PM is broken here – flood control blocks replying (in time).

 

No error messages, it just gets stuck using 100 % of one cpu core. Nothing in the logs either, only the commandline I used to start reggie_se.

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kdawg
kdawg
Posted
Posted
Sorry guys. Wake from sleep now works without the checkbox ticked, thanks mm67. I had the code under the if statement.

 

When it didn't work, my _PTS method looked like this..

Method (_PTS, 1, NotSerialized)
   {
       Or (Arg0, 0xF0, Local0)
       Store (Local0, DBG1)
       If (LEqual (Arg0, 0x05))
       {
           Store (Zero, \_SB.PCI0.LPCB.AG3E)
       }
   }

Now it works with this...

    Method (_PTS, 1, NotSerialized)
   {
       Store (Zero, \_SB.PCI0.LPCB.AG3E)
       Or (Arg0, 0xF0, Local0)
       Store (Local0, DBG1)
   }

 

Are you also using SleepEnabler.kext?

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mitch_de
mitch_de
Posted
Posted

"Speedstep works fine when the PCIB section is like this:"

 

Device (PCIB) // Renamed from HUB0
{
Name (_ADR, 0x001E0000)
Name (_PRT, Package (0x0C)
{
Package (0x04) { 0xFFFF, Zero, Zero, 0x14 }, 
.....
Package (0x04) { 0x0001FFFF, Zero, Zero, 0x13 }, 
.....
Package (0x04) { 0x000[b]7FFFF[/b], Zero, Zero, [b]0x17[/b] },
Package (0x04) { 0x0007FFFF, One, Zero, 0x17 }, 
Package (0x04) { 0x0007FFFF, 0x02, Zero, 0x17 }, 
Package (0x04) { 0x0007FFFF, 0x03, Zero, 0x17 }
})

 

Hmmm, i have insted 7FFFF there 2FFFF, and 0x12, 0x10, 0x14, 0x13 insted of 0x17 ??!!

 

I dont know from whom i got those dsdt sniplet nor i know what that does ;)

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AudiSport
AudiSport
Posted
Posted
And if that is what you need for resume after sleep, then you must use Store (Zero, \_SB.PCI0.LPCB.AG3E) and use Store (One, \_SB.PCI0.LPCB.AG3E) only for shutdown.
That worked.
		If (LEqual (Arg0, 0x05)) // S5 (shutdown)
	{
		Store (One, \_SB.PCI0.LPCB.AG3E) // Return to S5 after power failure
	} 
	Else
	{
		Store (Zero, \_SB.PCI0.LPCB.AG3E)
		\_SB.PCI0.LPCB.SPTS ()
	}

Now it wakes from sleep no matter what the checkbox is set to.

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mitch_de
mitch_de
Posted
Posted

If (LEqual (Arg0, 0x05)) // S5 (shutdown)

 

Hi, what is an S5 shutdown ?

Something only mobile (netbook, notebooks) have ?

I only know (listed in my BIOS settings) S1 and S3.

Or means S5 simple shutdown and not an powersaving like S1 / S3 sleep ?

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Master Chief
Master Chief
Posted
Posted
If (LEqual (Arg0, 0x05)) // S5 (shutdown)

 

Hi, what is an S5 shutdown ?

Something only mobile (netbook, notebooks) have ?

I only know (listed in my BIOS settings) S1 and S3.

Or means S5 simple shutdown and not an powersaving like S1 / S3 sleep ?

Go download The ACPI Specification - Revision 4.0 and enter S5 in the search box to find this:

 

"OSPM places the platform in the S5 soft off state to achieve a logical off. Notice that the S5 state is not a sleeping state (it is a G2 state) and no context is saved by OSPM or hardware but power may still be applied to parts of the platform in this state and as such, it is not safe to disassemble. Also notice that from a hardware perspective, the S4 and S5 states are nearly identical. When initiated, the hardware will sequence the system to a state similar to the off state. The hardware has no responsibility for maintaining any system context (memory or I/O); however, it does allow a transition to the S0 state due to a power button press or a Remote Start. Upon start-up, the BIOS performs a normal power-on reset, loads the boot sector, and executes (but not the waking vector, as all ACPI table context is lost when entering the S5 soft off state).

 

And this is just one of the many subjects in the ACPI specification about S5. Anyone here who is trying to grasp DSDT changes, without having this 'guide'... is a fool :)

 

That worked.
 ... see post #647

Now it wakes from sleep no matter what the checkbox is set to.

:)

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Patteri
Patteri
Posted
Posted

Hi,

 

My hackintosh load AppleLPC kext but I don't have that "Restart Automatically after a power failure" checkbox in my energy saver.

 

Also my hack won't shut down without OpenHaltRestart.kext. I would like to know how should I modify my dsdt to fix these "problems".

 

Could someone check my dsdt.dsl and give some tips?

 

Thx!

dsdt.dsl.zip

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mm67
mm67
Posted
Posted
Hi,

 

My hackintosh load AppleLPC kext but I don't have that "Restart Automatically after a power failure" checkbox in my energy saver.

 

Also my hack won't shut down without OpenHaltRestart.kext. I would like to know how should I modify my dsdt to fix these "problems".

 

Could someone check my dsdt.dsl and give some tips?

 

Thx!

 

Where did you get that device-id 27b8 for LPC ? I can see that 27b9 and 27bd are possible but 27b8 is not on the IONameMatch list.

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Patteri
Patteri
Posted
Posted
Where did you get that device-id 27b8 for LPC ? I can see that 27b9 and 27bd are possible but 27b8 is not on the IONameMatch list.

 

First I tried 27b9 and didn't work. Then I tried 27b8 and modify AppleLPC's info.plist to match but same thing, didn't work.

 

 

00:1f.0 ISA bridge [0601]: Intel Corporation 82801GB/GR (ICH7 Family) LPC Interface Bridge [8086:27b8] (rev 01)

sp.png

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