DSDT - Vanilla Speedstep - Generic Scope (_PR)

juanerson · November 20, 2009

Hi mitch_de, can you help me please... post 896. Thanks in advance.

mitch_de · November 20, 2009

Sorry, NO.

Its an HP Bios which is very different to mine / mydsdt knowledge.

I would make an thread in Postinstall and looking for other users which have exact that HP Modell and can help with their DSDT .

And of course: Its not an really needed thing to get AppleIntelCPU running for speedstep.

So, even you have no Pstates in the dsdt you can use voodoopower based speedstep which do the pstate config itself.

Dont worry too much if you must wait - i am also could use AppleIntelCPU with _PSS working BUT!! i dont use that ! I stay with voodoopower (even new SL version out from superhai). For me much better configuarble to my needs and didnt need any dsdt things for stepping nor an special Mac Model. Nor AppleLPC....

juanerson · November 20, 2009

Thanks for your answer, and the information.

relikwie · November 21, 2009

Nice initial post overhaul!

I went on with it, but see that my CPU has 8 P-States (counting from 0 to 7) is this correct? Seems a bit too many..

mitch_de · November 21, 2009

You will have also the 0.5 step on the multiplier 6.0* , 6.5*,..... . So you get more than the normal 6.0. 7.0,---

I dont know if that finer stepping has advantages / disadvantages.

FKA · November 21, 2009

I got my mVolts = zeros shown in PstateChanger fixed !
Was useACPI=yes (means voodoopower based use ACPI _PSS (dsdt) insted of computing it by cpu type).

One more thing:

superhai did it again : voodoopowermini SL is OUT!!!!

My abolute favorite for speedstepping : less cpu usage than the set of PstateChanger/VoodooPstate.kext.!!

I am 110% sure:

Even Fred Astaire would have used that for stepping !

LOL - it is a lot easier to install a kext too!

Although not having to worry about disabling cpupm at update time does it for me.

D.

mitch_de · November 21, 2009

Sure, what we did to run AppleIntelCPU without KP + use Pstates with it isnt useless!

Nice to have all available and choose free.

Dr. Hurt · November 21, 2009

Thanks for the generic code.

I replaced my mac pro _CST with the much smaller generic one, and everything works great. I didn't add the PSS part.

The only patches I have now are: (for people who want to know where to start )

1- Generic _CST (WITHOUT the PSS) --> much easier for beginners

2- LPCB device with fake id to load vanilla Apple kext without legacy

Thanks to everyone who helped in making this possible.

Smith@@™ · November 22, 2009

Sorry, this is part of my code, but i have always this error :

/Library/Application Support/EvOSoftware/DSDT/DSDTFiles/dsdt.dsl 131: Scope (_SB)

Error 4095 - syntax error, unexpected PARSEOP_SCOPE, expecting ',' or '}' ^

Here there is my complete dsdt:

dsdt.zip

Thanks for help

 DefinitionBlock ("./dsdt.aml", "DSDT", 1, "A0999", "A0999001", 0x00000001)
{

 Method (DTGP, 5, NotSerialized)
   {
       If (LEqual (Arg0, Buffer (0x10)
               {
                   /* 0000 */    0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44, 
                   /* 0008 */    0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B
               }))
       {
           If (LEqual (Arg1, One))
           {
               If (LEqual (Arg2, Zero))
               {
                   Store (Buffer (One)
                       {
                           0x03
                       }, Arg4)
                   Return (One)
               }

               If (LEqual (Arg2, One))
               {
                   Return (One)
               }
           }
       }

       Store (Buffer (One)
           {
               0x00
           }, Arg4)
       Return (Zero)
   }


 OperationRegion (GPIO, SystemIO, 0x0500, 0x3C)
   Field (GPIO, ByteAcc, NoLock, Preserve)
   {
       GU00,   8, 
       GU01,   8, 
       GU02,   8, 
       GU03,   8, 
       GIO0,   8, 
       GIO1,   8, 
       GIO2,   8, 
       GIO3,   8, 
               Offset (0x0C), 
       GL00,   8, 
       GL01,   8, 
       GL02,   8, 
       GL03,   8, 
               Offset (0x18), 
       GB00,   8, 
       GB01,   8, 
       GB02,   8, 
       GB03,   8, 
               Offset (0x2C), 
       GIV0,   8, 
       GIV1,   7, 
       GI15,   1, 
       GIV2,   8, 
       GIV3,   8, 
       GU04,   8, 
       GU05,   8, 
       GU06,   8, 
       GU07,   8, 
       GIO4,   8, 
       GIO5,   8, 
       GIO6,   8, 
       GIO7,   8, 
       GL04,   8, 
       GL05,   8, 
       GL06,   8, 
       GL07,   8
   }

   OperationRegion (BSKU, SystemMemory, 0xFFBC0100, One)
   Field (BSKU, ByteAcc, NoLock, Preserve)
   {
           ,   1, 
       BPHP,   3, 
               Offset (0x01)
   }

   OperationRegion (GPE0, SystemIO, 0x042C, 0x04)
   Field (GPE0, ByteAcc, NoLock, Preserve)
   {
           ,   1, 
       GPEH,   1, 
           ,   7, 
       PEEN,   1, 
           ,   1, 
       PMEE,   1, 
               Offset (0x03), 
       PCIX,   1, 
               Offset (0x04)
   }

  Scope (_PR)
   {
       Processor (CPU0, 0x01, 0x00000810, 0x06) {}
       Processor (CPU1, 0x02, 0x00000000, 0x00) {}
       Processor (CPU2, 0x03, 0x00000000, 0x00) {}
       Processor (CPU3, 0x04, 0x00000000, 0x00) {}
   }
   Scope (_PR.CPU0)
   {
   Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x4721, //FId/VID of p-state 0 (HIGHEST P-state)
                   Zero     //  p-state 0
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x071F,  // FID/VID for p-state 1
                   One        // p-state 1
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x461D, // FID/VID 
                   0x02     //p-state 2
               },

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x061A,  // FID/VID 
                   0x03        // p-state 3
               }

          })
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (Package (0x05)
           {
               0x05, 
               Zero, 
               Zero, 
               0xFC, 
               0x04
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
    }

   Scope (_PR.CPU1)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   Zero, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   One, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x55, 
                   0xFA
               }
           })
       }
   }

   Scope (_PR.CPU2)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
  }


Scope (_SB)
   {
       Name (PR00, Package (0x1B)
       {
           Package (0x04)
           {
               0x0001FFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x03, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               0x03, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0x0002FFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x001FFFFF, 
               Zero, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x001FFFFF, 
               One, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0x001FFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               Zero, 
               LNKH, 
               Zero
           }, 

           Package (0x04)
           {
               0x001AFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x001BFFFF, 
               Zero, 
               LNKG, 
               Zero
           }, 

           Package (0x04)
           {
               0x0019FFFF, 
               Zero, 
               LNKE, 
               Zero
           }, 

           Package (0x04)
           {
               0x0019FFFF, 
               One, 
               LNKF, 
               Zero
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               One, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               0x03, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x001AFFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x001AFFFF, 
               One, 
               LNKF, 
               Zero
           }, 

           Package (0x04)
           {
               0x0002FFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               Zero, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               One, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               0x03, 
               LNKD, 
               Zero
           }
       })
       Name (AR00, Package (0x1B)
       {
           Package (0x04)
           {
               0x0001FFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x03, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x0006FFFF, 
               0x03, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0x0002FFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x001FFFFF, 
               Zero, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x001FFFFF, 
               One, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0x001FFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               Zero, 
               Zero, 
               0x17
           }, 

           Package (0x04)
           {
               0x001AFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x001BFFFF, 
               Zero, 
               Zero, 
               0x16
           }, 

           Package (0x04)
           {
               0x0019FFFF, 
               Zero, 
               Zero, 
               0x14
           }, 

           Package (0x04)
           {
               0x0019FFFF, 
               One, 
               Zero, 
               0x15
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               One, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x001DFFFF, 
               0x03, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x001AFFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x001AFFFF, 
               One, 
               Zero, 
               0x15
           }, 

           Package (0x04)
           {
               0x0002FFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               Zero, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               One, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x001CFFFF, 
               0x03, 
               Zero, 
               0x13
           }
       })
       Name (PR02, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKD, 
               Zero
           }
       })
       Name (AR02, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x13
           }
       })
       Name (PR03, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKD, 
               Zero
           }
       })
       Name (AR03, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x13
           }
       })
       Name (PR04, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKD, 
               Zero
           }
       })
       Name (AR04, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x13
           }
       })
       Name (PR05, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKA, 
               Zero
           }
       })
       Name (AR05, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x10
           }
       })
       Name (PR06, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKB, 
               Zero
           }
       })
       Name (AR06, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x11
           }
       })
       Name (PR07, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKC, 
               Zero
           }
       })
       Name (AR07, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x12
           }
       })
       Name (PR08, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKD, 
               Zero
           }
       })
       Name (AR08, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x13
           }
       })
       Name (PR09, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKA, 
               Zero
           }
       })
       Name (AR09, Package (0x04)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x10
           }
       })
       Name (PR01, Package (0x0A)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               Zero, 
               LNKB, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               One, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x02, 
               LNKD, 
               Zero
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x03, 
               LNKA, 
               Zero
           }, 

           Package (0x04)
           {
               0x0002FFFF, 
               Zero, 
               LNKC, 
               Zero
           }, 

           Package (0x04)
           {
               0x0003FFFF, 
               Zero, 
               LNKD, 
               Zero
           }
       })
       Name (AR01, Package (0x0A)
       {
           Package (0x04)
           {
               0xFFFF, 
               Zero, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0xFFFF, 
               One, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x02, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0xFFFF, 
               0x03, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               Zero, 
               Zero, 
               0x11
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               One, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x02, 
               Zero, 
               0x13
           }, 

           Package (0x04)
           {
               0x0001FFFF, 
               0x03, 
               Zero, 
               0x10
           }, 

           Package (0x04)
           {
               0x0002FFFF, 
               Zero, 
               Zero, 
               0x12
           }, 

           Package (0x04)
           {
               0x0003FFFF, 
               Zero, 
               Zero, 
               0x13
           }
       })
       Name (PRSA, ResourceTemplate ()
       {
           IRQ (Level, ActiveLow, Shared, )
               {3,4,5,6,7,10,11,12,14,15}
       })
       Alias (PRSA, PRSB)
       Alias (PRSA, PRSC)
       Alias (PRSA, PRSD)
       Alias (PRSA, PRSE)
       Alias (PRSA, PRSF)
       Alias (PRSA, PRSG)
       Alias (PRSA, PRSH)
       Device (PCI0)
       {
           Name (_UID, Zero)
           Name (_HID, EisaId ("PNP0A08"))
           Name (_ADR, Zero)
           Method (^BN00, 0, NotSerialized)
           {
               Return (Zero)
           }

           Method (_BBN, 0, NotSerialized)
           {
               Return (BN00 ())
           }

           Method (_PRT, 0, NotSerialized)
           {
               If (PICM)
               {
                   Return (AR00)
               }

               Return (PR00)
           }

           Method (_S3D, 0, NotSerialized)
           {
               If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02)))
               {
                   Return (0x02)
               }
               Else
               {
                   Return (0x03)
               }
           }

           Name (_CID, EisaId ("PNP0A03"))
           Device (MCEH)
           {
               Name (_HID, EisaId ("PNP0C01"))
               Name (_UID, 0x0A)
               Name (_CRS, ResourceTemplate ()
               {
                   Memory32Fixed (ReadWrite,
                       0xFED14000,         // Address Base
                       0x00006000,         // Address Length
                       )
               })
           }

           Method (NPTS, 1, NotSerialized)
           {
           }

           Method (NWAK, 1, NotSerialized)
           {
           }

           Device (P0P2)
           {
               Name (_ADR, 0x00010000)
               Method (_PRW, 0, NotSerialized)
               {
                   Return (GPRW (0x09, 0x04))
               }

               Method (_PRT, 0, NotSerialized)
               {
                   If (PICM)
                   {
                       Return (AR02)
                   }

                   Return (PR02)
               }
           }

           Device (P0P3)
           {
               Name (_ADR, 0x00060000)
               Method (_PRW, 0, NotSerialized)
               {
                   Return (GPRW (0x09, 0x04))
               }

               Method (_PRT, 0, NotSerialized)
               {
                   If (PICM)
                   {
                       Return (AR03)
                   }

                   Return (PR03)
               }
           }

relikwie · November 22, 2009

You will have also the 0.5 step on the multiplier 6.0* , 6.5*,..... . So you get more than the normal 6.0. 7.0,---
I dont know if that finer stepping has advantages / disadvantages.

mitch, ok, clear. Will add them to the Scope _PR

Is voodoopowermini a beter solution than dsdt? I have huge issues with vmware fusion, using dsd solution.

Windows7 is extremely slow (booting takes 20 minutes) and think it's due to my dsdt.

@smith: open the dsl file with vi and check for ^M chars or look for a missing closing bracket.

Mostly it's because you copy and paste bits, you should use vi for copy and pasting.

Smith@@™ · November 22, 2009

I have just try but nothing

Here there is my complete dsdt:

dsdt.zip

FKA · November 22, 2009

Sorry, this is part of my code, but i have always this error :

/Library/Application Support/EvOSoftware/DSDT/DSDTFiles/dsdt.dsl 131: Scope (_SB)

Error 4095 - syntax error, unexpected PARSEOP_SCOPE, expecting ',' or '}' ^

Here there is my complete dsdt:

dsdt.zip

Thanks for help

I think you need one more } before Scope (_SB)

Also how many cores is your CPU?

Scope (_PR)
{
Processor (CPU0, 0x01, 0x00000810, 0x06) {}
Processor (CPU1, 0x02, 0x0000[b][color="#ff0000"]0000[/color], [color="#ff0000"]0x00)[/color][/b] {}
Processor (CPU2, 0x03, 0x0000[b][color="#ff0000"]0000, 0x00[/color])[/b] {}
Processor (CPU3, 0x04, 0x0000[b][color="#ff0000"]0000, 0x00[/color])[/b] {}
}
Scope (_PR.CPU0)

D

Smith@@™ · November 22, 2009

I have just try with } before scope sb but nothing, i'm crazing bho

Listen, my dsdt is attached, you can? Please :blush:

agrajag · November 23, 2009

OK now I am depressed about my attempts at speedstepping.

I have followed the discussions and tutorials, dumped my ACPI files (using Ubuntu Live) and worked through the logic of the cpupm, cpu0ist, cpu1ist files on my Hack #1 system. I can see in voodoomonitor that I am getting the speedstepping allowed on my motherboard+cpu combination (2 p-states at 6x and 9x 333MHz running at stock 3.0GHz). After much trial and error it looks fine, but I get about 2400 on Geekbench.

What was really depressing was when I made an error- I copied "dsdt.dsl" instead of "dsdt.aml" to my Extra folder. After rebooting I got 4500 on Geekbench (admittedly the USB fixes and other fixes now were absent, plus the BIOS got clobbered on reboot due to the SL bug). That is in line with the scores I get on 10.5.x.

After all that I still cannot figure out why my Geekbench scores in SL are always low (2400-2500) even though I cannot see any errors and the speedstepping seems to work as expected.

My current rev of the processor code looks like:

 Scope (_PR)
   {
       Processor (CPU0, 0x00, 0x00000410, 0x06) {}
       Processor (CPU1, 0x01, 0x00000410, 0x06) {}
       Processor (CPU2, 0x02, 0x00000410, 0x06) {}
       Processor (CPU3, 0x03, 0x00000410, 0x06) {}
   }
   Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
             Package (0x06)
             {
                 0x00000BB8, 
                 0x000157C0, 
                 0x0000000A, 
                 0x0000000A, 
                 0x00000920, 
                 0x00000920
             }, 
             Package (0x06)
             {
                0x000007D0, 
                0x0000FA00, 
                0x0000000A, 
                0x0000000A, 
                0x0000061A, 
                0x0000061A
             }
           })
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (Package (0x05)
           {
               0x05, 
               Zero, 
               Zero, 
               0xFC, 
               0x02
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
   }

   Scope (_PR.CPU1)  // For Core 1, copy P-States & C-States from Core 0. (If quad core, then you'll need this for CPU2 and CPU3
   {
       Alias (\_PR.CPU0._PSS, _PSS)
       Alias (\_PR.CPU0._PSD, _PSD)
       Alias (\_PR.CPU0._CST, _CST)
   }

mm67 · November 23, 2009

OK now I am depressed about my attempts at speedstepping.

I have followed the discussions and tutorials, dumped my ACPI files (using Ubuntu Live) and worked through the logic of the cpupm, cpu0ist, cpu1ist files on my Hack #1 system. I can see in voodoomonitor that I am getting the speedstepping allowed on my motherboard+cpu combination (2 p-states at 6x and 9x 333MHz running at stock 3.0GHz). After much trial and error it looks fine, but I get about 2400 on Geekbench.

What was really depressing was when I made an error- I copied "dsdt.dsl" instead of "dsdt.aml" to my Extra folder. After rebooting I got 4500 on Geekbench (admittedly the USB fixes and other fixes now were absent, plus the BIOS got clobbered on reboot due to the SL bug). That is in line with the scores I get on 10.5.x.

After all that I still cannot figure out why my Geekbench scores in SL are always low (2400-2500) even though I cannot see any errors and the speedstepping seems to work as expected.

You only have 2 steps but here you say you have 4.

Method (_PSS, 0, NotSerialized)

{

Return (Package (0x04)

agrajag · November 23, 2009

You only have 2 steps but here you say you have 4.

Thanks for spotting that- it is a holdover from earlier attempts when I thought there were 4 p-states (before I dumped the ACPI files). It does seem to work in that I can see the entries in the PerformanceStateArray with the IORegistryExplorer (inside CPU0@0->AppleACPICPU->ACPI_SMC_PlatformPlugin). Should I see the same entry in CPU1@1 also? I don't see it there right now.

Also VoodooMonitor still displays 4 pstates (9.0x through 6.0x) even though I have only the two entered in the dsdt now and I only ever see the two cores in 9.0x and 6.0x states (as expected). Also the Geekbench scores are still around 2500, so something is still not quite right.

dabla · November 23, 2009

Thanks to you guy's I finally managed to get rid off those CST evaluation failed messages at boot time. Seems those are well loaded now (thanks to the dsdt of FormelyKnownAs), still it seems the speedstep is still not working. I can't check it in 64-bit mode as MSR Tools is 32-bit only. By the way, is there a 64-bit version of CPU-i? When I boot in 32-bit mode, I don't see any changes happening in MSR Tools... Does speedstep kick in immediately (I suppose it does)? What could be wrong with my setup? Mac model is set to MacPro3,1, I use PC EFI 10.5 bootloader with chameleon 2.0 rc2. I'm running 10.6.2. Temps are around 48-50° C.

I'm only using following 5 kext's in extra:

- ALC889A

- AtherosFix

- Modified fakesmc 2.0 for CPU temps

- OpenHaltRestart

- PlatformUUID

Thanks in advance for any help or suggestions. You'll find my dsdt in attachment.

dsdt.dsl.zip

FKA · November 23, 2009

Thanks for spotting that- it is a holdover from earlier attempts when I thought there were 4 p-states (before I dumped the ACPI files). It does seem to work in that I can see the entries in the PerformanceStateArray with the IORegistryExplorer (inside CPU0@0->AppleACPICPU->ACPI_SMC_PlatformPlugin). Should I see the same entry in CPU1@1 also? I don't see it there right now.

Also VoodooMonitor still displays 4 pstates (9.0x through 6.0x) even though I have only the two entered in the dsdt now and I only ever see the two cores in 9.0x and 6.0x states (as expected). Also the Geekbench scores are still around 2500, so something is still not quite right.

Hi agrajag

Please read the 1st post - if you use pstateschanger and it shows 4 p-states, then I'd use 4 p-states.

Also be good to compare bench results with DSDT p-states and voodoomini

Cheers

D.

KWS · November 23, 2009

This is my - working - speedstep part of DSDT for e8400 on Gigabyte-Board ....

e8400speedstep_working.txt

FKA · November 23, 2009

I have just try with } before scope sb but nothing, i'm crazing bho

Listen, my dsdt is attached, you can? Please

Dude what does it say about not copying and pasting from code boxes!

You left this code ate the end of Scope (_PR)

Name (_S0, Package (0x04)
   {
       Zero, 
       Zero, 
       Zero, 
       Zero
   })
   Name (SS1, Package (0x04)

Which I posted as a:- this is where the code fits in my DSDT example!

Also

  Scope (_PR)
 {
 Processor (CPU0, 0x01, 0x00000810, 0x06) {}
 Processor (CPU1, [color="#ff0000"][b]0x01[/b][/color], 0x00000810, 0x06) {}
 Processor (CPU2, [b][color="#ff0000"]0x01[/color][/b], 0x00000810, 0x06) {}
 Processor (CPU3, [b][color="#ff0000"]0x01[/color][/b], 0x00000810, 0x06) {}

Should be

  Scope (_PR)
 {
 Processor (CPU0, [b][color="#ff0000"]0x00[/color][/b], 0x00000810, 0x06) {}
 Processor (CPU1, [b][color="#ff0000"]0x01[/color][/b], 0x00000810, 0x06) {}
 Processor (CPU2, [color="#ff0000"][b]0x02[/b][/color], 0x00000810, 0x06) {}
 Processor (CPU3, [b][color="#ff0000"]0x03[/color][/b], 0x00000810, 0x06) {}

And you are on an Asus MB so I suspect your CPU copres are actually labeled CPU1 through 4 NOT 0 through 3.

  Scope (_PR)
 {
 Processor (CPU1, [b][color="#ff0000"]0x01[/color][/b], 0x00000810, 0x06) {}
 Processor (CPU2, [b][color="#ff0000"]0x02[/color][/b], 0x00000810, 0x06) {}
 Processor (CPU3, [color="#ff0000"][b]0x03[/b][/color], 0x00000810, 0x06) {}
 Processor (CPU4, [b][color="#ff0000"]0x04[/color][/b], 0x00000810, 0x06) {}

Please double check what you are doing ... we're all guilty of it but do your best to read and understand before you copy and paste!

D.

Thanks to you guy's I finally managed to get rid off those CST evaluation failed messages at boot time. Seems those are well loaded now (thanks to the dsdt of FormelyKnownAs), still it seems the speedstep is still not working. I can't check it in 64-bit mode as MSR Tools is 32-bit only. By the way, is there a 64-bit version of CPU-i? When I boot in 32-bit mode, I don't see any changes happening in MSR Tools... Does speedstep kick in immediately (I suppose it does)? What could be wrong with my setup? Mac model is set to MacPro3,1, I use PC EFI 10.5 bootloader with chameleon 2.0 rc2. I'm running 10.6.2. Temps are around 48-50� C.

I'm only using following 5 kext's in extra:

- ALC889A

- AtherosFix

- Modified fakesmc 2.0 for CPU temps

- OpenHaltRestart

- PlatformUUID

Thanks in advance for any help or suggestions. You'll find my dsdt in attachment.

It looks like you've copied my FID and VID values - is your CPU overclocked exactly the same as mine? I doubt it.

Please use voodoopstates and pstatechanger to find your FID. VID values.

Also use voodoomonitor (now back in post#1 ) rather than CPU-i (sorry can't remember if there is a 64bit voodoomonitor.)

you will only see p-states change when cpu load changes - try running cpu test.app or similar to load cpu.

D.

This is my - working - speedstep part of DSDT for e8400 on Gigabyte-Board ....

Many Thanks KWS

italy4ever · November 23, 2009

hi everybody this is my first post in this thread but after hours and hours of reading i got speedstep working on my q6600 (from voodoo monitor cpu frequency jumps from x6 to x9) but temperatures stays always around 50 C° degrees (Obviously i removed NullCpupPowermanagement.kext) Is there somenthing i can do?..sorry for my english

FKA · November 23, 2009

hi everybody this is my first post in this thread but after hours and hours of reading i got speedstep working on my q6600 (from voodoo monitor cpu frequency jumps from x6 to x9) but temperatures stays always around 50 C° degrees (Obviously i removed NullCpupPowermanagement.kext) Is there somenthing i can do?..sorry for my english

Hi italy4ever

Did you use pstatechanger to find FID and VID? - if not you should.

Is AppleLPC loading ? - if not you'll need to patch it in DSDT.

Also am I correct you are running 64bit?

In 64bit - with this DSDT fix do you still see SMC error at boot?

D.

Ace Dee · November 23, 2009

Thank you so much! I was using GenericCPUPowerManagement and it was occasionally crashing my system! I was able to see speedstep working in MSR tools (CPU-x only shows max). I was not able to get the voodoo P states stuff to work, so I used the p-states calculator.

The numbers I got (from the calculator) were very close to the ones KWS posted (I'm also on e8400, GB-board), but they are still different. Would I be better off going with those? From KWS: the value after the FID/VID (the sixth value) seems to always be ((FID/VID) + 2), whereas in your example (which I followed) the 6th values are zero, one, 0x02 (then I used 0x03 as the fourth one).

I think I might just try KWS's values and get back to ya. I also think I might try to come up with some slightly over-clocked values.

Leo 10.5.8

e8400

EP45-UD3P

etc.

FKA · November 23, 2009

Thank you so much! I was using GenericCPUPowerManagement and it was occasionally crashing my system! I was able to see speedstep working in MSR tools (CPU-x only shows max). I was not able to get the voodoo P states stuff to work, so I used the p-states calculator.

The numbers I got (from the calculator) were very close to the ones KWS posted (I'm also on e8400, GB-board), but they are still different. Would I be better off going with those? From KWS: the value after the FID/VID (the sixth value) seems to always be ((FID/VID) + 2), whereas in your example (which I followed) the 6th values are zero, one, 0x02 (then I used 0x03 as the fourth one).

I think I might just try KWS's values and get back to ya. I also think I might try to come up with some slightly over-clocked values.

Leo 10.5.8

e8400

EP45-UD3P

etc.

Hi Ace Dee

you're best of using your own values and as per 1st post your best off finding these using voodoopstates and pstateschanger.

P-state calculator will get you close bit as I understand it voodoopstates will get you closer.

italy4ever · November 23, 2009

i used pstate changer to find fid and vid values and applelpc is loading with dsdt fix i edited dsdt in a strange way here my dsdt and i don't see error on boot dsdt.dsl.zip

if you have time can you take a look at my dsdt ?

DSDT - Vanilla Speedstep - Generic Scope (_PR)

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