DSDT - Vanilla Speedstep - Generic Scope (_PR)

[mitch_de]

Thanks, I found the answer also reading to all pages here ;

Also my Pstates 6 ... 9 with 0.5 between are working !

 

What i found out is, that CST Adresses 0000814 / 000815 here found maybe 414 / 415 like the Processor Adresses 410 insted of 810).

Must be mainboard dependend. My GA-EP45-DS3 (no P, no L) has 410.

 

But i cant "see" if also C-State is working. Pstates worked with 4 Pstates and that with 0.5 too.

With voodoopower and AppleIntelCPU (each alone )

My problem was with AppleIntelCPU that the level of CPU load needed to switch faster is too high.

I want less powersaving but faster Cpu on less cpu load. Voodoopower can be configured that way be its threshoot key setting. But how can i change that level of cpu loads using AppleIntelCPU ?

 

I now disabled C-State by simple not use AppleIntelCPU and use voodoominipower again (with new 0.5 pstates)

[FKA]

Finally a question I can answer in this thread, thanks Mitch!

 

I know how you feel - ever start something and then see it run rapidly away from you!

 

D

[mitch_de]

Anyone knows dev of MSR_Tools ?

For me, MSR_Tools seems to have some timing / communication problems with his .kext.

Specially on high CPU load System freezes after short time. CPU load 100% and only cursor can be moved. Finder and all other no reaction anymore.

I ask because its the onyl tool i know which can independed of other throttling .kext show Volts.

CPU-X only shows MHz.

[xopher]

The "default" multiplier for my E8500 is 9.5 (333x9.5 = 3163)

 

The multiplier goes from 6.0 to 9.5 = 8 P-States!

The P-state calculator doesn't support fractional multipliers so I added the 4 by hand - Master Chief explained it somewhere in the thread.

 

I have 4-working p-states atm, 6.0, 7.0, 7.5 and 8.0. These are all he multipliers I have available in the BIOS. VoodooMonitor gives me only 6, 7 and 8, so I added the 7.5 by hand.

 

Now, does my BIOS know best, or can I force the 6.5 multiplier via the DSDT?

[DieBuche]

First of all, ty @ FormerlyKnownAs & Master Chief.

I followed the guide, speedstepping works...

 

But i got one question: Did anyone manage to modify their cstate tables in a way so that audio wouldn't stutter.

Right now i removed those tables. There were some posts about the cstate latency in facp.aml but i didn't understand what to do exactly.

 

I attached my current dsdt, i have no memory adresses in my ssdt for cstates

dsdt.dsl.zip

[Beerkex'd]

Try removing/modifying IRQs in TIMR, RTC, HPET and IPIC devices. It worked for me. Look up those devices in Master Chief's DSDT from the P5K Pro thread:

http://www.insanelymac.com/forum/index.php?showtopic=188920

 

Or try THe KiNG's method here:

 

http://www.projectosx.com/forum/index.php?showtopic=564

[DieBuche]

Try removing/modifying IRQs in TIMR, RTC, HPET and IPIC devices. It worked for me. Look up those devices in Master Chief's DSDT from the P5K Pro thread:

http://www.insanelymac.com/forum/index.php?showtopic=188920

 

Or try THe KiNG's method here:

 

http://www.projectosx.com/forum/index.php?showtopic=564

 

Thank you kindly for ur help, it worked!

[xopher]

Thank you kindly for ur help, it worked!

 

Just wondering, what did you do exactly? I'm having the same problem, but with video. HD-video freezes for a second, then continues normally for a while. You barely notice it, but barely isn't good enough.

[DieBuche]

Just wondering, what did you do exactly? I'm having the same problem, but with video. HD-video freezes for a second, then continues normally for a while. You barely notice it, but barely isn't good enough.

 

i attached a diff between my stuttering and non stuttering dsdt. Open it in Textmate: Green is new, red is old.

Try to add those changes to your dsdt, if it doesn't work could u post ur .dsl ?

dsdt.diff.zip

[xopher]

i attached a diff between my stuttering and non stuttering dsdt. Open it in Textmate: Green is new, red is old.

Try to add those changes to your dsdt, if it doesn't work could u post ur .dsl ?

 

I checked the site, and it seems like I already have all the fixes done, I now have made an edit to my CPU0 CST, so that it doesn't go down to the C2, C3, C4 states at all. Which appears to have fixed it. Have to revert to the old DSDT to confirm.

 

Here's my current, check it out if you like: DSDT_28.10.09_MC_cst.dsl.zip

[mm67]

I checked the site, and it seems like I already have all the fixes done, I now have made an edit to my CPU0 CST, so that it doesn't go down to the C2, C3, C4 states at all. Which appears to have fixed it. Have to revert to the old DSDT to confirm.

 

Here's my current, check it out if you like: DSDT_28.10.09_MC_cst.dsl.zip

 

So you didn't see my edit about the typo in this one Line 57 looks like this:

Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x00, 0x00, 0x00, ,)},0x01,0x9ED,0x3E8}

 

Should be like this:

Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x00, 0x00, 0x00, ,)},0x01,0x9D,0x3E8}

 

That was what made this one feel like everything was running in slow motion.

[xopher]

So you didn't see my edit about the typo in this one Line 57 looks like this:

Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x00, 0x00, 0x00, ,)},0x01,0x9ED,0x3E8}

 

Should be like this:

Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x00, 0x00, 0x00, ,)},0x01,0x9D,0x3E8}

 

That was what made this one feel like everything was running in slow motion.

 

Didn't notice that, thanks for pointing it out!

 

Edit: One more question, do you guys have different temps on different cores? My cores 3 & 4 are constantly a bit higher than 1 & 2. Eg. when 1 & 2 are at 33c, 3 & 4 are at 35c and 37c.

[DieBuche]

Didn't notice that, thanks for pointing it out!

 

Edit: One more question, do you guys have different temps on different cores? My cores 3 & 4 are constantly a bit higher than 1 & 2. Eg. when 1 & 2 are at 33c, 3 & 4 are at 35c and 37c.

 

32,27,28,30 for me, b and c are always the coolest

[mm67]

32,27,28,30 for me, b and c are always the coolest

 

Now in a warm room 36, 34, 38, 38. Same also in Windows.

[kdawg]

@FormerlyKnownAs

 

Question, when observing CPU performance with CPU-i pr VoodooMonitor how often does your CPU hit the x7.0 multiplier? I see mine hit every once and while but not as often as you'd think. Does anyone else see short hits on the "in-between" multipliers? I have three x6, x7 and x8. The x6 and x8 get 90% of the activity.

 

I'm trying to see how effective my C & P states are.

[FKA]

@FormerlyKnownAs

 

Question, when observing CPU performance with CPU-i pr VoodooMonitor how often does your CPU hit the x7.0 multiplier? I see mine hit every once and while but not as often as you'd think. Does anyone else see short hits on the "in-between" multipliers? I have three x6, x7 and x8. The x6 and x8 get 90% of the activity.

 

I'm trying to see how effective my C & P states are.

 

It depends obviously on activity - but I agree with your findings, I spend most time at 6x or 8x (I have 6x, 7x, 8x)

 

D.

[DieBuche]

@FormerlyKnownAs

 

Question, when observing CPU performance with CPU-i pr VoodooMonitor how often does your CPU hit the x7.0 multiplier? I see mine hit every once and while but not as often as you'd think. Does anyone else see short hits on the "in-between" multipliers? I have three x6, x7 and x8. The x6 and x8 get 90% of the activity.

 

I'm trying to see how effective my C & P states are.

 

Same here: i got 6,7,8,9 but most the time it's either 6 or 9 , never 7 or 8 for more than a second

[mm67]

Same here: i got 6,7,8,9 but most the time it's either 6 or 9 , never 7 or 8 for more than a second

 

Just checking what happens on Windows, Gigabyte naturally has only 2 steps in PSS so that's it for steps, but voltages go through the whole scale exactly same way as in OS X. My MSI board has 5 steps in factory PSS, but it seems to be doing exactly the same as Gigabyte, uses only the max and min values for stepping but voltages go through the whole scale. Maybe it doesn't really matter if you have 2 steps or 6 steps or whatever.

[Master Chief]

Just checking what happens on Windows, Gigabyte naturally has only 2 steps in PSS so that's it for steps, but voltages go through the whole scale exactly same way as in OS X. My MSI board has 5 steps in factory PSS, but it seems to be doing exactly the same as Gigabyte, uses only the max and min values for stepping but voltages go through the whole scale. Maybe it doesn't really matter if you have 2 steps or 6 steps or whatever.

What that tells me is that it ain't working for you. Not properly at least. Here all P-States are used. And I bet that you see all cores step up/down simultaneously. Right?

 

You should see changes in: Frequency, multiplier, voltage and temperature. And all per core, not simultaneously!

 

Note: The native Intel SpeedStep Technology uses only the lowest and highest multipliers. Not seeing the P-States in between, with a customized _PSS object, usually means that your P-State (latency) values are either invalid or dead wrong.

[mm67]

What that tells me is that it ain't working for you. Not properly at least. Here all P-States are used. And I bet that you see all cores step up/down simultaneously. Right?

 

You should see changes in: Frequency, multiplier, voltage and temperature. And all per core, not simultaneously!

 

Note: The native Intel SpeedStep Technology uses only the lowest and highest multipliers. Not seeing the P-States in between, with a customized _PSS object, usually means that your P-State (latency) values are either invalid or dead wrong.

 

I do have all P-states working on OS X, and cores are working independently. It's just that most of the times it's only the lowest and highest steps that are used.

[kdawg]

I do have all P-states working on OS X, and cores are working independently. It's just that most of the times it's only the lowest and highest steps that are used.

 

By independently you mean each core at a different voltage and multiplier?

 

Update: I retract that. Just read MC's thread.

[Matthew L.]

I do have all P-states working on OS X, and cores are working independently. It's just that most of the times it's only the lowest and highest steps that are used.

 

Uh-oh. Something must be wrong at me, can you please upload your DSDT? (My cpu's cores always change states simultaneously, and really often.)

Stupid speedstep jumps up and down while just browsing the web (no flash content) with playing music and downloading torrents in the background.

[mm67]

Uh-oh. Something must be wrong at me, can you please upload your DSDT? (My cpu's cores always change states simultaneously, and really often.)

Stupid speedstep jumps up and down while just browsing the web (no flash content) with playing music and downloading torrents in the background.

 

You can take my dsdt from Gigabyte thread, on both both my systems it is pretty much only voltages that change until cpu load is about 10 %, then also the multipliers start changing, I'd say that 99 % of time voltages and multipliers change at same time on all cores.

[Matthew L.]

You can take my dsdt from Gigabyte thread, on both both my systems it is pretty much only voltages that change until cpu load is about 10 %, then also the multipliers start changing, I'd say that 99 % of time voltages and multipliers change at same time on all cores.

Ok then, I was starting to think that I was torturing my CPU for days... BTW, is there any good explanation for the bold part? It's strange, but does happen with mine too. (How come it doesn't hurt the CPU if it changes voltages for nothing so often?)

[FKA]

What that tells me is that it ain't working for you. Not properly at least. Here all P-States are used. And I bet that you see all cores step up/down simultaneously. Right?

 

You should see changes in: Frequency, multiplier, voltage and temperature. And all per core, not simultaneously!

 

Note: The native Intel SpeedStep Technology uses only the lowest and highest multipliers. Not seeing the P-States in between, with a customized _PSS object, usually means that your P-State (latency) values are either invalid or dead wrong.

 

What's actually being talked about here is what mitch_de has been asking about for the last week or so !

 

It's the threashold (or cpu load) at which the cpu is stepped up.

 

We obviously have a very low threashold/ cpu load at which the cpu is stepped up to max multi.

 

You can see each step - or multi being used - but 90% or the time we're in the lowest or highest multi

.... i.e. we're either loading the cpu or we're not - effectively giving us an i/o (on or off) situation with regards to stepping rather than graduated steps!

 

I'm not too bothered about this as I'm just happy to make a power saving when my PC is idle.

 

The question for others (mitch_de's question) is how can that threashold be changed?

 

D.