DSDT - Vanilla Speedstep - Generic Scope (_PR)

mm67 · September 27, 2009

Yes, they go up and down. Also my temps fell down from 55 to about 40.

Master Chief · September 27, 2009

Does this mean that speedstep is working ?

Apparently, that is if your CPU frequency, multiplier and voltage change (go up/down).

Master Chief · September 27, 2009

For smbios injection I have currently applesmbiosefi kext although I'm trying my system now without it and using a smbios.plist instead. I'm looking now for a template file so that I can create my own.

Is creating a smbios.plist the correct way to change your model ID? I want to try different model ID's to see if they hold the key to unlocking this mystery.

If you are using Chameleon v2 RC3, then yes.

I myself can't use it, because of the for mentioned bug in Chameleon, and thus I am looking for a stand-alone injector to kick SMBIOS values.

Yes, they go up and down. Also my temps fell down from 55 to about 40.

You sir (?) hit the jackpot.

mm67 · September 27, 2009

This is my dsdt.dsl for EP45-UD3 bios version F9a. All the modifications I made for speedstep are right at the beginning of file.

I am using Q9550 and C1, C2 and C4 are set to enabled in bios.

dsdt.dsl.zip

Beerkex'd · September 27, 2009

For smbios injection I have currently applesmbiosefi kext although I'm trying my system now without it and using a smbios.plist instead. I'm looking now for a template file so that I can create my own.
Is creating a smbios.plist the correct way to change your model ID?

Yes.

Go back in the thread a little bit, and see my iMac9,1 smbios.plist as an example.

It's missing the memory and FSB parts though so look elsewhere for those. There are plenty of them around.

mm67 · September 27, 2009

Tested some more and this seems to be all I need for speedstep:

    Scope (\)
   {
       Name (CFGD, 0x040383F2)
       Name (PDC0, 0x80000000)
   }

   Scope (_PR.CPU0)
   {
               Method (_CST, 0, NotSerialized)
           {
               If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
                   ))))
               {
                   Return (Package (0x02)
                   {
                       One, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x00,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           0x9D, 
                           0x03E8
                       }
                   })
               }

               If (And (PDC0, 0x0300))
               {
                   If (And (CFGD, 0x20))
                   {
                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       ,)
                               }, 

                               One, 
                               One, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000010, // Address
                                       ,)
                               }, 

                               0x02, 
                               One, 
                               0x01F4
                           }
                       })
                   }
               }

               If (And (CFGD, 0x20))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x000000000000000C, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }
               })
           }
}

   Scope (_PR.CPU1)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

   Scope (_PR.CPU2)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

   Scope (_PR.CPU3)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

First lines are from my own SSDT dump and the rest is from Macpro 3.1 SSDT dump

FKA · September 27, 2009

Tested some more and this seems to be all I need for speedstep:

This is interesting - so you have no _ist tables at all in your DSDT apart from the IST memory address!

I've got a nVidia GPU working with DSDT injection (9500 GT 1GB.) now so I'm about to delve into Snow Leo for keeps tomorrow but i'll give this a go.

I'm guessing but by the looks of CPUi you have some sensible looking p-states active.

D.

FKA · September 27, 2009

Tested some more and this seems to be all I need for speedstep:

    Scope (\)
   {
       Name (CFGD, 0x040383F2)
       Name (PDC0, 0x80000000)
   }

   Scope (_PR.CPU0)
   {
               Method (_CST, 0, NotSerialized)
           {
               If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
                   ))))
               {
                   Return (Package (0x02)
                   {
                       One, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x00,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           0x9D, 
                           0x03E8
                       }
                   })
               }

               If (And (PDC0, 0x0300))
               {
                   If (And (CFGD, 0x20))
                   {
                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       ,)
                               }, 

                               One, 
                               One, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000010, // Address
                                       ,)
                               }, 

                               0x02, 
                               One, 
                               0x01F4
                           }
                       })
                   }
               }

               If (And (CFGD, 0x20))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x000000000000000C, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }
               })
           }
}

   Scope (_PR.CPU1)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

   Scope (_PR.CPU2)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

   Scope (_PR.CPU3)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

First lines are from my own SSDT dump and the rest is from Macpro 3.1 SSDT dump

Your correct! this works for me too.

DSDT.dsl.zip

Top work!

EDIT -- I'm not 100% sure this is working - CPUi shows 3 p-states, it clocks up to 8x running cpu test but doesn't show the CPU clock back down until quit and restarted. this wouldn't bother me too much as CPUi is sometimes slow to react with my PSS data in DSDT - However MSR usually shows correct info when CPUi hasn't yet 'caught up'.

With the above in my DSDT both CPUi and MSR tools show the CPU go from 6x to 8x under stress but both indicate it stays at x8.

Any body else add to this ??

D.

thestevo · September 28, 2009

Hey guys,

I just wanted to post back to say I got P-States working on a Dell Latitude D830. My problem was the PLimit entry in ACPI_SMC_PlatformPlugin.kext. However, I also figured out that Dells have some REALLY messed up _PSS tables for T9300s. Two of the six entries are completely wrong. More details are on my blog (linked in my signature).

theStevo

keeza · September 28, 2009

Finally, a breakthrough!

P-States, C-States, temps at 36-39 degrees at idle.

All 6 P-States working!

LPC loading.

No edits to ACPI_SMC

MacPro3,1

Master Chief · September 28, 2009

Tested some more and this seems to be all I need for speedstep:

    Scope (\)
   {
       Name (CFGD, 0x040383F2)
       Name (PDC0, 0x80000000)
   }

   Scope (_PR.CPU0)
   {
               Method (_CST, 0, NotSerialized)
           {
               If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
                   ))))
               {
                   Return (Package (0x02)
                   {
                       One, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x00,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           0x9D, 
                           0x03E8
                       }
                   })
               }

               If (And (PDC0, 0x0300))
               {
                   If (And (CFGD, 0x20))
                   {
                       Return (Package (0x03)
                       {
                           0x02, 
                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000000, // Address
                                       ,)
                               }, 

                               One, 
                               One, 
                               0x03E8
                           }, 

                           Package (0x04)
                           {
                               ResourceTemplate ()
                               {
                                   Register (FFixedHW, 
                                       0x01,               // Bit Width
                                       0x02,               // Bit Offset
                                       0x0000000000000010, // Address
                                       ,)
                               }, 

                               0x02, 
                               One, 
                               0x01F4
                           }
                       })
                   }
               }

               If (And (CFGD, 0x20))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   ,)
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x000000000000000C, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }
               })
           }
}

   Scope (_PR.CPU1)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

   Scope (_PR.CPU2)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

   Scope (_PR.CPU3)
   {
           Method (_CST, 0, NotSerialized)
           {
               Return (^^CPU0._CST ())
           }
   }

First lines are from my own SSDT dump and the rest is from Macpro 3.1 SSDT dump

You don't even need that. Only a matching model identifier. See also post #67 (Sep 8 2009, 12:34 AM). However, adding a _CST object takes care of the error, which basically prevented the kext from getting properly initialized and that's why we got the error.

Brett Whinnen · September 28, 2009

Finally, a breakthrough!

P-States, C-States, temps at 36-39 degrees at idle.

All 6 P-States working!

LPC loading.

No edits to ACPI_SMC

MacPro3,1

And what was the difference that enabled all this

keeza · September 28, 2009

And what was the difference that enabled all this

Basically I used parts from a MacPro3,1 dump and combined it with sections from my original dump.

Compiled it and to my surprise, no errors.

Dropped the resulting aml file into root, rebooted.

Voilla!

I was very surprised it worked actually as I was hesitant to use the MacPro dumps because I had all the dumps required and my mindset was that the dumps should come from the machine itself.

Temps seem to be nice and stable. Got up to 45 degrees whilst carbon copying but sitting at 34 degrees idle.

Brett Whinnen · September 28, 2009

Basically I used parts from a MacPro3,1 dump and combined it with sections from my original dump.

Compiled it and to my surprise, no errors.

Dropped the resulting aml file into root, rebooted.

Voilla!

I was very surprised it worked actually as I was hesitant to use the MacPro dumps because I had all the dumps required and my mindset was that the dumps should come from the machine itself.

Temps seem to be nice and stable. Got up to 45 degrees whilst carbon copying but sitting at 34 degrees idle.

Very interesting. I would love to have a peek at your DSDT if at all possible, or to know which parts you put in where, and did you change the CFGD address at all from the standard one dumped from your SSDT?

I've currently got pretty much my entire SSDT in there, but am still getting the following error:

ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized

Also no CSTInfo under IORegistryExplorer. However I am getting idle temps of around 37 - 38*C with full speedstepping (both FID and VID change as per the _PSS values).

My next step was to integrate the _CST method from the MacPro3,1 back into my current DSDT and see where that went, however the SystemIO values all differ between mine and the MacPro3,1 which is why I am interested to see which bits were different from yours.

Thanks in advance and congrats on PST/CST nirvana.

Brett

keeza · September 28, 2009

Very interesting. I would love to have a peek at your DSDT if at all possible, or to know which parts you put in where, and did you change the CFGD address at all from the standard one dumped from your SSDT?

Of course! Please find attached below. No responsibility though if it blows up your pc and ends up in my back yard

I've currently got pretty much my entire SSDT in there, but am still getting the following error:

ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized

My Model ID is MacPro3,1, didnt work with 2,1.

Have you identified your LPC device and made the changes to it according to Beerkexd previous post?

I cant check for errors yet because if I boot in verbose I get a KP relating to AppleintelPM - I suspect this relates to a chameleon issue not loading my aml file which contains the disabler fix. But I do have CSTinfo in ioreg so thats a good sign at least.

Do you have disabler, nullpower, VooDoopower installed? If so they will need to go as they interfere with speedstepping.

Also I deleted the CPUi kext and re-installed it only after I had cstateinfo showing in ioreg.

Your idles are pretty good though.

Also no CSTInfo under IORegistryExplorer. However I am getting idle temps of around 37 - 38*C with full speedstepping (both FID and VID change as per the _PSS values).

I was the same, everything appeared to work except cstates wouldn't load. I knew that because my idles were around 45 degrees.

My next step was to integrate the _CST method from the MacPro3,1 back into my current DSDT and see where that went, however the SystemIO values all differ between mine and the MacPro3,1 which is why I am interested to see which bits were different from yours.

I think it was more good luck for me than knowing what I was doing to get to this point. My IO's differ too, thats why I'm surprised it worked.

Thanks in advance and congrats on PST/CST nirvana.

I wouldn't say that yet, I'm kinda bracing myself for debugging mode and I haven't checked for any sound issues as I don't have speakers connected yet.

But if I can help ya I will.

Keeza.zip

Brett Whinnen · September 28, 2009

Of course! Please find attached below. No responsibility though if it blows up your pc and ends up in my back yard

My Model ID is MacPro3,1, didnt work with 2,1.

Have you identified your LPC device and made the changes to it according to Beerkexd previous post?

AppleLPC.kext is loading for me, you can see it below, and the deviceID of my vanilla LPC device is one that is obviously used in a MacBook of some desccription.

The PDCx and OSCx I use (similar to my BIOS) are from a MBP5,1 which is what I inject via SMBIOS.plist. The ACPI_SMC Info.plist has been modified and also left vanilla to no difference, I've even changed to a MP3,1 and left it vanilla and also modified to no avail.

I've used my _CST from my SSDT as well as the _CST from a MP3,1. I'm yet to find a SSDT containing the _CST values from a MBP5,1 which I would dearly love to find as it seems to look the closest from a DSDT / SSDT perspective.

Here is my ACPI_SMC_PlatformPlugin from IORegistry;

Plus:

bash-3.2# kextstat | grep LPC

78 0 0xffffff7f812ae000 0x3000 0x3000 com.apple.driver.AppleLPC (1.4.6) <9 5 4 3>

I cant check for errors yet because if I boot in verbose I get a KP relating to AppleintelPM - I suspect this relates to a chameleon issue not loading my aml file which contains the disabler fix. But I do have CSTinfo in ioreg so thats a good sign at least.

Do you have disabler, nullpower, VooDoopower installed? If so they will need to go as they interfere with speedstepping.

Don't have any of those loaded or even installed.

Also I deleted the CPUi kext and re-installed it only after I had cstateinfo showing in ioreg.
Your idles are pretty good though.

I don't have a copy of CPUi that would load with 64bit Snow Kitty. So use CoolBookController (free version) to show the stepping information and core temp.

I was the same, everything appeared to work except cstates wouldn't load. I knew that because my idles were around 45 degrees.

I think it was more good luck for me than knowing what I was doing to get to this point. My IO's differ too, thats why I'm surprised it worked.

I wouldn't say that yet, I'm kinda bracing myself for debugging mode and I haven't checked for any sound issues as I don't have speakers connected yet.

But if I can help ya I will.

I've noticed that you aren't loading CST0 into HC0 but load the others (e.g. CST1 into HC1) in your DSDT.

Thanks for the help And I don't think my laptop will end up in your backyard unless the East Australian Current brings it down to you, (yes a Finding Nemo joke).

I know I'm close, just don't understand enough to get that final step!

Thanks,

Brett

spanakorizo · September 28, 2009

PROBLEM: Sound stuttering when cpu usage is low. I think it's because Speed step keeps on switching too frequently. Loading the CPU fixes the issue but CPU temps rise.

Tried to fix issue as follows:

Disabled speedstep and C1E in BIOS, CPU idles at 36C, speedstep stops, sound still stutters.

Removed SSDT from DSDT, and surprisingly speed step still works but I still have the same sound issue.

PLEASE HELP!!!

same here after adding cst , someone suggested u to remove irqs

can u explain where in ssdt?

most recent dsdt.dsl (with cst added) is this:

cst2.dsl.zip

OsXsO · September 28, 2009

same here after adding cst , someone suggested u to remove irqs
can u explain where in ssdt?

most recent dsdt.dsl (with cst added) is this:

cst2.dsl.zip

i did like suggested here http://www.insanelymac.com/forum/index.php...t&p=1280228 and it worked

Search this in your dsdt

 Device (PIC)
               {
                   Name (_HID, EisaId ("PNP0000"))
                   Name (_CRS, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0020,             // Range Minimum
                           0x0020,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                       IO (Decode16,
                           0x00A0,             // Range Minimum
                           0x00A0,             // Range Maximum
                           0x00,               // Alignment
                           0x02,               // Length
                           )
                       IRQNoFlags ()
                           {2}
                   })
               }

now delete just this

 IRQNoFlags ()
                           {2}

and now check this

Device (TMR)
               {
                   Name (_HID, EisaId ("PNP0100"))
                   Name (_CRS, ResourceTemplate ()
                   {
                       IO (Decode16,
                           0x0040,             // Range Minimum
                           0x0040,             // Range Maximum
                           0x00,               // Alignment
                           0x04,               // Length
                           )
                       IRQNoFlags ()
                           {0}
                   })
               }

and here delete this

 IRQNoFlags ()
                           {0}

salu2

spanakorizo · September 28, 2009

OsXsO

that was easy thank you for the fast reply!

compiling/restart and i'll post results

oldnapalm · September 28, 2009

You don't even need that. Only a matching model identifier. See also post #67 (Sep 8 2009, 12:34 AM). However, adding a _CST object takes care of the error, which basically prevented the kext from getting properly initialized and that's why we got the error.

Could you please detail your procedure? Where in System Profiler it shows "P5K PRO", and which "MacPro3,1" occurrences you have to change in /System/Library/Extensions/IOPlatformPluginFamily.kext/Contents/PlugIns/ACPI_SMC_PlatformPlugin.kext/Contents/info.plist?

I have an Asus P5E and CPU-i shows correct P-states, but SpeedStep isn't working, all cores stay always at maximum frequency/multiplier/voltage and temperatures are high (around 50º with CPU idle).

Thank you.

FKA · September 28, 2009

Could you please detail your procedure? Where in System Profiler it shows "P5K PRO", and which "MacPro3,1" occurrences you have to change in /System/Library/Extensions/IOPlatformPluginFamily.kext/Contents/PlugIns/ACPI_SMC_PlatformPlugin.kext/Contents/info.plist?
I have an Asus P5E and CPU-i shows correct P-states, but SpeedStep isn't working, all cores stay always at maximum frequency/multiplier/voltage and temperatures are high (around 50º with CPU idle).

Thank you.

Hi oldnapalm

Have a good read through the entire thread, you'll find it is quite detailed already.

D.

oldnapalm · September 28, 2009

Hi oldnapalm

Have a good read through the entire thread, you'll find it is quite detailed already.

D.

Look at the quote in my previous post, the question is to "Master Chief" as he says there is no need to add _CST for his MoBo.

FKA · September 28, 2009

Look at the quote in my previous post, the question is to "Master Chief" as he says there is no need to add _CST for his MoBo.

However, adding a _CST object takes care of the error, which basically prevented the kext from getting properly initialized and that's why we got the error.

what mm67 (or maybe Dr Hurt ... or the King ... I loose track !!) has discovered is that PSS tables are not required for p-states to work. Although I'm not sure this is 100% ok - as I seem to have too much latency without giving this info in DSDT.

As I said give the whole thread a good old read

EDIT --- as previously mentioned as MacPro3,1 is Xeon based I may hvae better results with iMac9,1 model identifyer.But as my CPU isn't native to any Mac model it might be safer to use manually added FID and VID values in DSDT ..

Dr. Hurt · September 28, 2009

I'm done patching. Now I'm running super stable with speed step fully working!!

Here's a simple summary of what I did for those who care:

+Add the _CST from a MacPro3,1 (Removes all errors at startup)

+Add an LPC device with a fake id to match Apple's LPC kext (allows me to remove the legacyLPC)

+Remove IRQs from from TMR and PIC (fixes sound stuttering)

What I didn't do is:

-Change model identifier in smbios.plist (still imac5,2)

-Edit any kext (all vanilla)

-Add SSDT tables to the DSDT (which, as I said before, is a bit surprising)

Result:

Speed Step fully working reducing both CPU frequency and voltage. CPU temp idles at 30C instead of 50C before this.

keeza · September 28, 2009

Any recommendations on a CPU monitoring utility for Snow similar to CPUi? Want to see if my stepping still works.

MSR doesn't work on my system under Snow (maybe not compatible?) I'm booting with -32 flag.

And yes, I've just updated to Snow Leopard from 10.5.8

All seems to be good except some sound assertion errors on boot which I'll look into.

man, Snow is fast!

Brett Whinem
I've noticed that you aren't loading CST0 into HC0 but load the others (e.g. CST1 into HC1) in your DSDT.

Would you care to explain where in my dsdt I could find this? Can't have that!

I know I'm close, just don't understand enough to get that final step!

I know the feeling. After a little while on SL I've noticed a few little things I need to iron out relating to my stepping.

DSDT - Vanilla Speedstep - Generic Scope (_PR)

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