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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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@ Freakyy;)

as per our IM convo

 

Niiice, hopefully I can be fast enough for you to help me out before you get weekend busy

 

Freakyyy or anyone. Please help me out here.

Hi dh.taran.

Finally, I could get time to fix your DSDT. I know, you've been waiting since almost a week!

 

Here is the entire package. You can go through the changes. The files are named appropriately for easy identification.

dh.taran_DSDT_Freaky_Chokra_edited.zip

Simply rename the modified file to DSDT.aml and place in /Extra.

 

Moreover, you cam (and should) check out my recent post @ "AnVAL - ACPI Loader, updated on 05/14/2010" boot loader thread.

Several modifications to the com.apple.Boot.plist in /Extra if incorporated, will get what you want.

Please do check the post here and make those changes. ;)

 

Regards,

Freaky Chokra :D

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Try enabling all CPU features in the BIOS - except CPU ID limit. And enable ACPI 2.0 as well.

 

I think it would be a good idea to redump the DSDT after doing that, then copy your modifications over to it.

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Ok 2 questions Beerkex, thanks for the reply first of all

 

1. How do you enable ACPI 2.0 in the bios ..gigabyte boards (P35 DS3R)?..I dont think ive seen that option anywhere in the bios...or are you talking about enabling it somewhere else...sorry n00b question.

 

 

I think it would be a good idea to redump the DSDT after doing that, then copy your modifications over to it.

 

2. Could you ellaborate on the redumping part?

 

UPDATE: Well most of the features in bios where turned off, the ones that prevent an OC...EISt driver and c1e and all..enabled everything except cpuid....HPET is enabled and set to 64 bit...but still I get the same error. Tried 32 bit too...but same error. T/Sing this is soo crazy.

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1. How do you enable ACPI 2.0 in the bios ..gigabyte boards (P35 DS3R)

It should be somewhere under Power Management settings.

post-188427-1274119347_thumb.jpg

2. Could you ellaborate on the redumping part?

After changing BIOS CPU and Power Management settings, dump/extract/get a readout of your DSDT again.

The easiest way is to dump it in Windows using Lavalys Everest, like this (see screenshots):

http://www.insanelymac.com/forum/index.php...t&p=1468558

Anyway it can't hurt starting again with a fresh DSDT, it looks like you've exhausted all other options.

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Uncorrected CPU error

Me and a friend are working on this..and seem to be doing most of it rigt, but this "uncorrected error" is driving me nuts.

Any pointers?

post-241229-1273991784_thumb.jpg

Fixed_dsdt_EDITED_01.zip

It should be somewhere under Power Management settings.

post-188427-1274119347_thumb.jpg

 

After changing BIOS CPU and Power Management settings, dump/extract/get a readout of your DSDT again.

The easiest way is to dump it in Windows using Lavalys Everest, like this (see screenshots):

http://www.insanelymac.com/forum/index.php...t&p=1468558

Anyway it can't hurt starting again with a fresh DSDT, it looks like you've exhausted all other options.

Ok 2 questions Beerkex, thanks for the reply first of all

1. How do you enable ACPI 2.0 in the bios ..gigabyte boards (P35 DS3R)?..I dont think ive seen that option anywhere in the bios...or are you talking about enabling it somewhere else...sorry n00b question.

2. Could you ellaborate on the redumping part?

UPDATE: Well most of the features in bios where turned off, the ones that prevent an OC...EISt driver and c1e and all..enabled everything except cpuid....HPET is enabled and set to 64 bit...but still I get the same error. Tried 32 bit too...but same error. T/Sing this is soo crazy.

OKAAAAAAAAYYYYYYY!!!!!!!!!!!!! To all the above Tension and Panicking! Pun unintended!

 

Finally I solved the troublesome mystery, Dear Dh.Taran and Beerkex'd!

 

dh.taran, I faced the same issue today, when I tried to push my CPU beyond! WaaaaaaY!!! Beyond limits. The digi-cam photograph that you have posted,

Same error I too faced right now before posting this. I tried and tried and confirmed with multiple DSDT Edits in SStep and Disabled SpeedStep... Disabling C1E and ThermalMonitoring in the BIOS,...............EVERYTHING!

 

It so happens that with either of the DSDT edits, If you OVERCLOCK Beyond the capacity of your motherboard,

and the CPU, even with enough cooling (which I do have- check my sig - but supposedly you don't), yet .....

The Snow Leopard Kernel will Panic Out like a Hyperventilating Schizophrenic!

 

When I reset the BIOS back to my previously acceptable OverClocking values, it booted just fine. <- see my sig!

 

Hope this may help us all (who overclock) in editing the DSDT or tweaking the mobo to get the max performance out of it, without causing Snow to Panic every 1658794311 seconds! <- just a random figure :D:)

 

I suggest either of you take up the uphill task of verifying what I just experienced,

or dh.taran you refrain from overclocking your 1.8GHz C2D to 3.01 Ghz!

Dear Dude! That's like almost 50% OverClocking!

 

Lastly, This just proves that your DSDT, which I had edited was perfectly fine, man! It's a hardware issue!

 

 

Regards,

Freaky Chokra :)

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Thanks for the input freaky. However you'll have o wait till saturday, have two more exams to go, will update you then.

 

 

@Formerly

Yes Im using the latest update

 

Will update you guys on Friday. Thx everyone.

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Hi FormerlyKnownAs,

 

 

Thanks for the wonderful guide,now I have got rid of LPC and _CST errors and also am able to activate P-States on my HP DV6114TX laptop.I eralier had 1 error and 13 warnings,read the ACPI specs,edited my DSDT and now no errors/warnings.

 

I had also referred to the Processors Data sheet.

 

I still had some doubts,

 

I found that most of the examples of _CST method in this thread have FFixedHW implementation and have asymmetric C states values for CPU0 and CPU1,is it necessary ?

because i referred to varuois examples for _CST method in the ACPI Spec guide and used similar values in _CST for both the CPUs(Single Core Duo),took C-State latency values from FACP table.

 

 

I have attached the decompiled extract for the _PR with this message.

 

 

The P-States are working perfectly but not sure of the C-States.Could somebody suggest if I implemented the logic correctly.

 

From the original DSDT,i have added:

 

_PSS

_PCT

_PSD

_CST

AND _CSD methods

 

the latency values are correct just need to check the logic.I have used both FFixedHw and SystemIO.

 

Would be really grateful.

 

 

Thanks in advance.

DSDT.zip

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Yes Dear FormerlyKnownAs.

 

10.6.3 v1.1..... <- I hope that is what you had meant.

Regards,

Freaky Chokra ;)

 

it was :D ... and no problems so far with 63bit <LOL that would be interesting> 64bit kernel ? ?

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hi guys, I have a situation. AppleLPC is loaded but I dont have "start up automatically after a power failure" under energy saver settings.

Screen%20shot%202010-05-16%20at%2011.38.33%20AM.png

Screen%20shot%202010-05-16%20at%2011.38.39%20AM.png

 

10.6.3 / quad 6600, gb p35-ds3l, F9. 8gb ddr 800. In extra I only have fakesmc and ioatafamily. voodoohda in s/l/e.

Using anval acpi loader chamaleon build http://tinyurl.com/2fuz9ux /dsdt with the regular fixes (usb, etc etc). http://www.box.net/shared/5bjxnj1x9k

ioreg: http://www.box.net/shared/chettc40b2

 

Thanks in advance for any hint guys.

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@keeza:

Well, I still dont have the damn option BUT sleep works now. Besides that line (114) I went all over your dsdt and thanks to the notes on the left I managed to apply other fixes (changing names basically (sata = ide1)...)

Thanks mate.

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K..so freaky

 

 

Well..Snow kernel doesnt like good OC's that well. I didnt OC it 50%..I just oC'd it 1.0 Ghz..well 1.114 Ghz to be exact :) . Anyways yea....I took it down 200Mhz to 2.8 Ghz, snow booted Fine without nullcpumanagement...BUT* with the dsdt for gigabyte boards (the one you edited with my sstep code), the 1700 line long one. With the "fc_modified_03" dsdt, it gets to the desktop and gives a KP, "HPET error", maybe you need to take a look at the HPET and TIMR along with the rest of the fixes in your 03 edited one.

 

So to summarize, it boots with the modified dsdt from gigabyte thread, but not with my boards dsdt (fc_03) one.

 

I'll boot into it and get all the info again, since the pstates will have changed coz we are down from 3.01 Ghz to 2.8Ghz?!?!? :P

 

Here comes another apple based weekend :(

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K..so freaky

 

 

Well..Snow kernel doesnt like good OC's that well. I didnt OC it 50%..I just oC'd it 1.0 Ghz..well 1.114 Ghz to be exact :P . Anyways yea....I took it down 200Mhz to 2.8 Ghz, snow booted Fine without nullcpumanagement...BUT* with the dsdt for gigabyte boards (the one you edited with my sstep code), the 1700 line long one. With the "fc_modified_03" dsdt, it gets to the desktop and gives a KP, "HPET error", maybe you need to take a look at the HPET and TIMR along with the rest of the fixes in your 03 edited one.

 

So to summarize, it boots with the modified dsdt from gigabyte thread, but not with my boards dsdt (fc_03) one.

 

I'll boot into it and get all the info again, since the pstates will have changed coz we are down from 3.01 Ghz to 2.8Ghz?!?!? :huh:

 

Here comes another apple based weekend :thumbsup_anim:

Oh Hell Yeah!

 

Good to know you tried out things. And well, ya not 50% OClocking, but from 1.83GHz to 3.01 is pretty much halfway there.

 

Why Do you think I'm running @ 3.51. Recently tweaked it a bit to 3.68 i.e. CPU Multiplier 11x into 333Mhz FSB. Pretty much rock solid, and stable and pretty fast too!

I wanted to GO 400MHz!!! But can't {censored} Panics like a convulsing schizophrenic!

 

I'll see what I can do… For that again, you'll need to send me the P-State screenshots.

 

Regards,

 

Freaky Chokra :P

 

hi guys, I have a situation. AppleLPC is loaded but I dont have "start up automatically after a power failure" under energy saver settings.

Screen%20shot%202010-05-16%20at%2011.38.33%20AM.png

Screen%20shot%202010-05-16%20at%2011.38.39%20AM.png

 

10.6.3 / quad 6600, gb p35-ds3l, F9. 8gb ddr 800. In extra I only have fakesmc and ioatafamily. voodoohda in s/l/e.

Using anval acpi loader chamaleon build http://tinyurl.com/2fuz9ux /dsdt with the regular fixes (usb, etc etc). http://www.box.net/shared/5bjxnj1x9k

ioreg: http://www.box.net/shared/chettc40b2

 

Thanks in advance for any hint guys.

Hi anibalin.

You should probably check the AnV latest FakemSMC.kext version 2.5 thread.

There, a certain DSDT code has to be inserted to get that particular option.

Morever, keyboard Backlight to will get Enabled with that! LOlz! I'm just waiting for my Original Wired FullSized Apple Aluminum Keyboard to "light" up my day!

 

Regards,

Freaky Chokra :ninja:

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I just obtained the DSDT using Ubuntu:

 

sudo cat /proc/acpi/dsdt > dsdt.aml

 

I can decompile the DSDT using iasl (mac os x):

 

iasl -d dsdt.aml

 

Everything works fine. I'm trying to re-compile the DSDT with no modifications.

 

iasl -ta dsdt.dsl

 

At this point, there are some errors:

 

Intel ACPI Component Architecture
ASL Optimizing Compiler version 20080926 [Oct  4 2008]
Copyright © 2000 - 2008 Intel Corporation
Supports ACPI Specification Revision 3.0a

dsdt.dsl   214:     Method (\_WAK, 1, NotSerialized)
Warning  1080 -                 ^ Reserved method must return a value (_WAK)

dsdt.dsl   277:             Store (Local0, Local0)
Error    4050 -                         ^ Method local variable is not initialized (Local0)

dsdt.dsl   282:             Store (Local0, Local0)
Error    4050 -                         ^ Method local variable is not initialized (Local0)

ASL Input:  dsdt.dsl - 5993 lines, 204254 bytes, 2553 keywords
Compilation complete. 2 Errors, 1 Warnings, 0 Remarks, 723 Optimizations

 

Any idea why does this happen?

I would be grateful for any help. Thank you!

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Any idea why does this happen?

I would be grateful for any help. Thank you!

 

You need to add this code at the end of Method_WAK

 

Return(Package(0x02){Zero, Zero})

 

Edit:

And you need to add the quotes in Scope_SI

 

	Scope (_SI)
{
	Method (_MSG, 1, NotSerialized)
	{
		Store ("Local0", Local0)			// <--Patched, added quotes.
	}

	Method (_SST, 1, NotSerialized)
	{
		Store ("Local0", Local0)			// <--Patched, added quotes.
	}
}

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Hello,

 

I have a Problem. Yesterday, i chance my E6600 to E7500. In my DSDT, the PSS I have chanced but what is with the CST Categorie ? My CPU support C1E-C4E and 6 p-states.

 

I have copy this from another DSDT

Name (CST, Package (0x04)
	{
		0x03, 
		Package (0x04)
		{
			ResourceTemplate ()
			{
				Register (FFixedHW, 
					0x01,			   // Bit Width
					0x02,			   // Bit Offset
					0x0000000000000000, // Address
					0x01,			   // Access Size
					)
			}, 

			One, 
			One, 
			0x03E8
		}, 

		Package (0x04)
		{
			ResourceTemplate ()
			{
				Register (SystemIO, 
					0x08,			   // Bit Width
					0x00,			   // Bit Offset
					0x0000000000000814, // Address
					,)
			}, 

			0x02, 
			One, 
			0x01F4
		}, 

		Package (0x04)
		{
			ResourceTemplate ()
			{
				Register (SystemIO, 
					0x08,			   // Bit Width
					0x00,			   // Bit Offset
					0x0000000000000816, // Address
					,)
			}, 

			0x03, 
			0x39, 
			0x64
		}
	})

 

IS this OK for my CPU. I will post my DSDT and my SSDT here.

 

The SSDT Tables, I have extract with Everest in Windows. I have 5 SSDT Tables, but where can I found the Addresses for the CST Part ? Or is this posted Part correct for my CPU.

 

Thanks a lot.

 

PS.: IS the PSD Part correct ?

SSDT.zip

dsdt111111.dsl.zip

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You need to add this code at the end of Method_WAK

 

Return(Package(0x02){Zero, Zero})

 

Edit:

And you need to add the quotes in Scope_SI

 

	Scope (_SI)
{
	Method (_MSG, 1, NotSerialized)
	{
		Store ("Local0", Local0)			// <--Patched, added quotes.
	}

	Method (_SST, 1, NotSerialized)
	{
		Store ("Local0", Local0)			// <--Patched, added quotes.
	}
}

Thanks, mate! I really appreciate your help!

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please can anybody help me ? I Don't want to broken my CPU ^^

 

You have CST values for C1 through C3 in the code you have posted.

Look through the thread - I think mm67 has posted code for C1 to C4 ..

 

The code you are using will not break your CPU however it would be best to find the correct latency values.

 

               },

               One,
               One, //Latency
               0x03E8 
           }, 

 

you'll need to dump FACP table to check this. See post 83 in this thread

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hi to all. my mobo is the asus p5q deluxe. My processor is the q9450. My question: is there a way for load on this mobo in osx the same table ssdt like in windows without the need of load code in dsdt table?

i use aserebln boot 1.1.9.

 

With code in dsdt the speedstep works perfectly and it has been simple. But for my question? If yes, what i can do?

 

In a simple english, please :(

 

Thank you, thank you...

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You have CST values for C1 through C3 in the code you have posted.

Look through the thread - I think mm67 has posted code for C1 to C4 ..

 

The code you are using will not break your CPU however it would be best to find the correct latency values.

 

               },

               One,
               One, //Latency
               0x03E8 
           }, 

 

you'll need to dump FACP table to check this. See post 83 in this thread

 

Thanks.

but how does I dump the FACP table from his ACPI output ? With everest and Windows ? And the Post with the C1 to C4 State, I will search ^^

 

///Edit: hm I dont found the Post with C1E - C4E :( Can anybody givré me a link :(

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