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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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Camel, works like a charm (1000 extra points w/ geekbench) and most importantly vmware fusion works again.

Before it was __extremely__ slow, guess because of a broken dsdt (wich turns to be true).

 

Now one thing that doesn't work with your dsdt is cosmetic fix internal sata drives (orange icons).

This can be fixed by adding below to device:

 

Method (_DSM, 4, NotSerialized)

{

Return (MCID (Arg2, 0x26818086))

}

 

So it looks like:

			Device (SATA)
		{
			Name (_ADR, 0x001F0002)
			Method (_DSM, 4, NotSerialized)
			{
				Return (MCID (Arg2, 0x26818086))
			}

			Device (PRT0)
			{
<...>

 

I tried to use this code in my own DSDT, but i got an error. In my case it is the Device (IDE1) and IDE2...

After compiling I got this error:

Return (MCID (Arg2, 0x26818086))

Error 4063 - Object does not exist ^ (MCID)

 

 

 

I tried another way by using this (efixusers):

FAS0,   2, 
				FAS1,   2
			}

			Method (_DSM, 4, NotSerialized)
			{
				Store (Package (0x02)
					{
						"device-id", 
						Buffer (0x04)
						{
							0x81, 0x26, 0x00, 0x00
						}
					}, Local0)
				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
				Return (Local0)
			}

			Device (PRIM)
			{
				Name (_ADR, Zero)
				Method (_GTM, 0, NotSerialized)

 

But this is not working too.

 

Error:

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Error 4067 - Object is not accessible from this scope ^ (DTGP)

 

 

 

Did anyone know how to manage this Problems?

 

 

GA-EP35C-DS3R (BIOS F4a), ICHR9

Sapphire ATI 4780, 512MB

Intel Quad 2,66GHz

4gb Corsair Dominator RAM, 800MHz

Stick: Chameleon RC4, BootEFI 10.5, own DSDT

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I tried to use this code in my own DSDT, but i got an error. In my case it is the Device (IDE1) and IDE2...

After compiling I got this error:

Return (MCID (Arg2, 0x26818086))

Error 4063 - Object does not exist ^ (MCID)

Which simply means that it isn't there, and thus you have to add it. You can find it here – see attached DSDT's.

 

 

I tried another way by using this (efixusers):... But this is not working too.

 

Error:

DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))

Error 4067 - Object is not accessible from this scope ^ (DTGP)

Which means that DTGP can't be found, and thus your copy/paste failed – you put it into the wrong spot.

 

p.s. You're better off using MCDP (see post #1169).

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Which simply means that it isn't there, and thus you have to add it. You can find it here – see attached DSDT's.

 

 

 

Which means that DTGP can't be found, and thus your copy/paste failed – you put it into the wrong spot.

 

p.s. You're better off using MCDP (see post #1169).

 

Thank you for your fast answer. I tried it many times before and I had not copy anything... :dev:

 

Now I've the following added as new Method:

	Method (MCDP, 2, NotSerialized)											  // New Method V1.1 – By Master Chief.
{
	If (LEqual (Arg0, Zero))												 // Function index: 0
	{
		Store (Buffer (One)
		{
			0x03
		}, Arg1)
	}
}

Name (IDB0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 })						// New Method V1.4 – By Master Chief.
Name (IDB1, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 })
Method (MCID, 2, NotSerialized)
{
	If (Arg1) // Either a device-id like 0x2693 or a 32-bit combo like 0x269e8086 with both a device-id and a vendor-id.
	{
		Store (And (Arg1, 0xFF), Index (IDB0, Zero))						 // 0x9e => BUF0 is now 0x9e 0x00 0x00 0x00
		Store (ShiftRight (And (Arg1, 0xFF00), 0x08), Index (IDB0, One))	 // 0x2600 => 0x26 => BUF0 is now 0x9e 0x26 0x00 0x00

		If (LEqual (And (Arg1, 0xFFFF0000), Zero))
		{
			Store (Package (0x02)
			{
				"device-id",
				IDB0														 // 0x9e 0x26 0x00 0x00
			}, Local0)
		}
		Else
		{
																			 // BUF0 is now 0x86 0x80 0x00 0x00
			ShiftRight (Arg1, 0x10, Arg1)									// 0x269e0000 => 0x269e
			Store (And (Arg1, 0xFF), Index (IDB1, Zero))					 // 0x9e => BUF1 is now 0x9e 0x00 0x00 0x00
			Store (ShiftRight (And (Arg1, 0xFF00), 0x08), Index (IDB1, One)) // 0x2600 => 0x26 => BUF1 is now 0x9e 0x26 0x00 0x00
			Store (Package (0x04)
			{
				"vendor-id",
				IDB0,														// 0x86 0x80 0x00 0x00
				"device-id",
				IDB1														 // 0x9e 0x26 0x00 0x00
			}, Local0)
		}

		MCDP (Arg0, RefOf (Local0))
		Return (Local0)
	}

	Return (Zero)
}

 

And then this to my device (IDE1)

Method (_DSM, 4, NotSerialized)
			{
				Return (MCID (Arg2, 0x26818086))
			}

 

I don't know if this is a little bit to much, but it works and my understanding in this new method is not much.

 

If there is a way to much code in it, which I don't need, it would be nice, when you'd give me a hint :D

 

Thanks again (one Problem solved :) )

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...

I don't know if this is a little bit to much, but it works and my understanding in this new method is not much.

 

If there is a way to much code in it, which I don't need, it would be nice, when you'd give me a hint :rolleyes:

 

Thanks again (one Problem solved -_- )

The idea behind method MCID was to have a much more convenient way to set/change device ID's – and name in one go if you want. Not to produce less AML code. In short; It's fine like this.

 

Thanks, it looks much nicer now but it is possible, that with your method is my CPU about 8C hotter? I don't know if it has something to do with it but it's just like that...

One word: impossible.

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Q: Can the new Method

Method ([b]MCDP[/b], 2, NotSerialized)       // New Method V1.1 – By Master Chief.
   {
       If (LEqual (Arg0, Zero))                                    // Function index: 0
       {
           Store (Buffer (One)
           {
               0x03
           }, Arg1)
       }
   }

 

simple replace my(often used) DTGP Method for injection or must i do some "special" ?

Sure, i must change the calling parameters (MCDP has much less).

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The idea behind method MCID was to have a much more convenient way to set/change device ID's – and name in one go if you want. Not to produce less AML code. In short; It's fine like this.

 

 

One word: impossible.

 

Thank you for helping me. It works very good.

 

Now I have a little Problem, which I obviously can't solve on my own.

 

For the speedstep I need the FID and VID. With VoodooMonitor it is possible to read out the data. I've got 3 Steps. The ting which I don't understand is that the CPU steps itself. For what exactly I need the vanilla speedstep?

 

To read out the data, I used PStateChanger (1.03 (1) ) but it crashes on the Info-Tab. There are no data to read out. For that i tried to use some VoodoPState.kext (For SL, V4) and the VoodooPowerMini.kext but none of them works. Even start SL in 32 or 64 Bit doesn't makes it better, PStateChanger is not working. What I am doing wrong?

 

SL 10.6.2 (Sig)

Q9450

 

I've no idea, what to do next to use PStateChanger.

 

Any idea?

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Thank you for helping me. It works very good.

 

Now I have a little Problem, which I obviously can't solve on my own.

 

For the speedstep I need the FID and VID. With VoodooMonitor it is possible to read out the data. I've got 3 Steps. The ting which I don't understand is that the CPU steps itself. For what exactly I need the vanilla speedstep?

 

To read out the data, I used PStateChanger (1.04) but it crashes on the Info-Tab. There are no data to read out. For that i tried to use some VoodoPState.kext (For SL) and the VoodooPowerMini.kext but none of them works. Even start SL in 32 or 64 Bit doesn't makes it better, PStateChanger is not working. What I am doing wrong?

 

SL 10.6.2 (Sig)

Q9450

 

I've no idea, what to do next to use PStateChanger.

 

Any idea?

 

I explained this to someone a few pages back...

 

It sounds like the kext is not loading properly. First make sure that you are putting VoodooPstate kext in the right place, in S/L/E. Then, you need to repair permissions and rebuild the mkext. The easiest way to do these things is to use Kext Utility. Get it HERE. You can simply drag the kext onto the Kext Utility icon, and it will put it in the right place, repair permissions, and clear your cache. Then just restart, and P-State Changer should work for you. When you have obtained your values, just right-click on the VoodooPstate kext in S/L/E, and move it to the trash, and restart.

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I explained this to someone a few pages back...

 

It sounds like the kext is not loading properly. First make sure that you are putting VoodooPstate kext in the right place, in S/L/E. Then, you need to repair permissions and rebuild the mkext. The easiest way to do these things is to use Kext Utility. Get it HERE. You can simply drag the kext onto the Kext Utility icon, and it will put it in the right place, repair permissions, and clear your cache. Then just restart, and P-State Changer should work for you. When you have obtained your values, just right-click on the VoodooPstate kext in S/L/E, and move it to the trash, and restart.

 

Thank you, that was really my problem. Now PStateChanger works for me.

 

EDIT:

Is it normal, that the CPU is constantly changing between lowest and highest?

1998 > 2664 >...

All 4 cores.

In Idle, during installation...

Even when I need the speed, it changes...

Temps ar between 30 and 43°C

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One word: impossible.

 

Here is a proof if u want :rolleyes:. Up-MCDP, Down-DTGP

http://www.youtube.com/watch?v=3unEzwIMVaQ

 

Only method changed, nothing else. While recording i'm hovering a dock for some value movements... Also check video description whether your method's part is correct in PX40 part.

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Here is a proof if u want :blush:. Up-MCDP, Down-DTGP

http://www.youtube.com/watch?v=3unEzwIMVaQ

 

Only method changed, nothing else. While recording i'm hovering a dock for some value movements... Also check video description whether your method's part is correct in PX40 part.

 

 

You are changing the calls to the method as well as the method, right? Like say in LPCB?

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You are changing the calls to the method as well as the method, right? Like say in LPCB?

 

LPCB-Los Pantos Colice Bept? :) But yeah i wouldn't be able to compile it... But i'm not sure if i'm changing it right:

//from this
DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
//to this
MCDP (Arg0, Arg1)

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LPCB-Los Pantos Colice Bept? ;) But yeah i wouldn't be able to compile it... But i'm not sure if i'm changing it right:

//from this
 DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
 //to this
MCDP (Arg0, Arg1)

 

This is what I used in place of the DTGP line(s).

 

MCDP (Arg2, RefOf (Local0))

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I have added the generic scope _PR to DSDT, and this code to PX40:

 

Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

 

I get this error: http://dl.dropbox.com/u/1924024/speedstep.jpg

 

nullcpupowermanagement, disabler, and sleepenabler was removed. All p-states are defined.

I need anything else in the DSDT?

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I have added the generic scope _PR to DSDT, and this code to PX40:

 

Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

 

I get this error (nullcpupowermanagement, disabler, and sleepenabler was removed): http://dl.dropbox.com/u/1924024/speedstep.jpg

 

All p-states are defined.

I need anything else in the DSDT?

 

You need the HPET fix what does yours look like this is mine. BTW you should make a signature so we can see what hardware you have and post your DSDT file.

 

				 Device (HPET)
			 {
				 Name (_HID, EisaId ("PNP0103"))
				 Name (ATT3, ResourceTemplate ()
				 {
					 IRQNoFlags ()
						 {0}
					 IRQNoFlags ()
						 {8}
					 Memory32Fixed (ReadWrite,
						 0xFED00000,		 // Address Base
						 0x00000400,		 // Address Length
						 )
				 })
				 Method (_STA, 0, NotSerialized)
				 {
					 Return (0x0F)
				 }

				 Method (_CRS, 0, NotSerialized)
				 {
					 Return (ATT3)
				 }
			 }

 

And if you have a Gigabyte board since seeing the RTC device right below this when copying and pasting you want it fixed to prevent the reset BIOS bug the 0x02 change.

 

				 Device (RTC)
			 {
				 Name (_HID, EisaId ("PNP0B00"))
				 Name (_CRS, ResourceTemplate ()
				 {
					 IO (Decode16,
						 0x0070,			 // Range Minimum
						 0x0070,			 // Range Maximum
						 0x00,			   // Alignment
						 0x02,			   // Length
						 )
				 })
			 }

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can someone please post his DSDT speedstep part with a q6600 and an intel ep45 chipset ?

 

can´t get the pstatechanger to work !

it´s just black and crash after a few seconds.

 

Here is mine from my main machine EP45-DS3R board if you can't see the sig. Did you install the VoodooPState.kext to enable you to get the readings?

 

	   Scope (_PR)
   {
	   Name (PSS, Package (0x04)
	   {
			   Package (0x06) { 3150, Zero, 10, 10, 0x91F, Zero }, // Q6600 4 steps
			   Package (0x06) { 2800, Zero, 10, 10, 0x81D, One },
			   Package (0x06) { 2450, Zero, 10, 10, 0x71A, 0x02 },
			   Package (0x06) { 2100, Zero, 10, 10, 0x617, 0x03 },
	   })

	   Name (PSD, Package (0x05)
	   {
		   0x05,Zero,Zero,0xFC,0x04 // The last value should equal the number of CPU
	   })
	   Name (CST, Package (0x02) // 1 cstate
	   {
		   One,
		   Package (0x04){ResourceTemplate (){Register (FFixedHW,0x01,0x02,0x0000000000000000,0x00,)},One,One,0x03E8},
	   })

	   Processor (CPU0, 0x00, 0x00000410, 0x06) 
	   {
		   Alias (PSS, _PSS)
		   Alias (PSD, _PSD)
		   Alias (CST, _CST)
	   }

	   Processor (CPU1, 0x01, 0x00000410, 0x06) 
	   {
		   Alias (PSS, _PSS)
		   Alias (PSD, _PSD)
		   Alias (CST, _CST)
	   }

	   Processor (CPU2, 0x02, 0x00000410, 0x06)
	   {
		   Alias (PSS, _PSS)
		   Alias (PSD, _PSD)
		   Alias (CST, _CST)
	   }

	   Processor (CPU3, 0x03, 0x00000410, 0x06)
	   {
		   Alias (PSS, _PSS)
		   Alias (PSD, _PSD)
		   Alias (CST, _CST)
	   }
   } // end Scope(_PR)

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Simple (BASIC) question:

 

How do I know how many p-states my processor supports?

 

 

This guide assumes you are already experienced in editing DSDT files.

Please DO NOT post full DSDT files in a code box. Please Post DSDT.dsl.zip files

You will firstly have to have extracted your DSDT.aml. This can be done with fassl's DSDT patcher or koalala's ACPI patcher.

 

Once you have extracted your DSDT.aml file you must decompile the file using IASLME. mitch_de has the most up to date version available here.

 

Now looking at your DSDT.dsl file we're going to edit the CPU part of 'Scope (PR)' which, unedited should look something like:

 

{
   Scope (_PR)
   {
       Processor (CPU0, 0x00, 0x00000[color="#000000"]410[/color], 0x06) {}
       Processor (CPU1, 0x01, 0x00000[color="#000000"]410[/color], 0x06) {}
       Processor (CPU2, 0x02, 0x00000[color="#000000"]410[/color], 0x06) {}
       Processor (CPU3, 0x03, 0x00000[color="#000000"]410[/color], 0x06) {}
   }

/////// below removed 

 

Note this is not a simple cut and paste job you are going to have to spend some time working out some of the data that's to be includeded in the P and C state code.

 

Ok - to the above code we will add this:

Note: Do Not copy and paste from the code box. This code is attached as a text file at the end of the post.

 

    Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x0[b][color="#ff0000"]R[/color][/b])
           {
               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x[b][color="#ff0000"]SSSS[/color][/b], //FId/VID of p-state 0 (HIGHEST P-state)
                   Zero     //  p-state 0
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x[b][color="#ff0000"]SSSS[/color][/b],  // FID/VID for p-state 1
                   One        // p-state 1
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x10, 
                   0x10, 
                   0x[b][color="#ff0000"]SSSS[/color][/b], // FID/VID 
                   0x02     //p-state 2
               }
           })
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (Package (0x05)
           {
               0x05, 
               Zero, 
               Zero, 
               0xFC, 
               0x04
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
   }

   Scope (_PR.CPU1)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   Zero, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   One, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x55, 
                   0xFA
               }
           })
       }
   }

   [color="#00ff00"]Scope (_PR.CPU2)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }[/color]

 

Obviously the above is for a quad core CPU with 3 p-states defined.

For a Dual core CPu you would need to remove the section highlighted in green.

 

You may also have to define more than 3 p-states but we'll get to that shortly.

 

You will see there are various values highlighted in red.

Firstly - R

 

R needs to be replaced with the number of p-states you have defined so in this case 3 p-states are defined so R would be replaced with 3, with 4 p-states defined R is repaced with 4 and so on.

 

The values represented above by S are a combination of FID and VID. There is a good explanation of FID and VID values here .

For ease we'll find these values using voodoopstate.kext and pstatechanger both linked at the end of this post.

Install the kext reboot and run pstatechanger,

post-275122-1258561690_thumb.png

You can see I have 3 p-states, you may have more. So from this you can see for my 0 p-state I should have a FID of 08 and a VID of 20.

Adding this to the Mehtod _PSS partf of the code like so:

    Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x03)
           {
               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0820, 
                   Zero
               }, 

 

Repeat for each p-state, so again in my case I end up with:

    Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x03)
           {
               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0820, 
                   Zero
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x071B, 
                   One
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0616, 
                   0x02
               }
           })
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (Package (0x05)
           {
               0x05, 
               Zero, 
               Zero, 
               0xFC, 
               0x04
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
   }

   Scope (_PR.CPU1)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   Zero, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   One, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x55, 
                   0xFA
               }
           })
       }
   }

   Scope (_PR.CPU2)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

 

This code can now be added to your DSDT.dsl file, placed under your CPU part of Scope (_PR) like so:

 *     Compiler Version 0x20091112 (537465106)
*/
DefinitionBlock ("/Users/Dave/Desktop/DSDT.aml", "DSDT", 1, "GBT   ", "GBTUACPI", 0x00001000)
{
   Scope (_PR)
   {
       Processor (CPU0, 0x00, 0x00000410, 0x06) {}
       Processor (CPU1, 0x01, 0x00000410, 0x06) {}
       Processor (CPU2, 0x02, 0x00000410, 0x06) {}
       Processor (CPU3, 0x03, 0x00000410, 0x06) {}
   }

   Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x03)
           {
               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0820, 
                   Zero
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x071B, 
                   One
               }, 

               Package (0x06)
               {
                   Zero, 
                   Zero, 
                   0x0A, 
                   0x0A, 
                   0x0616, 
                   0x02
               }
           })
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (Package (0x05)
           {
               0x05, 
               Zero, 
               Zero, 
               0xFC, 
               0x04
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
   }

   Scope (_PR.CPU1)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   Zero, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   One, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x55, 
                   0xFA
               }
           })
       }
   }

   Scope (_PR.CPU2)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }

       Method (_PSD, 0, NotSerialized)
       {
           Return (^^CPU0._PSD ())
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Name (_S0, Package (0x04)
   {
       Zero, 
       Zero, 
       Zero, 
       Zero
   })
   Name (SS1, Package (0x04)
// rest of DSDT removed

 

Now if in ioreg you DO NOT see AppleLPC then you will nedd to also patch this decive.

Run lspci Tools and look for ISA device - something like:

00:1f.0 ISA bridge [0601]: Intel Corporation Unknown device [8086:3a16]

 

You can see in red the memory address in this case (and I think most cases.) is 001F0000.

Search your DSDT for 001F0000 to find the device. For my GigaByte MB this is a device PX40. For ease I have renamed the device LPCB - remember to change all instances of PX40 to LPCB.

 

So using zhell's DSDT device id trick you can add any device id that exists in the AppleLPC.kext plist. Probably best to go for an id closest to you actual device id. (in this case MB device id is [8086:3a16] so form the AppleLPC.kext there is device id 3A18 so my Device (LPCB) formerly PX40 now looks like this:

            Device (LPCB)
           {
               Name (_ADR, 0x001F0000)
               Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

               OperationRegion (PREV, PCI_Config, 0x08, One)
               Scope (\)
               {
                   Field (\_SB.PCI0.LPCB.PREV, ByteAcc, NoLock, Preserve)
                   {
                       REV0,   8
                   }
               }

               OperationRegion (PIRQ, PCI_Config, 0x60, 0x04)
               Scope (\)
               {
// remainder removed

 

Recomplile the DSDT.dsl to DSDT.aml using IASLME - fingers crossed no errors - and your done!

 

Please NOTE: AppleLPC.kext will give you the 'Automatic restart after power failure' option in power savings. This option needs to be checked for sleep!

This works for me with the model identifyer set to MacPro3,1 and MacPro4,1. If you want to use a none native model identifyer then you'll need to use Master Chiefs Legacy SMC kext that can be found in post #381 here You will need to edit the plist adding your custom model identifyer.

 

You DO NOT need to add dropSSDT=y as boot argument and or change acpi_smc_platformplugin.kext

 

No need for disabler and don't forget to remove the voodoopstate.kext.

This will give vanilla stepping and remove any _cst evaluation errors at boot. and may (if you're lucky.) enable c-states

 

Here is the generic Scope (_PR) GenericScopePR.zip

And here is my DSDT17_11_09.zip for reference.

 

PStateChangerv1.0.3__1_.zip

voodoopstate.v4.zip

Voodoomonitor

 

Further reading:

zhell's DSDT Trick

mackerintel chameleon with DSDT override

fassl DSDT patcher

koalala ACPI patcher

ab__73's chameleon bootloader SSDT and DSDT override

EVO's DSDT - Very useful nOOb DSDT tool !

www.acpi.info/DOWNLOADS/ACPIspec40.pdf

 

Credit to mm67 and Master Chief for the generic Scope (_PR)

bcc9 and hnak for Voodoopstate.kext

and to kdawg, beerkex'd, keeza, THe KiNG ... ALL who've help out on this in one way or another - too many to mention.

 

Enjoy ;)

 

D.

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Thank you for the quick reply, MacUser2525

 

i try to paste your cpu part into my DSDT (should wort in theory, i have exactly the same board (BIOS rev. 11e))

and delete appleintelcpupowermanagement and sleepenabler.

but at restart i get this kernel panic:

img0142ht.jpg

 

 

 

i copy VoodooPState.kext to chameleons extensions folder.

maybe it has to be placed in osx extension folder...

 

 

@ Nihilator

 

easily run VoodooPStatechanger, should look like this:

post-275122-1258561690_thumb.png

and count the p-states

 

note: p-state 0 is a p-state, too !!!

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Hello,

 

I would like to know if you can help me to sort my DSDT.aml out of my Motherboard GIGABYTE P55 UD6, because it's very different of all models and guides that I've found. I've made some fix in the DSDT following one guide de tonymacx86's P55 Hackintosh Blog, but with the speedstep is very difficult for me. I'm beginner.

 

Regards from Spain!

 

 

http://www.mediafire.com/?r5nzij1ldhe DSDT.aml.zip

 

Gigabyte P55 UD6 -1156

i7 860 2.80 GHZ

9500 GT

Corsair 4Gb 1600MHZ DDR3

SNOW 10.6.2

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Thank you for the quick reply, MacUser2525

 

i try to paste your cpu part into my DSDT (should wort in theory, i have exactly the same board (BIOS rev. 11e))

and delete appleintelcpupowermanagement and sleepenabler.

but at restart i get this kernel panic:

 

Looks like you don't have the HPET fix here is what that looks like in mine and I have included the RTC fix as well in case you have not done that yet you need to change the length from 0x04 to 0x02 for that one.

 

				   Device (HPET)
			   {
				   Name (_HID, EisaId ("PNP0103"))
				   Name (ATT3, ResourceTemplate ()
				   {
					   IRQNoFlags ()
						   {0}
					   IRQNoFlags ()
						   {8}
					   Memory32Fixed (ReadWrite,
						   0xFED00000,		 // Address Base
						   0x00000400,		 // Address Length
						   )
				   })
				   Method (_STA, 0, NotSerialized)
				   {
					   Return (0x0F)
				   }

				   Method (_CRS, 0, NotSerialized)
				   {
					   Return (ATT3)
				   }
			   }

			   Device (RTC)
			   {
				   Name (_HID, EisaId ("PNP0B00"))
				   Name (_CRS, ResourceTemplate ()
				   {
					   IO (Decode16,
						   0x0070,			 // Range Minimum
						   0x0070,			 // Range Maximum
						   0x00,			   // Alignment
						   0x02,			   // Length
						   )
				   })
			   }

 

i copy VoodooPState.kext to chameleons extensions folder.

maybe it has to be placed in osx extension folder...

 

It worked for me in the /Extra/Extensions folder you need to be sure to rebuild the Extensions.mkext to have it load. Here is a little script I made to make it easier for me.

 

   MacUser2525s-Mac-Pro:~ MacUser2525$ cat ~/Bin/rebuild_extra_mkext.sh 
  #!/bin/bash
  kextcache -v 1 -t -m /Volumes/$1/Extra/Extensions.mkext /Volumes/$1/Extra/Extensions/

 

Once having created it and using chmod +x to make it executable you use /path/to/rebuild_extra_mkext.sh Your_Install_Volume_Name in Terminal to have it rebuild it.

 

@ Nihilator

 

easily run VoodooPStatechanger, should look like this:

post-275122-1258561690_thumb.png

and count the p-states

 

note: p-state 0 is a p-state, too !!!

 

It is the first full power/speed state ie. your machine running full on without speed step being used.

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Guys,

 

I do not usually ask for help because I try to solve thing by myself, but in this case I do not have choice. I spent last two weeks trying to make my rig to "hibernate" or "deep sleep". I do not care about sleep. But it is impossible, at least for me to do it alone.

 

I modified my DSDT with explained here and other USB fixes that may prevent sleep, without success. An improvement happened, that is when I deep sleep SL, fans and hard disk fully shutdown and power button flashes. If I press any key, mouse or PB again, it seems to wake, but display is black and I can not connect using VNC anyway.

 

Mobo is a Foxconn P35 DELL Vostro 200, with almost no options to change.

 

I have installed SL 10.6.2, Chameleon RC4 and kexts in Extra are the following:

  • AtherosFix
  • fakesmc
  • IOATAFamily
  • OpenHaltRestart

 

System Info:

ProductName: Mac OS X ProductVersion: 10.6.2 BuildVersion: 10C540

Kernel: Darwin Kernel Version 10.2.0: Tue Nov 3 10:35:19 PST 2009

Bootargs: boot-uuid=F2D1BC5B-6CA6-39D2-8637-5F89B9F43D28 rd=*uuid VideoROM=NVIDIA.ROM

Model ID: iMac8,1

CPU Signature: Ox10676 (67190)

CPU TYPE: Intel® Core2 Duo CPU E8400 @ 3.00GHz

Core: 2992(2992) MHz x 9.0(9.0) Bus: 332 MHz FSB: 1328 MHz

Cache L2: 6 Mb

RAM: 4096 Mb

SwapUsage: total = 64.00M used = 0.00M free = 64.00M

HibernateMode: 0

 

SleepEnabler has no effect. DSDT.dsl attached.

 

Thanks to anyone who can help.

dsdt_javimdq.dsl.zip

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