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DSDT - Vanilla Speedstep - Generic Scope (_PR)

FKA

By FKA,
in Power Management

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FKA
FKA
Posted
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Posted
Ok, but from voodoopower i see that the possible values of p-state are 4, in fact the multiplier: 6, 6.5, 7, 7.5

 

This code with my pstate is correct or not?

 

Yes it looks fine..

 

If it doesn't work with 4 p-states then try with 3.

 

I'm pretty sure the Q9000 series only supports 3 states! - when I've tried to add 4 or 5 p-states I have the same problem where the CPU stays at Max multi.

 

D.

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mcsmart
mcsmart
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Posted

@FormerlyKnownAs: Thanks for your hint from post #673. Getting rid of all of the SSDT stuff is a relief and AppleIntelCPUPM still loads correctly. My P-states still show up in IORegistryExplorer :D

 

Unfortunately SpeedStep is still not working.

 

I'm pretty sure the Q9000 series only supports 3 states! - when I've tried to add 4 or 5 p-states I have the same problem where the CPU stays at Max multi.

I think my CPU really has four P-states:

  • Multiplier 6x (2GHz)
  • Multiplier 7x (2,3GHz)
  • Multiplier 8x (2,6GHz)
  • Multiplier 9x (3GHz)

 

@smith@@: if you are using 4 P-states you also have to say Package( 0x04 )

 

Regards,

mcsmart

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mitch_de
mitch_de
Posted
Posted

to smith Maybe wrong multi * config entries !!!!

Your dsdt PSS woudl give only two pstates , 6 * and 7 * , twice listed, nothing more usable !

 Method (_PSS, 0, NotSerialized)
       {
           Return (Package(0x03)
           {
               Package (0x06) { [b]3203[/b], 79820, 10, 10, 0x721, 0x0721 },  // also 7 * FSB, [b]not[/b] 7,5 * FSB, you wanted
               Package (0x06) {[b] 2989[/b], 76700, 10, 10, 0x71E, 0x071E }, //  7 * FSB
               Package (0x06) { [b]2776[/b], 74619, 10, 10, 0x61C, 0x061C }, // also 6 * FSB , [b]not[/b] 6,5 * FSB
                   Package (0x06) { [b]2562[/b], 72540, 10, 10, 0x61A, 0x061A }  // 6 * FSB
           }) 
       }

Which FSB do you have : 333 Mhz or different ?

3203 MHz : 333 MHz = 9.61 which not fit to 9.0 and not to 9.5 multi !

That MHZ values in the dsdt are cosmetic, and if wrong doesnt really made problems, but better they are real :D

 

If you want 0.5 step you need to use such :

0x71E = 7 * FSB, 1Ehex VID(mVolts)

0x4721 = 7,5 * FSB, 21hex VID , bit higher mVolts = good!

So if you want 0,5 * add 4hex in front of the multi !

 

 

For INFO :

I found out that Pstates64 (SL) and Pstates Leo give an different shown Psates.

Pstates64 also shows that x.5 * step Pstates, Pstates Leo only the x.0 * multis.

But i think ist an problem of showing (Bugs in the Info Tab) and not of using it.

 

Here my PSS part ( C2D, FSB 333, 6 - 9 * , also 0.5 in between stepped

 Name (_PSS, Package (0x07)
[size=1]        {
           Package (0x06)
           {
               0x0BB5, 
               0x00013A97, 
               0x0A, 
               0x0A, 
               0x0922,   // 9 * 333 Mhz
               0x0922
           }, 
      Package (0x06)
           {
               0x0B0E, /
               0xFF41, 
               0x0A, 
               0x0A, 
               0x4821, // 8,5 * 2830 MHz
               0x4821
           },
           Package (0x06)
           {
               0x0A68, 
               0x00010A18, 
               0x0A, 
               0x0A, 
               0x081E,  // 8 *
               0x081E
           }, 
         Package (0x06)
           {
               0x09C1, 
               0xEE41, 
               0x0A, 
               0x0A, 
               0x471C,  // 7,5 * = 2497 MHz
               0x471C
           },
          Package (0x06)
           {
               0x091B, 
               0xDCFB, 
               0x0A, 
               0x0A, 
               0x071A,  // 7 *
               0x071A
           }, 
          Package (0x06) 
           {
               0x0874, 
               0xCC41, 
               0x0A, 
               0x0A, 
               0x4618,  // 6,5 *
               0x4618
           },
           Package (0x06)
           {
               0x07CE, 
               0xB341, 
               0x0A, 
               0x0A, 
               0x0616, 
               0x0616
           }
       })[/size]

 

Here all my PStates (look above) listed+used in PstateChanger(SL) with VoodooPstate.kext (SL 64 Bit Version) shown in SL : all listed even those 0.5 * step :)

Bildschirmfoto_2009_11_05_um_12.32.57.jpg

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FKA
FKA
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Thanks for help, to all... With this code now I have this kernel panic:

 

A question: I must delete definely the nullcpupowermanagement or the temperatures will be too high ?

 

Yes delete nullcpupowermanagement !

 

Hi All,

 

Should I add the DropSSDT option in chameleon to use my own _pss table ?

 

Barnum

 

I dont knoe Barnum - what code have you used in DSDT for _PSS?

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Smith@@™
Smith@@™
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Posted

Ok, I have the same kernel panic: cpu0caller "Should have 2 threads, but only found 3 for die 1 etcetcetc.

com.apple.driver.Apple ACPIPlatform (1.3)

dependency: com.apple.iokit.IOACPIFamily(1.3.0)

dependency: com.apple.iokit.IOCPIFamily(2.6)

etc.etc.etc.

:whistle:

 

the code:

 

 Scope (_PR)
   {
       Processor (CPU0, 0x00, 0x00000410, 0x06) {}
       Processor (CPU1, 0x01, 0x00000410, 0x06) {}
       Processor (CPU2, 0x02, 0x00000410, 0x06) {}
       Processor (CPU3, 0x03, 0x00000410, 0x06) {}
   }

   Scope (_PR.CPU0)
   {
       Method (_PSS, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               Package (0x06)
               {
                   0x0C83, 
                   0x000137CC, 
                   0x0A, 
                   0x0A, 
                   0x4721, 
                   0x0721
               }, 

               Package (0x06)
               {
                   0x0BAD, 
                   0x00012B9C, 
                   0x0A, 
                   0x0A, 
                   0x071E, 
                   0x071E
               }, 

               Package (0x06)
               {
                   0x0AD8, 
                   0x0001237B, 
                   0x0A, 
                   0x0A, 
                   0x461C, 
                   0x061C
               }, 

               Package (0x06)
               {
                   0x0A02, 
                   0x00011B5C, 
                   0x0A, 
                   0x0A, 
                   0x061A, 
                   0x061A
               }
           })
       }

       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           0x01,               // Access Size
                           )
                   }, 

                   One, 
                   0x9D, 
                   0x03E8
               }
           })
       }
   }

   Scope (_PR.CPU1)
   {
       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x01,               // Bit Width
                           0x02,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   One, 
                   0x03E8
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000414, // Address
                           ,)
                   }, 

                   0x02, 
                   One, 
                   0x01F4
               }, 

               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x08,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000415, // Address
                           ,)
                   }, 

                   0x03, 
                   0x55, 
                   0xFA
               }
           })
       }
   }

   Scope (_PR.CPU2)
   {
       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

   Scope (_PR.CPU3)
   {
       Method (_CST, 0, NotSerialized)
       {
           Return (^^CPU1._CST ())
       }
   }

the error is certainly in the code

 

this my com.apple.boot.plist:

<key>Kernel</key>
<string>mach_kernel</string>
       <key>DropSSDT</key>
<string>yes</string>
<key>Kernel Flags</key>
<string>boot-9CD9F3D3-60E5-3AFC-B963-EDE44EBD2140</string>
<key>Graphics Mode</key>
<string>1680x1050x32</string>
<key>GraphicsEnabler</key>
<string>yes</string>
       <key>EthernetBuiltIn</key>
       <string>yes</string>	
       <key>Quiet Boot</key>
       <string>no</string>
       <key>Timeout</key>
       <string>8</string>
       <key>Theme</key>
       <string>Apple</string>

 

With DropSSDT to no, NO CHANGE @@

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FKA
FKA
Posted
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Ok, I have the same kernel panic: cpu0caller "Should have 2 threads, but only found 3 for die 1 etcetcetc.

 

See errors in red -

 

Method (_PSS, 0, NotSerialized)
{
Return (Package (0x04)
{
Package (0x06)
{
0x0C83,
0x000137CC,
0x0A,
0x0A,
0x4721,
[color="#ff0000"]0x0721[/color]  >> 0x4721
},

Package (0x06)
{
0x0BAD,
0x00012B9C,
0x0A,
0x0A,
0x071E,
0x071E
},

Package (0x06)
{
0x0AD8,
0x0001237B,
0x0A,
0x0A,
0x461C,
[color="#ff0000"]0x061C[/color]  >> 0x461C
},

Package (0x06)
{
0x0A02,
0x00011B5C,
0x0A,
0x0A,
0x061A,
0x061A
}
})

 

This error shouldn't cause KP - have you got a IntelAppleCPUPM disabler .kext ?

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Smith@@™
Smith@@™
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Posted

No absolutely, only kexts in extra extensions are fakesmc.kext, sleepenabler,evoreboot;

in system library extensions onlykext i have installed are 2 kext for 2 lan (yukon 8056 and 8001), applehda with hdefenabler for sound and nothing.. boh Repeat without this code all working great I'm confused..

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FKA
FKA
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No absolutely, only kexts in extra extensions are fakesmc.kext, sleepenabler,evoreboot;

in system library extensions onlykext i have installed are 2 kext for 2 lan (yukon 8056 and 8001), applehda with hdefenabler for sound and nothing.. boh Repeat without this code all working great I'm confused..

 

remove the sleepenabler kext !

 

You can use the RIP application for sleep if you still need it .

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Smith@@™
Smith@@™
Posted
Posted

Nothing, to this point i think that the problem is the code iniected in the dsdt, because without all work. The values that I take to calculate the pstate are the valus of the cpu in overclock. I don't think this is the problem. Boh?!?

 

cpu0caller "Should have 2 threads, but only found 3 for die 1 etcetcetc. 
com.apple.driver.Apple ACPIPlatform (1.3)
dependency: com.apple.iokit.IOACPIFamily(1.3.0)
dependency: com.apple.iokit.IOCPIFamily(2.6)

 

What mean? The kernel panic to happen istantanely, the apple logo appears and the kernel panic same

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FKA
FKA
Posted
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Nothing, to this point i think that the problem is the code iniected in the dsdt, because without all work. The values that I take to calculate the pstate are the valus of the cpu in overclock. I don't think this is the problem. Boh?!?

 

cpu0caller "Should have 2 threads, but only found 3 for die 1 etcetcetc. 
com.apple.driver.Apple ACPIPlatform (1.3)
dependency: com.apple.iokit.IOACPIFamily(1.3.0)
dependency: com.apple.iokit.IOCPIFamily(2.6)

 

What mean? The kernel panic to happen istantanely, the apple logo appears and the kernel panic same

 

Please try without sleepenabler kext

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mitch_de
mitch_de
Posted
Posted

Perhaps some problemy by your hardware (OC !!!) / BIOS mod (you flashed an modded bios ?)

Asus P5Q Deluxe ok ++ Intel core quad Q9550 @ 3.6GHz with Zalman 9900

Bios mod for overclock by kerzal + slic 2.1 by me + DSDT

1. Try to use default FSB (if OC by FSB) for further test to be safe its not by OC

2. Be sure , if you removed some .kext (nullpower, sleep...) that they also removed from kext cache, delete that cache

3. I would also check if there are still some patches (in your flashde bios mod ) and or dsdt which make trouble with the newly added dsdt things !

4. That Adresses 410+414+415 in dsdst part you posted maybe wrong ! Some mainboards (look trou the postings) have 410+414+415, some have 810+814+815 ! Check that which adresses are for your mainboard !

 

5. If 1+2+3+4 didnt give any better results i would wait for an user with exacat /near same mainboard +CPU type.

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Smith@@™
Smith@@™
Posted
Posted

1) I have try but without result;

 

2) Yes, I am sure;

 

3) In attached there are my bios for overclock, my last dsdt, in my precedent post there are also the SSDT tables;

 

4) I don't understand , sorry, What can i look these values for my motherboard and where are them in the dsdt?;

 

5)ok

 

Thank you for help me :)

 

A very important question: Why anyway with the voodoopstate all working perfectly?

DSDTwith_pstate_bios.zip

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FKA
FKA
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4) I don't understand , sorry, What can i look these values for my motherboard and where are them in the dsdt?;

 

In you un-modified DSDT at the top under scope (PR)

 

    Scope (_PR)
   {
       Processor (CPU0, 0x00, [color="#ff0000"]0x00000410[/color], 0x06) {}
       Processor (CPU1, 0x01, [color="#ff0000"]0x00000410[/color], 0x06) {}
       Processor (CPU2, 0x02, [color="#ff0000"]0x00000410[/color], 0x06) {}
       Processor (CPU3, 0x03, [color="#ff0000"]0x00000410[/color], 0x06) {}

 

The values in red are specific to your rig!

D.

 

A very important question: Why anyway with the voodoopstate all working perfectly?

 

We /I want my install to be as close to a real Mac as possible - and have the OS work as Apple intended.

 

Why use a 3rd party kext when there is an apple origional that already works exists..

 

ALSO please post DSDT.dsl files - I dont want to have to decomplie your DSDT :)

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mcsmart
mcsmart
Posted
Posted

Hey there, it's me again.

 

I still cannot get it to work. Even though my P-states show up correctly in IOReg I get the following in sysctrl:

hw.cpufrequency_max: 3000000000
hw.cpufrequency_min: 3000000000
hw.cpufrequency: 3000000000
hw.busfrequency_max: 1332000000
hw.busfrequency_min: 1332000000
hw.busfrequency: 1332000000

 

I am using the original BIOS and did not overclock my system. The only kexts I am using are: OpenHaltRestart.kext, fakesmc.kext and LegacyHDA.kext.

 

Is there anything I am doing wrong? I have attached my boot.plist, smbios.plist and DSDT. I also played with DropSSDT=y/n, but it did not make any difference... As I mentioned earlier my motherboard supports C-states (included in stock SSDT and therefore not included in my custom DSDT).

 

 

Regards,

mcsmart

stuff.zip

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tinush
tinush
Posted
Posted

Hi there,

 

with allot of help from MM67 i got speed-step working great on my e6750 cpu

Cpu-i gives the following p-states

 

Package (0x06) { 2664, 0, 10, 10, 0x81D, 0x81D },

Package (0x06) { 2331, 0, 10, 10, 0x71A, 0x71A },

Package (0x06) { 1998, 0, 10, 10, 0x616, 0x616 }

 

After i changed it to a E8500 for testing (would't run higher then 2.83ghz according to cpu-i)

cpu-i gave me different p-states

 

Package (0x06) { 2664, 0, 10, 10, 0x082A, 0x082A },

Package (0x06) { 2331, 0, 10, 10, 0x0726, 0x0726 },

Package (0x06) { 1998, 0, 10, 10, 0x061E, 0x061E }

 

what happened?

 

T.

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FKA
FKA
Posted
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Posted
Hey there, it's me again.

 

I still cannot get it to work. Even though my P-states show up correctly in IOReg I get the following in sysctrl:

hw.cpufrequency_max: 3000000000
 hw.cpufrequency_min: 3000000000
 hw.cpufrequency: 3000000000
 hw.busfrequency_max: 1332000000
 hw.busfrequency_min: 1332000000
 hw.busfrequency: 1332000000

 

I am using the original BIOS and did not overclock my system. The only kexts I am using are: OpenHaltRestart.kext, fakesmc.kext and LegacyHDA.kext.

 

Is there anything I am doing wrong? I have attached my boot.plist, smbios.plist and DSDT. I also played with DropSSDT=y/n, but it did not make any difference... As I mentioned earlier my motherboard supports C-states (included in stock SSDT and therefore not included in my custom DSDT).

 

 

Regards,

mcsmart

 

Try this .. sorry I cant complie for you I'm at work on XP machine and don't have a decent complier..

 

dsdtsmart.zip

 

##EDIT## you don't need dropSSDT with this!

 

D.

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mcsmart
mcsmart
Posted
Posted
what happened?

P-states are CPU-specific. If you are changing your CPU you'll also need to change your P-states. If you use VodooPower.kext or Cpu-i.kext this does not matter because these kernel extensions detect the P-states of your CPU automatically. However, if you have your P-states hardcoded to your DSDT, they are most likely not going to work with a different CPU.

 

@FormerlyKnownAs: Thanks a lot for taking the time. I really appreciate your work. I am going to look over it tomorrow.

 

 

Rehards,

mcsmart

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tinush
tinush
Posted
Posted
P-states are CPU-specific. If you are changing your CPU you'll also need to change your P-states. If you use VodooPower.kext or Cpu-i.kext this does not matter because these kernel extensions detect the P-states of your CPU automatically. However, if you have your P-states hardcoded to your DSDT, they are most likely not going to work with a different CPU.

 

@FormerlyKnownAs: Thanks a lot for taking the time. I really appreciate your work. I am going to look over it tomorrow.

 

 

Rehards,

mcsmart

 

Thnx for the fast reply, but this happened with the same E6750 (when i put it back, after the test with the 8500)

 

T.

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barnum
barnum
Posted
Posted
I dont knoe Barnum - what code have you used in DSDT for _PSS?

 

this is my code :

    Scope (_PR)
   {
       Processor (CPU1, 0x01, 0x00000810, 0x06)
	{
	    Method (_PSS, 0, NotSerialized)
           {
               Return (Package (0x05)
               {
               Package (0x06) { 0x0A68, 0x32, 0x0A, 0x0A, 0x081D, Zero }, 
               Package (0x06) { 0x09C2, 0x2E, 0x0A, 0x0A, 0x471C, One }, 
               Package (0x06) { 0x091B, 0x2A, 0x0A, 0x0A, 0x071A, 0x02 }, 
               Package (0x06) { 0x0875, 0x26, 0x0A, 0x0A, 0x4618, 0x03 }, 
               Package (0x06) { 0x07CE, 0x22, 0x0A, 0x0A, 0x0616, 0x04 }
               })
           }
           Method (_CST, 0, NotSerialized) // Master Object.
           {
               Return (Package (0x02)
               {
                   One, // Number of C-State packages: 1 (C1).
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               0x01,               // Access Size
                               )
                       },
                       One, 
                       0x9D, 
                       0x03E8
                   }, 
               })
           }
	}
       Processor (CPU2, 0x02, 0x00000810, 0x06)
	{
		Method (_PSS, 0, NotSerialized)
           {
               Return (\_PR.CPU1._PSS())
           }

           Method (_CST, 0, NotSerialized)
           {
			Return (Package (0x04)
			{
				0x03,   // Number of C-State packages: 3 (C1, C2 and C3).
				Package (0x04)
				{
					ResourceTemplate ()
					{
						Register (FFixedHW, 
						0x01,               // Bit Width
						0x02,               // Bit Offset
						0x0000000000000000, // Address
						0x01,               // Access Size
						)
			        }, 

					0x01, 
					0x01, 
					0x03E8
				}, 

				Package (0x04)
				{
								ResourceTemplate ()
								{
									Register (FFixedHW, 
										0x01,               // Bit Width
										0x02,               // Bit Offset
										0x0000000000000010, // Address
										0x01,               // Access Size
										)
								}, 

								0x02, 
								0x01, 
								0x01F4
				}, 

				Package (0x04)
				{
								ResourceTemplate ()
								{
									Register (FFixedHW, 
										0x01,               // Bit Width
										0x02,               // Bit Offset
										0x0000000000000020, // Address
										0x03,               // Access Size
										)
				                }, 

								0x03, 
								0x11, 
								0xFA
				}
			})
           }
	}
   }

 

barnum

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