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DSDT - Vanilla Speedstep - Generic Scope (_PR)


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However - with the cst data from either a MP3,1 or another hack that supports C1, C2 etc I do appear to enter a C1 state.

vCore drops below that of my lowest multi (sometimes only for a few seconds but it does happen.~)

Hence the answer you gave me (I am beginning to grasp this a bit better now) :) .

 

Hi FormerlyKnownAs

 

So after all your trials, would I be right in coming to the conclusion that just adding a _CST method, regardless of what's in it, allows our hacks to enter C1? Just to stop me from further researching ground that's already been covered ;)

 

ps. Great thread BTW. :D

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For everyone having KP problems be sure your RAM is getting enough juice. I know on my Gigabyte boards, by default, it wants to only give it 1.8v where as my RAM requires 2.1v - 2.2v. On top of that the timings are wrong too. I have to manually set that as well.

 

Start with the basics and be sure your BIOS has the right settings, especially if you're overclocking. Surprisingly enough with all the DSDT tweaking I've done my machine almost never kernel panics.

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If you use P-states and get KPs at cpu load try to higher the VID (hex) to get more mV for that PState0 and 1 (highest MHZ states).

Simple add 1 up to 3(4?) (1= 25mV) to the VID(hex) and try if you then get no KP anymore. I would try step by step and not rise up 3 at once !

 

For example using blackosx PStates:

Package (0x06) { 2660, 0, 10, 10, 0x0A1D, 0 }, // 0x0A = Multi 10dez* , 1D= VID , rise up 1 to 3 = 1E,1F,20hex

Package (0x06) { 2660, 0, 10, 10, 0x0A1F, 0 } // 50mV more

Package (0x06) { 2394, 0, 10, 10, 0x091C, 1 }, // 0x09 = Multi 09dez* , 1C= VID, rise up 1 to 3 = 1D,1E,1F

Package (0x06) { 2394, 0, 10, 10, 0x091D // 25 mV more

 

WARNING: TYPO in blackosx last Pstate !

Package (0x06) { 1596, 0, 10, 10, 0x61B8, 4 } //WRONG, malformted Multi, VID B8 = extreme high mVolts!

Package (0x06) { 1596, 0, 10, 10, 0x061B, 4 } // OK !!!, 06 Multi and 1B VID

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WARNING: TYPO in blackosx last Pstate !

Package (0x06) { 1596, 0, 10, 10, 0x61B8, 4 } //WRONG, malformted Multi, VID B8 = extreme high mVolts!

Package (0x06) { 1596, 0, 10, 10, 0x061B, 4 } // OK !!!, 06 Multi and 1B VID

Thanks mitch-de. You might have saved my CPU from death.. I owe you one ;)

I wondered why the voltage never dropped properly for this P-state. I will make sure I change it.

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Hi all,

 

I modify my _ps scope with the own give by master chief :

 

        Processor (CPU1, 0x01, 0x00000810, 0x06)
	{
	    Method (_PSS, 0, NotSerialized)
           {
               Return (Package (0x05)
               {
               Package (0x06) { 0x0A68, 0x32, 0x0A, 0x0A, 0x081D, Zero }, 
               Package (0x06) { 0x09C2, 0x2E, 0x0A, 0x0A, 0x471C, One }, 
               Package (0x06) { 0x091B, 0x2A, 0x0A, 0x0A, 0x071A, 0x02 }, 
               Package (0x06) { 0x0875, 0x26, 0x0A, 0x0A, 0x4618, 0x03 }, 
               Package (0x06) { 0x07CE, 0x22, 0x0A, 0x0A, 0x0616, 0x04 }
               })
           }
           Method (_CST, 0, NotSerialized) // Master Object.
           {
               Return (Package (0x02)
               {
                   One, // Number of C-State packages: 1 (C1).
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               0x01,               // Access Size
                               )
                       },
                       One, 
                       0x9D, 
                       0x03E8
                   }, 
               })
           }
	}
       Processor (CPU2, 0x02, 0x00000810, 0x06)
	{
		Method (_PSS, 0, NotSerialized)
           {
               Return (\_PR.CPU1._PSS())
           }

           Method (_CST, 0, NotSerialized)
           {
			Return (Package (0x04)
			{
				0x03,   // Number of C-State packages: 3 (C1, C2 and C3).
				Package (0x04)
				{
					ResourceTemplate ()
					{
						Register (FFixedHW, 
						0x01,               // Bit Width
						0x02,               // Bit Offset
						0x0000000000000000, // Address
						0x01,               // Access Size
						)
			        }, 

					0x01, 
					0x01, 
					0x03E8
				}, 

				Package (0x04)
				{
								ResourceTemplate ()
								{
									Register (FFixedHW, 
										0x01,               // Bit Width
										0x02,               // Bit Offset
										0x0000000000000010, // Address
										0x01,               // Access Size
										)
								}, 

								0x02, 
								0x01, 
								0x01F4
				}, 

				Package (0x04)
				{
								ResourceTemplate ()
								{
									Register (FFixedHW, 
										0x01,               // Bit Width
										0x02,               // Bit Offset
										0x0000000000000020, // Address
										0x03,               // Access Size
										)
				                }, 

								0x03, 
								0x11, 
								0xFA
				}
			})
           }
	}
   }

 

I modify the p-states according to my cpu : core 2 duo e8200

so I put 5 p-states (with those multipliers 6 6.5 7 7.5 8).

When I check the p-states under leopards with cpu-I, I only see 3 p-state (6 7 and 8 multipliers)

So does my cpu support only 3 p-states or does I made a mistake in my dsdt ?

 

Barnum

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I know someone who I think has a MacPro, I will have to contact them and see if they will let me play?...

If I can get the chance, what would be the main things you want me to gather? Because if I can get on it, I might only have one chance to play?

Let me know then I'll load my USB stick with apps (IOregistryExplorer, etc and do some detective work).

 

I would take mental note of VoodooMonitor's behavior and see if it syncs with what you get on your own machine. DSDT and other such profile data are readily available.

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Hence the answer you gave me (I am beginning to grasp this a bit better now) :) .

 

Hi FormerlyKnownAs

 

So after all your trials, would I be right in coming to the conclusion that just adding a _CST method, regardless of what's in it, allows our hacks to enter C1? Just to stop me from further researching ground that's already been covered :(

 

ps. Great thread BTW. :D

 

Hi Blackosx

 

From what I've found for my system this does seem to be the case.

Question is - for you guys who have native cst tables for C1, C2, C3 and in some cases C4 - can the deeper C states also be activated?

 

Please see ab__73's post #71 here

 

I really think this post shouldn't be ignored if you have native _cst tables and your trying to get c-states working properly.

 

and p.s. TY :)

 

D.

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I am on a P45 mobo and have EIST, C1E, C2/C2E and C4/C4E enabled in my BIOS. With Voodopower.kext Speedstep is working correctly and reliably. I added my 5 SSDTs to my DSDT. My SSDTs also have C-states.

 

Now I used the P-state calculator to get the current P-state configuration from Voodoopower.kext and added the following information to my DSDT:

		Name (_PSS, Package ( 0x04 )
	{
		Package (0x06) { 2997, 64688, 10, 10, 0x922, 0x922 },
		Package (0x06) { 2664, 56021, 10, 10, 0x820, 0x820 },
		Package (0x06) { 2331, 46430, 10, 10, 0x71C, 0x71C },
		Package (0x06) { 1998, 37578, 10, 10, 0x618, 0x618 }
	})

 

Then I removed Vodoopower.kext and Disabler.kext, recompiled my DSDT and rebooted.

 

AppleIntelCPUPowerManagement starts up just fine, but cpu-x always displays 3GHz as my CPU speed. Am I doing anything wrong?

 

 

Regards,

mcsmart

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I am on a P45 mobo and have EIST, C1E, C2/C2E and C4/C4E enabled in my BIOS. With Voodopower.kext Speedstep is working correctly and reliably. I added my 5 SSDTs to my DSDT. My SSDTs also have C-states.

 

Now I used the P-state calculator to get the current P-state configuration from Voodoopower.kext and added the following information to my DSDT:

		Name (_PSS, Package ( 0x04 )
	 {
		 Package (0x06) { 2997, 64688, 10, 10, 0x922, 0x922 },
		 Package (0x06) { 2664, 56021, 10, 10, 0x820, 0x820 },
		 Package (0x06) { 2331, 46430, 10, 10, 0x71C, 0x71C },
		 Package (0x06) { 1998, 37578, 10, 10, 0x618, 0x618 }
	 })

 

Then I removed Vodoopower.kext and Disabler.kext, recompiled my DSDT and rebooted.

 

AppleIntelCPUPowerManagement starts up just fine, but cpu-x always displays 3GHz as my CPU speed. Am I doing anything wrong?

 

 

Regards,

mcsmart

 

Have you got DropSSDT y in your boot.plist?

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Have you got DropSSDT y in your boot.plist?

Yes I have that in my boot.plist. And even though I did not borrow my _cst tables from a Mac I did set the SMproductname to "MacPro3,1" via smios.plist.

 

I have attached my DSDT for reference. Maybe somebody finds any mistakes. The PSS part is located at the very bottom.

 

 

Regards,

mcsmart

dsdt_ep45_ds4.zip

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Hi Blackosx

 

From what I've found for my system this does seem to be the case.

Question is - for you guys who have native cst tables for C1, C2, C3 and in some cases C4 - can the deeper C states also be activated?

 

Please see ab__73's post #71 here

 

I really think this post shouldn't be ignored if you have native _cst tables and your trying to get c-states working properly.

 

and p.s. TY :)

 

D.

Thanks FormerlyKnownAs - ab__73's post does look interesting. You have just given me loads more to get my head around and :wacko: Lol..

And I have just found this and this which are posts on this blog by Taylor Kidd from Intel. So more reading and understanding....

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Yes I have that in my boot.plist. And even though I did not borrow my _cst tables from a Mac I did set the SMproductname to "MacPro3,1" via smios.plist.

 

I have attached my DSDT for reference. Maybe somebody finds any mistakes. The PSS part is located at the very bottom.

 

 

Regards,

mcsmart

 

try adding your _pss tables (or NPSS SPSS tables) rather than this:

	Name (_PSS, Package ()
{
    Package (0x06) { 2997, 64688, 10, 10, 0x922, 0x922 },
    Package (0x06) { 2664, 56021, 10, 10, 0x820, 0x820 },
    Package (0x06) { 2331, 46430, 10, 10, 0x71C, 0x71C },
    Package (0x06) { 1998, 37578, 10, 10, 0x618, 0x618 }
})

 

Adding your p-state data to method _PSS

 

Name (_PSS may work but not in the format you have used.

 

i.e (PLEASE NOTE FOR REFERANCE ONLY)

        Method (_PSS, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (SPSS)
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (NPSS)
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (NPSS)
           }

           Return (SPSS)
       }

       Name (SPSS, Package (0x03)
       {
           Package (0x06)
           {
               0x0C20, 
               0x000124F8, 
               0xA0, 
               0x0A, 
               0x0820, 
               0x0820
           }, 

           Package (0x06)
           {
               0x0A9C, 
               0xFDE8, 
               0xA0, 
               0x0A, 
               0x071C, 
               0x071C
           }, 

           Package (0x06)
           {
               0x0918, 
               0xEA60, 
               0xA0, 
               0x0A, 
               0x061A, 
               0x061A
           }
       })
       Name (NPSS, Package (0x03)
       {
           Package (0x06)
           {
               0x0C20, 
               0x000124F8, 
               0x0A, 
               0x0A, 
               0x0820, 
               0x0820
           }, 

           Package (0x06)
           {
               0x0A9C, 
               0xFDE8, 
               0x0A, 
               0x0A, 
               0x071C, 
               0x071C
           }, 

           Package (0x06)
           {
               0x0918, 
               0xEA60, 
               0x0A, 
               0x0A, 
               0x061A, 
               0x061A
           }
       })
   }

 

 

##EDIT## Not this should be added under CPU0

 

D.

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I would take mental note of VoodooMonitor's behavior and see if it syncs with what you get on your own machine. DSDT and other such profile data are readily available.

Thanks kdawg - I will see what I can find out once I actually get hold of the guy and see what model of MacPro he has.

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Adding your p-state data to method _PSS

OK, thanks. Unfortunately this did not help. I now have

 

	Scope (\_PR.CPU0)
{
Method (_PSS, 0, NotSerialized)
{
	Return (NPSS)
}
	Name (NPSS, Package (0x04)

	[...]

under CPU0 but speedstep is still not working.

 

 

Regards,

mcsmart

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Hi to all. First: sorry for my english, but i'm italian and don't understand very well the english but i'll try. Now the problem: on my hardware in sign, P5Q DELUXE but with processor q9300, i have read and try all the pages in this thread, but the intelspeedstep don't working in nothing way with my modifications. Cpu-x show me always the frequency higher. I have the option in the com.apple.boot.plist, SSDTDROP to yes, I have smbios.plist with Macpro3,1, I have unistalled voodoopowerPstate and nullcpupowermanagement, infact applecpupower load perfectly, but the speedstep don't working. And also, with applecpupowermanagement the cpu temperatur are 8-10 degrees higher respect the temperature that i have with voodoopowerpstate.

Anyway, this is the situation, in attached there are my clean DSDT, the SSDT tables, the dsl file and the 4 p-state values take them from voodoomonitor with PC is in overclock.

I hope, really, that someone of you, of guru, can modded my DSDT, please, with my modded don't working never the speedstep and the guide are all, ALL, in strong english. Please look my DSDT attached. I would try a last time, at least, please. Sorry for my english..

 

Have a nice day ;)

 

Ciao

DSDT_SSDT_P_STATE.zip

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Pstate Tabel looks without errors. I also have that last entry as control value (is eqal that before entry). Should work.

I would check if the Pstates are really injected with IOREGISTRYEXPLORER.

Also working(=loaded) AppleLPC.kext is needed together with AppleIntelCPU loaded.

kextstat (terminal ) shows that if they are really loaded.

Last but not least: Dont worry if you cant get AppleIntelCPU working !!!!

You can use voodoopower / VoodooPstate (32/64) without any disadvantage to AppleIntelCPU (my opinon).

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I still cannot get it to work. AppleLPC and AppleIntelCPUPowerManagement are both loading fine.

 

It also seems that my P-states have been injected correctly (see screenshot).

 

 

Regards,

mcsmart

pstates.tiff

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You can use voodoopower / VoodooPstate (32/64) without any disadvantage to AppleIntelCPU (my opinon).

 

If I use the voodooPstate (working great) which vantage I have to mod my DSDT if the result is the same? :D

 

Sorry for my english.

 

Ciao

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If I use the voodooPstate (working great) which vantage I have to mod my DSDT if the result is the same? :)

 

Sorry for my english.

 

Ciao

 

No advantage to DSDT - just because we can - and it's more vanilla! :P

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Ok, and just for this! But my DSDT don't work :) Can you look please my file attached in the post #667? Maybe you can understand what I can do... Thanks

 

Ciao

 

OK @ mcsmart and smith@@

 

Why dont you bo9th try to add your PSS data to this code :

    Scope (_PR)
   {
       Processor (CPU0, 0x00, 0x00000410, 0x06) {}
       Processor (CPU1, 0x01, 0x00000410, 0x06) {}
       Processor (CPU2, 0x02, 0x00000410, 0x06) {}
       Processor (CPU3, 0x03, 0x00000410, 0x06) {}
   }

   Scope (_PR.CPU0)
   {
    Method (_PSS, 0, NotSerialized)
	{
		Return (Package(0x03)
		{
			[color="#ff0000"]Package (0x06) { 0, 0, 10, 10, 0x4820, 0 },
			Package (0x06) { 0, 0, 10, 10, 0x081E, 1 },
			Package (0x06) { 0, 0, 10, 10, 0x471C, 2 }[/color]
		})
	}
       Method (_CST, 0, NotSerialized)
       {
		Return (Package (0x02)
		{
			One, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x1, 0x2, 0x0, 0x1,)},0x01,0x9D,0x3E8}
		})
       }
   }
   Scope (_PR.CPU1)
   {
       Method (_CST, 0, NotSerialized)
       {
           Return (Package (0x04)
           {
               0x03, 
               Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x01, 0x02, 0x000, ,)},0x01,0x01,0x3E8}, 
               Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x08, 0x00, 0x414, ,)},0x02,0x01,0x1F4}, 
               Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x08, 0x00, 0x415, ,)},0x03,0x55,0x0FA} 
           })
       }
   }

   Scope (_PR.CPU2)
   {
       Method (_CST, 0, NotSerialized)
       {
               Return (^^CPU1._CST ())
       }
   }
   Scope (_PR.CPU3)
   {
       Method (_CST, 0, NotSerialized)
       {
               Return (^^CPU1._CST ())
       }
   }

 

The PSS table is highlighted in red. and this code replaces you origional Scope (PR at the top of your DSDT - remove anything you've already added.

 

And use DropSSDT = no

 

EDIT## also I believe both of you should only have 3 p-states. I think the Q9000 series only supports 3 P-states.

 

D.

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Ok, but from voodoopower i see that the possible values of p-state are 4, in fact the multiplier: 6, 6.5, 7, 7.5

 

This code with my pstate is correct or not?

 

Scope (_PR)
{
	Processor (CPU0, 0x00, 0x00000410, 0x06) {}
	Processor (CPU1, 0x01, 0x00000410, 0x06) {}
	Processor (CPU2, 0x02, 0x00000410, 0x06) {}
	Processor (CPU3, 0x03, 0x00000410, 0x06) {}
}

Scope (_PR.CPU0)
{
	Method (_PSS, 0, NotSerialized)
	{
		Return (Package(0x03)
		{
			Package (0x06) { 3203, 79820, 10, 10, 0x721, 0x0721 },
			Package (0x06) { 2989, 76700, 10, 10, 0x71E, 0x071E },
			Package (0x06) { 2776, 74619, 10, 10, 0x61C, 0x061C },
				Package (0x06) { 2562, 72540, 10, 10, 0x61A, 0x061A }
		})
	}
	Method (_CST, 0, NotSerialized)
	{
		Return (Package (0x02)
		{
			One, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x1, 0x2, 0x0, 0x1,)},0x01,0x9D,0x3E8}
		})
	}
}
Scope (_PR.CPU1)
{
	Method (_CST, 0, NotSerialized)
	{
		Return (Package (0x04)
		{
			0x03, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x01, 0x02, 0x000, ,)},0x01,0x01,0x3E8}, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x08, 0x00, 0x414, ,)},0x02,0x01,0x1F4}, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x08, 0x00, 0x415, ,)},0x03,0x55,0x0FA} 
		})
	}
}

Scope (_PR.CPU2)
{
	Method (_CST, 0, NotSerialized)
	{
			Return (^^CPU1._CST ())
	}
}
Scope (_PR.CPU3)
{
	Method (_CST, 0, NotSerialized)
	{
			Return (^^CPU1._CST ())
	}
}

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***Do not use this DSDT as is if you don't have a P5Q-E and a Core 2 Duo E8500 CPU***

 

I've now ripped out basically everything Master Chief has said it's safe to delete, here and in the P5K Pro thread. Luckily, the P5Q-E and P5K Pro DSDT tables are almost identical, it's not difficult to follow his work and make many of the same improvements and modifications.

P5QE_2101_Beer.zip

Also included in the archive is an unmodified DSDT dump from the 2101 P5Q-E BIOS so you can compare and track what I'm doing.

If you spot something silly, please let me know.

 

Hi Beerkex'd,

 

Could you please help me to modify your dsdt? I have P5Q-E but my cpu is Q9450 core2 quad... I don't understand all this very much, so I can just copy-paste things to dsdt.dsl and compile it....

 

I'm trying to run SL more than week now and I don't want to modify my bios.

 

I was able to install SL and boot with Ian T's 132mars boot cd, but without it I just end up with following KP (I tried to use various dsdt.aml files, but the KP is always the same):

 

post-323685-1257428175_thumb.jpg

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