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DSDT - Vanilla Speedstep - Generic Scope (_PR)

FKA

By FKA,
in Power Management

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stellarola
stellarola
Posted
Posted

Hey guys. So wow, 28 pages and counting. The idea of this thread is great, but it really is hella confusing, possibly a lot of extra stuff not needed? I guess that's just the way threads go anyways. :(

 

Thankfully I got some help from roisoft to get proper speedstep working on my board (MSI P45 Platinum). Anyways, I figured I'd try my hand at it for my girlfriend's Hackintosh which is a Gigabyte GA-945GCMX-S2 with an Intel Core2Duo E6600. From what it looks like I wasn't able to initiate speedstep yet, but I was however able to lower the temperature significantly and remove the CST errors which is really what I wanted from the beginning. Not to mention I got some odd results with some messing around with model name. Here are my results...

 

I first took this section that roisoft posted here in post #70 and added it to the beginning of my DSDT in the CPU section. At this point I had my model set for MacPro3,1 and didn't see a difference and had the same temperature as before (45-50c). BTW, CPUPM is loaded.

 

The next step I took was to inject a device id from AppleLPC which is supposed to help lower temperatures. I added the device id for ICH7M, because it seemed to be the closest to this board which is just ICH7. I added the device id in the PX40 section of the DSDT like this...

Device (PX40)
		{
			Name (_ADR, 0x001F0000)
			Method (_DSM, 4, NotSerialized)
			{
				Store (Package (0x02)
					{
						"device-id", 
						Buffer (0x04)
						{
							0xB9, 0x27, 0x00, 0x00
						}
					}, Local0)
				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
				Return (Local0)
			}

 

After adding this, I rebooted and verbose mode showed that the LPC couldn't be loaded and hence the temperatures still stayed the same, which is hottttt. :P

 

I read that some people got speedstep working natively when they used the model name MacBookPro5,1 or iMac9,1. So I tried this and ran temperature monitor. The CST errors were gone from verbose mode and the temps dropped from 45-50c to 30c! So I opened up MSR Tools to check this and I found out why. This had dropped the clock speed from 2.4ghz to 1.6ghz and wasn't stepping up! :P

MacBookPro5,1oriMac9,1.png

 

So this wasn't really working for me as it dropped my clock way down. I tried some generic names for the system (GA-945GCMX-S2) and it still didn't do much.

 

So figuring that choosing a proper model name had to do with something so I finally tried MacPro1,1. This was the sweet spot for me. In verbose mode it loaded up "LegacyHPET" which was different than what the other model names loaded up. I checked in MSR Tools and my clock speed was back up to 2.4ghz but dropped here and there to 2.25ghz at it's lowest point. The best thing though was my temps dropped dramatically. They sit about 30-35C now with CPUPM loaded instead of 45-50c. Here's proof...

e6600temps.png

 

Of course this is when I turned the machine on from sleep, but it basically idles about 30-35c now. Also, I removed IRQs from Device PIC and TMR in the DSDT as well. Thats more of a preventative measure than anything but nonetheless it helps for a proper DSDT.

 

So I'll try to do proper speedstepping later, but for now this has made me extremely happy that her computer's CPU fan doesn't kick into high speed for no reason. Hopefully this has been helpful to some people.

 

Take care,

 

-Stell

 

UPDATE: Using 10.6.2 I don't need to change the model to MacPro1,1 to get proper temps. I ended up renaming back to "GA-945GCMX-S2" and all is fine. :)

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Master Chief
Master Chief
Posted
Posted
What's actually being talked about here is what mitch_de has been asking about for the last week or so !

 

< snip />

 

The question for others (mitch_de's question) is how can that threashold be changed?

 

D.

 

There is no such thing as a "threshold" in terms of Intel Speedstep Technology. There might be one in VoodooPower but my guess is that this is a refresh threshold. We do have latency values to work with, and there might be values in the stepper data, but I haven't looked into it – and I am not willing to fry another CPU.

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FKA
FKA
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  • Author
Posted
Hey guys. So wow, 28 pages and counting. The idea of this thread is great, but it really is hella confusing, possibly a lot of extra stuff not needed? I guess that's just the way threads go anyways. :(

 

 

So I'll try to do proper speedstepping later, but for now this has made me extremely happy that her computer's CPU fan doesn't kick into high speed for no reason. Hopefully this has been helpful to some people.

 

Take care,

 

-Stell

 

Thanks Stell

 

and I agree - there's a lot thats needs to be updated in the first post - I'll try to get round to it soon :)

 

D.

 

There is no such thing as a "threshold" in terms of Intel Speedstep Technology. There is one in VoodooPower but that is the refresh threshold. You have latency values to work with. That's all.

 

So you say - it is what it is ?

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mitch_de
mitch_de
Posted
Posted
There is no such thing as a "threshold" in terms of Intel Speedstep Technology. There might be one in VoodooPower but my guess is that this is a refresh threshold. We do have latency values to work with, and there might be values in the stepper data, but I haven't looked into it – and I am not willing to fry another CPU.

I also think that that threshold is an thing which the software must compute. IntelSpeedStep does only support the hw environment for stepping, but has no "AI" when it has to step up/down - simple steps by can call of the software.

So somewhere must the threshold value also in AppleCPU usage. In that .plist of ACPI- (with that lots of modelnames, ctstates) there are only threshold for gpu to find, but not for cpu. I would say that that threshold is "hardcoded" in the code of AppleIntelCPU kext.

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stellarola
stellarola
Posted
Posted

Hate to add to the longest thread ever again, but I couldn't help myself. :)

 

So I've done some more testing and I just want to make it clear that my current mission is just to lower cpu temps whilst CPUPM is loaded in OS X, not speedstepping yet.

 

In my first test I added what roisoft wrote here to my DSDT, overwriting the CPU section. I also of course added the ICH7M LPC info to my ICH7 board to the PX40 section which is Gigabyte's name for LPCB. This resulted in lower temps when CPUPM was loaded and I was happy. HOWEVER if I overclocked the system, I'd receive the _CST failed message in verbose mode, and hence insanely hot temperatures. When I overclocked from 2.4ghz to 2.88ghz my temps were around the 65C mark!

 

I figured I'd check around some more and came across another injection which lead me to a post by Keeza. I took this section of the DSDT and added it to mine...

 

{
Scope (_PR)
{
	Processor (CPU0, 0x00, 0x00000410, 0x06) {}
	Processor (CPU1, 0x01, 0x00000410, 0x06) {}
}

Scope (\)
{
	Name (CFGD, 0x040383F2)
	Name (PDC0, 0x80000000)
	Name (PDC1, 0x80000000)
	Name (PDC2, 0x80000000)
	Name (PDC3, 0x80000000)
}

Scope (_PR.CPU0)
{
	Method (_CST, 0, NotSerialized)
	{
		Return (Package (0x04)
		{
			0x03, 
			Package (0x04)
			{
				ResourceTemplate ()
				{
					Register (FFixedHW, 
						0x01,			   // Bit Width
						0x02,			   // Bit Offset
						0x0000000000000000, // Address
						,)
				}, 

				One, 
				Zero, 
				Zero
			}, 

			Package (0x04)
			{
				ResourceTemplate ()
				{
					Register (FFixedHW, 
						0x01,			   // Bit Width
						0x02,			   // Bit Offset
						0x0000000000000000, // Address
						,)
				}, 

				0x02, 
				Zero, 
				Zero
			}, 

			Package (0x04)
			{
				ResourceTemplate ()
				{
					Register (FFixedHW, 
						0x01,			   // Bit Width
						0x02,			   // Bit Offset
						0x0000000000000000, // Address
						,)
				}, 

				0x03, 
				Zero, 
				Zero
			}
		})
	}
}

 

He also had a section of P-States, but I didn't add that part, I just wanted the basic CST section. Also, it's only for CPU0 technically but it applies itself to the other cores as well. Compiled properly and tried it out.

 

The result?

 

I can now overclock the CPU without worry of CST errors in verbose mode and therefore lower temperatures. Even lower than using a disabler kext.

 

Overclocking from 2.4ghz to 2.88ghz on an Intel E6600

 

Before Temp with CPUPM loaded and no CST/LPC injection - 60-65C

 

After Temp with CPUPM loaded and CST/LPC injection - 42-45C

 

Also to note with this other method I don't have any performance array section in IOREG, but that's expected. Good news is the temps are lower and it's overclocking/sleeping fine. I want to admit as well I didn't read much of this thread and I jumped in blindly. I'm sure some of what I'm do is incorrect, but it's working for me. :P

 

Take care,

 

-Stell

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stellarola
stellarola
Posted
Posted

Just got a message from a user saying the above code will hurt my cpu, anyone care to explain why? I'm humble, trust me. This is a learning experience after all. :)

 

He told me to use this instead:

{
Scope (_PR)
{
	Processor (CPU0, 0x00, 0x00000410, 0x06) {}
	Processor (CPU1, 0x01, 0x00000410, 0x06) {}
}

Scope (_PR.CPU0)
{
	Method (_CST, 0, NotSerialized)
	{
		Return (Package (0x02)
		{
			One, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x1, 0x2, 0x0, 0x1,)},0x01,0x9D,0x3E8}
		})
	}
}

Scope (_PR.CPU1)
{
	Method (_CST, 0, NotSerialized)
	{
		Return (Package (0x04)
		{
			0x03, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x01, 0x02, 0x000, ,)},0x01,0x01,0x3E8}, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x08, 0x00, 0x414, ,)},0x02,0x01,0x1F4}, 
			Package (0x04) {ResourceTemplate () {Register (FFixedHW, 0x08, 0x00, 0x415, ,)},0x03,0x55,0x0FA} 
		})
	}
}

 

 

-Stell

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tinush
tinush
Posted
Posted
The next step I took was to inject a device id from AppleLPC which is supposed to help lower temperatures. I added the device id for ICH7M, because it seemed to be the closest to this board which is just ICH7. I added the device id in the PX40 section of the DSDT like this...

Device (PX40)
		{
			Name (_ADR, 0x001F0000)
			Method (_DSM, 4, NotSerialized)
			{
				Store (Package (0x02)
					{
						"device-id", 
						Buffer (0x04)
						{
							0xB9, 0x27, 0x00, 0x00
						}
					}, Local0)
				DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
				Return (Local0)
			}

 

Hi there Stell

 

can you tell me what your device id is, i want to ad my device-id in the dsdt (id 3a18)

don't really know what to ad (also in the learning curve)

 

thnx

T

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mm67
mm67
Posted
Posted
Hi there Stell

 

can you tell me what your device id is, i want to ad my device-id in the dsdt (id 3a18)

don't really know what to ad (also in the learning curve)

 

thnx

T

 

Anyone from the IONameMatch table will work. If you have 3a18 as default like me then you don't need to add anything to PX40.

post-375259-1257077189_thumb.png

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mm67
mm67
Posted
Posted
My EP35-DS3P match it but EP45-UD3R doesn't match it.

 

post-93383-1257078522_thumb.jpg

 

This is from EP35 then as the device-id matches ?

 

If device-id doesn't match as default then you have add this to PX40 device:

                Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

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Superhai
Superhai
Posted
Posted
Just got a message from a user saying the above code will hurt my cpu, anyone care to explain why? I'm humble, trust me. This is a learning experience after all. :unsure:

 

I doubt it will damage the CPU, but it makes little sense. Here is a short analysis:

 

Scope (_PR.CPU0)
{
Method (_CST, 0, NotSerialized)
{ Return
	( Package (0x04) { 0x03,
	Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, 0x02, 0x0000000000000000, ,) }, One, Zero, Zero }, 
	Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, 0x02, 0x0000000000000000, ,) }, 0x02, Zero, Zero }, 
	Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, 0x02, 0x0000000000000000, ,) }, 0x03, Zero, Zero }
	})
}
}

 

You declare here 3 C-States, but they map to the FFHW of C1(E), so the two last will be redundant as they will never make a difference. I don't know if Apple use the latency value for C-State 1 (it is not so long, but it could be it puts the CPU too early into C1 and you will loose some performance), anyway you declare it as Zero, and as well as the wattage (which I am quiet sure OSX don't care about for C1). How many C-States does your CPU support?

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tinush
tinush
Posted
Posted
This is from EP35 then as the device-id matches ?

 

If device-id doesn't match as default then you have add this to PX40 device:

                Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

 

thnx MM67

 

i added the lines to the dsdt, but it still doesn't show up in ioreg

 

T

post-157612-1257080170_thumb.png

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mm67
mm67
Posted
Posted
Here it is

 

T.

Ok, you have:

                Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

               Name (_ADR, 0x001F0000)
               OperationRegion (PREV, PCI_Config, 0x08, One)

 

Try this:

                Name (_ADR, 0x001F0000)
               OperationRegion (PREV, PCI_Config, 0x08, One)
               Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

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tinush
tinush
Posted
Posted
Ok, you have:

                Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

               Name (_ADR, 0x001F0000)
               OperationRegion (PREV, PCI_Config, 0x08, One)

 

Try this:

                Name (_ADR, 0x001F0000)
               OperationRegion (PREV, PCI_Config, 0x08, One)
               Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

 

thnx i really appreciate this

should it be like this?

 

T.

DSDT.dsl.thijmus2.zip

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VCH888
VCH888
Posted
Posted
This is from EP35 then as the device-id matches ?

 

If device-id doesn't match as default then you have add this to PX40 device:

                Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }

 

 

lspci from EP35-DS3P

00:1f.0 ISA bridge [0601]: Intel Corporation 82801IR (ICH9R) LPC Interface Controller [8086:2916] (rev 02)

 

lspci from EP45-UD3R

00:1f.0 ISA bridge [0601]: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller [8086:3a16]

 

So, I added the above code to EP45-UD3R's DSDT 4 days ago. I had read your posts from DSDT fixes for Gigabyte boards.

 

What is advantage if AppleLPC.kext was loaded?

 

Thanks.

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mm67
mm67
Posted
Posted
thnx i really appreciate this

should it be like this?

 

T.

Sorry, I made a typo doing copy/paste, should be:

                Name (_ADR, 0x001F0000)
               Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }
               OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)

 

lspci from EP35-DS3P

00:1f.0 ISA bridge [0601]: Intel Corporation 82801IR (ICH9R) LPC Interface Controller [8086:2916] (rev 02)

 

lspci from EP45-UD3R

00:1f.0 ISA bridge [0601]: Intel Corporation 82801JIR (ICH10R) LPC Interface Controller [8086:3a16]

 

So, I added the above code to EP45-UD3R's DSDT 4 days ago. I had read your posts from DSDT fixes for Gigabyte boards.

 

What is advantage if AppleLPC.kext was loaded?

 

Thanks.

 

Without AppleLPC C-states won't work.

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tinush
tinush
Posted
Posted
Sorry, I made a typo doing copy/paste, should be:

                Name (_ADR, 0x001F0000)
               Method (_DSM, 4, NotSerialized)
               {
                   Store (Package (0x02)
                       {
                           "device-id", 
                           Buffer (0x04)
                           {
                               0x18, 0x3A, 0x00, 0x00
                           }
                       }, Local0)
                   DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                   Return (Local0)
               }
               OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)

 

i can't get it to compile, got one error

 

T.

DSDT.dsl.thijmus3.zip

post-157612-1257083934_thumb.png

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