DSDT - Vanilla Speedstep - Generic Scope (_PR)

[timmyj]

Quick question,

 

I've used Everest to dump my SSDT tables and DSDT table.

 

How do you view the bin files Everest creates? I cant open these files!

 

Care to help anyone?

 

they are in .bin format right?

just rename them to .aml and drag them onto iaslme icon in osx

iaslme

 

i'm pretty sure thats what i did hope it works

[Master Chief]

...

 

i do not have an option for that in my bios. i have an hp notebook and the bios is very limited. the latency values are what got me worried and that's why i decided to try this dsdt method. any idea as to how to change that? if that is possible?

now after i added the cst method and pss tables into my dsdt i do not have that cst errors anymore.

Ok so you do not have any C-State related option. Too bad, but like I said, that should not be a real problem. You was also lucky to locate the SSDT et all tables, and got them extracted it into files. Which basically means that you obtained the correct addresses. Which is another plus.

 

the pstates are working fine and now i added two more (total 5 now) and they are also showing up in my ioreg. (another question: the pstate and cst related info are showing up only in the CPU0 branch and not in the CPU1. any idea why?

Which is correct so you have nothing to worry about.

 

NPSS was missing and i used PSS just to be on the safe side. never knew that NPSS was non-existant. thanks for the info.

FTR: Is was only non-existant in your SSDT.

 

The best thing to do is to remove (comment out) the newly inserted objects, and then to reboot. Check your log file for the CST errors. Make sure that they show up again. Then change the value of Name (CFGD, 0x053969F1) to say 0x1000131 and give it a go. You simply have got to keep trying to get rid of the CST error this way, and then taadaa Enter C-States :-)

 

I still get CST related errors and no CSTInfo under SMC_Platform... I am thinking I'm very close but missing something rather major...

You have a call to _CST from all Processor declarations? Something like this:

			Method (_CST, 0, NotSerialized)
		{
			Return (\_PR.CPUn._CST())
		}

[keeza]

they are in .bin format right?

just rename them to .aml and drag them onto iaslme icon in osx

iaslme

 

i'm pretty sure thats what i did hope it works

 

Thats it!

 

You, my friend, have saved me hours of work. Thank you.

 

I've spent all morning trying to figure this one out to no avail.

 

And such a simple fix........

[yeehaa]

The best thing to do is to remove (comment out) the newly inserted objects, and then to reboot. Check your log file for the CST errors. Make sure that they show up again. Then change the value of Name (CFGD, 0x053969F1) to say 0x1000131 and give it a go. You simply have got to keep trying to get rid of the CST error this way, and then taadaa Enter C-States :-)

you mean, comment out the whole CST method from all CPUs? and the values for CFGD, any pointers as to what all values i should try? (let me go through that post of yours about the CFGD value once more) can i find any range or something? total newbie here. all the DSDT related things, i learned from this forum!

thanks for all the help!

 

EDIT: i think you mean, after making sure that i get cst errors, add back the cst method but this time just change the CFGD value, right?

 

Got a current copy of your DSDT.dsl you'd be willing to share (and the older one?).

 

Thanks!

 

I still get CST related errors and no CSTInfo under SMC_Platform... I am thinking I'm very close but missing something rather major...

 

here is my current dsl. it has many fixes for my system. so be sure to chk for specific sections u need. my original dsdt and all ssdt tables are some 10 -20 posts before this. this dsdt has all the ssdt tables incorporated.

mine.dsl.zip

[Master Chief]

you mean, comment out the whole CST method from all CPUs?

Correct. Including all calls to it.

 

and the values for CFGD, any pointers as to what all values i should try? (let me go through that post of yours about the CFGD value once more) can i find any range or something? total newbie here. all the DSDT related things, i learned from this forum! thanks for all the help!

Check the table that I included a while back.

 

EDIT: i think you mean, after making sure that i get cst errors, add back the cst method but this time just change the CFGD value, right?

Everything you need is already part of your BIOS and thus there is no need to duplicate things. Sure, it might prevent the CST errors, but these errors are an important asset as to what is going on, and thus important to get C-States working for you. No more errors – without injecting new objects – simply means that you are on the right track!

 

p.s. I have no time to look at your DSDT changes (almost bedtime) and thus get it to load the SSDT data from your BIOS... and then we talk

[WinstonAce]

Hello

I've use this method (Thanks FormerlyKnownAs) for enabling speedstep on my system

I found out that I didn't need any cst tables,

only used the cpupm table and two cpuist tables (core 2 duo) and entered my p-states into spss/npss

and it work just fine.

Is there any benefit to adding the cst tables?

why does it work without them if they are needed?

 

Attached the dsdt.dsl with the modification I used.

 

p.s. (a little bit off topic) is there a way to fix shutdown/restart through dsdt without using kext (like openhaltrestart)?

 

Thanks to all

 

Somebody?

[Brett Whinnen]

You have a call to _CST from all Processor declarations? Something like this:

			Method (_CST, 0, NotSerialized)
		{
			Return (\_PR.CPUn._CST())
		}

 

This is under CPU1

        Method (_CST, 0, NotSerialized)
       {
           If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC1, 0x10
               ))))
           {
               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       0x9D, 
                       0x03E8
                   }
               })
           }

           Return (^^CPU0._CST)
       }

 

This is the error I get:

 

ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized

 

without the _CST entries I get the following:

 

ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed

[Master Chief]

Somebody?

I assume that there are no CST errors at boot time, and in that case you might not need a CST object to prevent the errors, but the question remains if it works. Please attach all your tables and your (unmodified) DSDT.

 

p.s. There's a major difference between P-States and C-States. And like I said earlier; P-States are easy, unlike C-States.

 

I don't know of any DSDT fix to cure the shutdown/restart problems.

 

This is under CPU1

        Method (_CST, 0, NotSerialized)
       {
           If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC1, 0x10
               ))))
           {
               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       0x9D, 
                       0x03E8
                   }
               })
           }

           Return (^^CPU0._CST)
       }

Why did you put it there, and not on CPU0? And what's with this Return (^^CPU0._CST)? Do you have a CST object on CPU0?

 

BTW: That if statement will only be TRUE when bit 24 (0x01000000) of CFGD is set, and bit 4 (0x10) of PDC1 isn't set. Otherwise (else) it simply returns the CST object on CPU0 (which may or may nor be there and/or fail the same kind of checks).

 

In short: All cores must have (or point to) a CST object or it won't initialize properly and throw an error.

[WinstonAce]

Thanks for the replay

I have no cst errors (there wasn't at first place also) but i found out that the "vanilla SpeedStep" is not because of the tables i've insert

in the begining of the thread, FormelyKnowsAs told me to edit ACPI_SMC_PlatformPlugin.kext

and to change the model identifier to the one on my system profiler

i changed every occurrence of MacPro3,1 to MacPro4,1 and that what gave me full SpeedStep (voltage and multiplier) without any errors on boot, even when I use dsdt without any modifications at all.

 

mt dsdt is attached to my previous post.

[yeehaa]

Check the table that I included a while back.

 

 

Everything you need is already part of your BIOS and thus there is no need to duplicate things. Sure, it might prevent the CST errors, but these errors are an important asset as to what is going on, and thus important to get C-States working for you. No more errors �" without injecting new objects �" simply means that you are on the right track!

 

p.s. I have no time to look at your DSDT changes (almost bedtime) and thus get it to load the SSDT data from your BIOS... and then we talk

 

ok. i removed everything except the _PSS and now the CST errors are back. trying to come up with a value for CFGD. looking at that table you posted earlier and the cst method from my SSDT. but one thing i do not understand is, how is all this going to help correct the latency value. this whole exercise is to load the CST IST tables correctly,right?

[Master Chief]

Thanks for the replay

I have no cst errors (there wasn't at first place also) but i found out that the "vanilla SpeedStep" is not because of the tables i've insert

in the begining of the thread, FormelyKnowsAs told me to edit ACPI_SMC_PlatformPlugin.kext

and to change the model identifier to the one on my system profiler

i changed every occurrence of MacPro3,1 to MacPro4,1 and that what gave me full SpeedStep (voltage and multiplier) without any errors on boot, even when I use dsdt without any modifications at all.

Sure, but you did also add this whole block:

 Scope (\)
   {
       Name (SSDT, Package (0x18)
       {
           "CPU0IST ", 
           0xDFEEDE00, 
           0x0000022A, 
           "CPU1IST ", 
           0xDFEEE2C0, 
           0x00000152, 
           "CPU0CST ", 
           0xDFEEE420, 
           0x0000018A, 
           "CPU1CST ", 
           0xDFEEE5B0, 
           0x0000018A, 
           "CPU2IST ", 
           0x00000000, 
           0xF000E816, 
           "CPU3IST ", 
           0x00000000, 
           0xF000E816, 
           "CPU2CST ", 
           0xDFEEE740, 
           0x0000018A, 
           "CPU3CST ", 
           0xDFEEE8D0, 
           0x0000018A
       })
       Name (CFGD, 0x020383F2)
       Name (\PDC0, 0x80000000)
       Name (\PDC1, 0x80000000)
       Name (\PDC2, 0x80000000)
       Name (\PDC3, 0x80000000)
   }

   Scope (_PR.CPU0)
   {
       Method (_PPC, 0, NotSerialized)
       {
           Return (Zero)
       }

       Method (_PCT, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000880, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000882, // Address
                           ,)
                   }
               })
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           Return (Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000880, // Address
                       ,)
               }, 

               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000882, // Address
                       ,)
               }
           })
       }

       Method (_PSS, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (SPSS)
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (NPSS)
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (NPSS)
           }

           Return (SPSS)
       }

       Name (SPSS, Package (0x04)
       {
           Package (0x06)
           {
               0x0E10, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0922, 
               0x0922
           }, 

           Package (0x06)
           {
               0x0C80, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0820, 
               0x0820
           }, 

           Package (0x06)
           {
               0x0AF0, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x071C, 
               0x071C
           }, 

           Package (0x06)
           {
               0x0960, 
               0xDAC0, 
               0xA0, 
               0x0A, 
               0x0618, 
               0x0618
           }
       })
       Name (NPSS, Package (0x04)
       {
           Package (0x06)
           {
               0x0E10, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0922, 
               0x0922
           }, 

           Package (0x06)
           {
               0x0C80, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0820, 
               0x0820
           }, 

           Package (0x06)
           {
               0x0AF0, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x071C, 
               0x071C
           }, 

           Package (0x06)
           {
               0x0960, 
               0xDAC0, 
               0xA0, 
               0x0A, 
               0x0618, 
               0x0618
           }
       })
   }

   Scope (_PR.CPU1)
   {
       Method (_PPC, 0, NotSerialized)
       {
           Return (Zero)
       }

       Method (_PCT, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000880, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000882, // Address
                           ,)
                   }
               })
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           Return (Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000880, // Address
                       ,)
               }, 

               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000882, // Address
                       ,)
               }
           })
       }

       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }
   }
}

First, if there's anything you did not add, then please say so. Now, removing or commenting it out should trigger the error, because there is really nothing in your DSDT that loads the SSDT tables. How else should that work?

 

ok. i removed everything except the _PSS and now the CST errors are back. trying to come up with a value for CFGD. looking at that table you posted earlier and the cst method from my SSDT. but one thing i do not understand is, how is all this going to help correct the latency value. this whole exercise is to load the CST IST tables correctly,right?

Correct. And here are a few quotes from the ACPI specification, that should make clear as to what we are trying to do:

 

"_CST is an optional object that provides an alternative method to declare the supported processor power states (C States). Values provided by the _CST object override P_LVLx values in P_BLK and P_LVLx_LAT values in the FADT."

 

"The platform must expose a _CST object for either all or none of its processors"

 

"If the _CST object exists, OSPM uses the C state information specified in the _CST object in lieu of P_LVL2 and P_LVL3 registers defined in P_BLK and the P_LVLx_LAT values defined in the FADT"

 

You can use the IORegistryExplorer of Xcode (developer tools) to check and see if SSDT tables are loaded; look under AppleACPIPlatformExpert/ACPI Tables.

 

Edit: This is interesting; I just checked this with IORegistryExplorer and I don't seem to have any tables loaded either. I did start all over to see what I did, to reproduce and document it, but I and seem to have broken it. Great. More work.

[WinstonAce]

Sure, but you did also add this whole block:

 Scope (\)
   {
       Name (SSDT, Package (0x18)
       {
           "CPU0IST ", 
           0xDFEEDE00, 
           0x0000022A, 
           "CPU1IST ", 
           0xDFEEE2C0, 
           0x00000152, 
           "CPU0CST ", 
           0xDFEEE420, 
           0x0000018A, 
           "CPU1CST ", 
           0xDFEEE5B0, 
           0x0000018A, 
           "CPU2IST ", 
           0x00000000, 
           0xF000E816, 
           "CPU3IST ", 
           0x00000000, 
           0xF000E816, 
           "CPU2CST ", 
           0xDFEEE740, 
           0x0000018A, 
           "CPU3CST ", 
           0xDFEEE8D0, 
           0x0000018A
       })
       Name (CFGD, 0x020383F2)
       Name (\PDC0, 0x80000000)
       Name (\PDC1, 0x80000000)
       Name (\PDC2, 0x80000000)
       Name (\PDC3, 0x80000000)
   }

   Scope (_PR.CPU0)
   {
       Method (_PPC, 0, NotSerialized)
       {
           Return (Zero)
       }

       Method (_PCT, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000880, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000882, // Address
                           ,)
                   }
               })
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           Return (Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000880, // Address
                       ,)
               }, 

               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000882, // Address
                       ,)
               }
           })
       }

       Method (_PSS, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (SPSS)
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (NPSS)
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (NPSS)
           }

           Return (SPSS)
       }

       Name (SPSS, Package (0x04)
       {
           Package (0x06)
           {
               0x0E10, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0922, 
               0x0922
           }, 

           Package (0x06)
           {
               0x0C80, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0820, 
               0x0820
           }, 

           Package (0x06)
           {
               0x0AF0, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x071C, 
               0x071C
           }, 

           Package (0x06)
           {
               0x0960, 
               0xDAC0, 
               0xA0, 
               0x0A, 
               0x0618, 
               0x0618
           }
       })
       Name (NPSS, Package (0x04)
       {
           Package (0x06)
           {
               0x0E10, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0922, 
               0x0922
           }, 

           Package (0x06)
           {
               0x0C80, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x0820, 
               0x0820
           }, 

           Package (0x06)
           {
               0x0AF0, 
               0x000157C0, 
               0xA0, 
               0x0A, 
               0x071C, 
               0x071C
           }, 

           Package (0x06)
           {
               0x0960, 
               0xDAC0, 
               0xA0, 
               0x0A, 
               0x0618, 
               0x0618
           }
       })
   }

   Scope (_PR.CPU1)
   {
       Method (_PPC, 0, NotSerialized)
       {
           Return (Zero)
       }

       Method (_PCT, 0, NotSerialized)
       {
           If (LEqual (And (CFGD, 0x00060000), 0x00020000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000880, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (SystemIO, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000882, // Address
                           ,)
                   }
               })
           }

           If (LEqual (And (CFGD, 0x00060000), 0x00040000))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           If (LOr (And (CFGD, 0x4000), And (CFGD, 0x00010000)))
           {
               Return (Package (0x02)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000199, // Address
                           ,)
                   }, 

                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x10,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000198, // Address
                           ,)
                   }
               })
           }

           Return (Package (0x02)
           {
               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000880, // Address
                       ,)
               }, 

               ResourceTemplate ()
               {
                   Register (SystemIO, 
                       0x10,               // Bit Width
                       0x00,               // Bit Offset
                       0x0000000000000882, // Address
                       ,)
               }
           })
       }

       Method (_PSS, 0, NotSerialized)
       {
           Return (^^CPU0._PSS ())
       }
   }
}

 

You didn't understood me

at first I indeed added all the tables I've got (Cpupm/2*ist/4xcst)

and I didn't got Speedstep until I edited ACPI_SMC_PlatformPlugin.kext

 

But...

After that I tried with my original dsdt (made it myself, no ssdt tables at all) and I still have SpeedStep. It's not about what I did or didn't add, editing this specific kext (by replacing MacPro4,1 with MacPro3,1) is what gave me speedstep.

[Master Chief]

You didn't understood me

at first I indeed added all the tables I've got (Cpupm/2*ist/4xcst)

and I didn't got Speedstep until I edited ACPI_SMC_PlatformPlugin.kext

Sure, I might have misunderstood you. Or you wrote something that wasn't clear to me, but in post #184 you wrote:

 

"i changed every occurrence of MacPro3,1 to MacPro4,1 and that what gave me full SpeedStep (voltage and multiplier) without any errors on boot, even when I use dsdt without any modifications at all.

 

mt dsdt is attached to my previous post. "

 

and now:

 

But...

After that I tried with my original dsdt (made it myself, no ssdt tables at all) and I still have SpeedStep. It's not about what I did or didn't add, editing this specific kext (by replacing MacPro4,1 with MacPro3,1) is what gave me speedstep.

First note the mix up of the MacPro identifiers (MacPro3,1 to MacPro4,1 vs MacPro4,1 to MacPro3,1). And might this (my) misunderstanding be the fruit of your attached dsdt.dsl, which still includes the extra bits? I think so. I mean you said it (your dsdt) to be attached in your previous post, and thus that's what I used. Then you wrote: "You didn't understood me". Anybody else wondering why that happened?

 

I the end; I still think that it is impossible to have no errors without the inclusion of a CST object, and since there's isn't even a single Load() in your dsdt.dsl!?!?!? How the H should it load your tables? I simply fail to see how

 

And from now one... anyone who wants my help better include links, or at least post numbers, because if you are too lazy to do it, why should I?

[WinstonAce]

Sure, I might have misunderstood you. Or you wrote something that wasn't clear to me, but in post #184 you wrote:

 

"i changed every occurrence of MacPro3,1 to MacPro4,1 and that what gave me full SpeedStep (voltage and multiplier) without any errors on boot, even when I use dsdt without any modifications at all.

 

mt dsdt is attached to my previous post. "

 

and now:

 

 

 

First note the mix up of the MacPro identifiers (MacPro3,1 to MacPro4,1 vs MacPro4,1 to MacPro3,1). And might this misunderstanding be the fruit of your attached dsdt.dsl, which still includes the extra bits? I think so.

 

I the end; I still think that it is impossible to have no errors without the inclusion of a CST object, and since there's isn't even a single Load() in your dsdt.dsl!?!?!? How the H should it load your tables?

 

No hard feeling, as you can see, english isn't my native language

I'll try to explain my self better this time:

 

At first I did all the steps in the guide, extracted all the ssdt tables, changed them according to my real p-states and didn't get speedstep.

Than FormelyKnown As told me to change MacPro4,1 to what's in my system profiler in ACPI_SMC_PlatformPlugin.kext.

 

I've changed every occurrence of MacPro4,1 to MacPro3,1 (sorry for the mistake earlier)

and indeed i've got speedstep working (Voltage and Multiplier).

 

 

Than I booted (still with dsdt containing all SSDT tables) without dropssdt=y and still had speedstep, I tried one more thing - dsdt without any ssdt tables, straight from koalala's tool (only fix i've done was rtc for cmos reset) and I still had speedstep working (at least according to cpu-i).

 

after a lot of tests i've done on my machine, the only thing needed for my machine for speedstep is editing the kext i mentioned. it's just work.

[Master Chief]

No hard feeling, as you can see, english isn't my native language

I'll try to explain my self better this time:

 

At first I did all the steps in the guide, extracted all the ssdt tables, changed them according to my real p-states and didn't get speedstep.

Than FormelyKnown As told me to change MacPro4,1 to what's in my system profiler in ACPI_SMC_PlatformPlugin.kext.

 

I've changed every occurrence of MacPro4,1 to MacPro3,1 (sorry for the mistake earlier)

and indeed i've got speedstep working (Voltage and Multiplier).

 

 

Than I booted (still with dsdt containing all SSDT tables) without dropssdt=y and still had speedstep, I tried one more thing - dsdt without any ssdt tables, straight from koalala's tool (only fix i've done was rtc for cmos reset) and I still had speedstep working (at least according to cpu-i).

 

after a lot of tests i've done on my machine, the only thing needed for my machine for speedstep is editing the kext i mentioned. it's just work.

No worries!

 

But I still fail to understand how it works (without errors) so please attach your dsdt.dsl I mean I like to help, but I also like to understand how things work, especially when I fail to understand things.

[WinstonAce]

Just to be clear, I now have complete speedstep with the attached dsdt file

only using two kext's - fakesmc and legacyhda

dsdt.dsl.zip

[Master Chief]

Just to be clear, I now have complete speedstep with the attached dsdt file

only using two kext's - fakesmc and legacyhda

Sure, but you should also see the following two errors in system.log (Leopard) or kernel.log (Snow Leopard):

 

ACPI_SMC_PlatformPlugin::pushCPU_CSTData - _CST evaluation failed

ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized

 

And you not having these is what I don't understand. The rest is (perfectly) clear to me.

[WinstonAce]

I don't have errors upon boot when all c-states are enabled in bios.

[Master Chief]

I don't have errors upon boot when all c-states are enabled in bios.

That's amazing!

 

Do you have Xcode installed? If yes, then please use IORegistryExplorer to see if the SSDT tables are loaded (see post #186). Or try boot argument dropSSDT=y (see post #1/Chameleon manual). And if you still don't see any errors after these steps, then I simply don't know how it works.

[Squirrelf]

Thank to all the info I have speedstep running

linux dump gave me only 2 p-states, I added another two, and all works great, from x9 down to x6

have a Q6600 OC @ 3.2 (9x356)

 

HOWEVER

my idle temperature is higher by 10�C than without speedstep when I was using appleCPUmanagement kext

now it's around 50�C idle which is high, used to be around 40�C

load temps however are like before around 65�C

 

the vcore in CPU-i at 9x is wrong, it just read a values somewhere, but not the actual hardware value

I could set in the dsdt a vcore of 1.18v at x9 and the system would be super stable (bios was at 1.325)

if I lowered the bios down to even 1.275 and keep the same dsdt (1.18v), my system would crash within 1min of using mprime, so the displayed value is definitely a fake at x9

 

so what proves that the vcore is actually lowering when speed steeping at x6

If the vcore really was at 1.18v at x6, isn't the temperature supposed to be much lower (at least 5�C lower or more)?

 

I just don't get it and don't trust cpu-i anymore, except for the displayed stepping (x6 through x9 which seems right)

 

any input about that matter?

 

at 3 in the afternoon I am now at 54�C idle ...

[Brett Whinnen]

I assume that there are no CST errors at boot time, and in that case you might not need a CST object to prevent the errors, but the question remains if it works. Please attach all your tables and your (unmodified) DSDT.

 

p.s. There's a major difference between P-States and C-States. And like I said earlier; P-States are easy, unlike C-States.

 

I don't know of any DSDT fix to cure the shutdown/restart problems.

 

 

Why did you put it there, and not on CPU0? And what's with this Return (^^CPU0._CST)? Do you have a CST object on CPU0?

 

BTW: That if statement will only be TRUE when bit 24 (0x01000000) of CFGD is set, and bit 4 (0x10) of PDC1 isn't set. Otherwise (else) is simply return the CST object on CPU0 (which may or may nor be there and/or fail the same kind of checks).

 

In short: All cores must have (or point to) a CST object or it won't initialize properly and throw an error.

 

There is definitely a _CST for CPU0. It is pretty much the same as most of the others I've seen. The only difference being different SystemIO addresses in use.

 

My CPU for instance references 0x00001010 where others will reference 0x00000410 i.e.

 

Processor (CPU0, 0x00, 0x00001010, 0x06)

 

In my _CST for CPU0 SystemIO are referenced as 0x00001014, 0x00001015, 0x00001016 etc where others have referenced 0x00000414 and so on. From reading above the SystemIO is supposed to be board specific (if I was reading correctly) so I've left those where they were from my SSDT tables.

 

For reference my original _CST

       Method (_CST, 0, NotSerialized)
       {
           If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x10
               ))))
           {
               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       0x9D, 
                       0x03E8
                   }
               })
           }

           If (LAnd (And (CFGD, 0x00200000), And (PDC0, 0x0200)))
           {
               If (And (CFGD, 0x0200))
               {
                   Return (Package (0x04)
                   {
                       0x03, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000010, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000050, // Address
                                   0x03,               // Access Size
                                   )
                           }, 

                           0x03, 
                           0xA2, 
                           0x64
                       }
                   })
               }

               If (And (CFGD, 0x80))
               {
                   Return (Package (0x04)
                   {
                       0x03, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000010, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000030, // Address
                                   0x03,               // Access Size
                                   )
                           }, 

                           0x03, 
                           0x39, 
                           0x64
                       }
                   })
               }

               If (And (CFGD, 0x40))
               {
                   Return (Package (0x04)
                   {
                       0x03, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000010, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000020, // Address
                                   0x03,               // Access Size
                                   )
                           }, 

                           0x03, 
                           0x11, 
                           0xFA
                       }
                   })
               }

               If (And (CFGD, 0x20))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000010, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               0x01,               // Access Size
                               )
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }
               })
           }

           If (LAnd (And (CFGD, 0x00200000), And (PDC0, 0x0100)))
           {
               If (And (CFGD, 0x0200))
               {
                   Return (Package (0x04)
                   {
                       0x03, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001014, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001018, // Address
                                   ,)
                           }, 

                           0x03, 
                           0xA2, 
                           0x64
                       }
                   })
               }

               If (And (CFGD, 0x80))
               {
                   Return (Package (0x04)
                   {
                       0x03, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001014, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001016, // Address
                                   ,)
                           }, 

                           0x03, 
                           0x39, 
                           0x64
                       }
                   })
               }

               If (And (CFGD, 0x40))
               {
                   Return (Package (0x04)
                   {
                       0x03, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001014, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001015, // Address
                                   ,)
                           }, 

                           0x03, 
                           0x11, 
                           0xFA
                       }
                   })
               }

               If (And (CFGD, 0x20))
               {
                   Return (Package (0x03)
                   {
                       0x02, 
                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (FFixedHW, 
                                   0x01,               // Bit Width
                                   0x02,               // Bit Offset
                                   0x0000000000000000, // Address
                                   0x01,               // Access Size
                                   )
                           }, 

                           One, 
                           One, 
                           0x03E8
                       }, 

                       Package (0x04)
                       {
                           ResourceTemplate ()
                           {
                               Register (SystemIO, 
                                   0x08,               // Bit Width
                                   0x00,               // Bit Offset
                                   0x0000000000001014, // Address
                                   ,)
                           }, 

                           0x02, 
                           One, 
                           0x01F4
                       }
                   })
               }

               Return (Package (0x02)
               {
                   One, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x01,               // Bit Width
                               0x02,               // Bit Offset
                               0x0000000000000000, // Address
                               0x01,               // Access Size
                               )
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }
               })
           }

           If (And (CFGD, 0x0200))
           {
               Return (Package (0x04)
               {
                   0x03, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001014, // Address
                               ,)
                       }, 

                       0x02, 
                       One, 
                       0x01F4
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001018, // Address
                               ,)
                       }, 

                       0x03, 
                       0xA2, 
                       0x64
                   }
               })
           }

           If (And (CFGD, 0x80))
           {
               Return (Package (0x04)
               {
                   0x03, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001014, // Address
                               ,)
                       }, 

                       0x02, 
                       One, 
                       0x01F4
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001016, // Address
                               ,)
                       }, 

                       0x03, 
                       0x39, 
                       0x64
                   }
               })
           }

           If (And (CFGD, 0x40))
           {
               Return (Package (0x04)
               {
                   0x03, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001014, // Address
                               ,)
                       }, 

                       0x02, 
                       One, 
                       0x01F4
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001015, // Address
                               ,)
                       }, 

                       0x03, 
                       0x11, 
                       0xFA
                   }
               })
           }

           If (And (CFGD, 0x20))
           {
               Return (Package (0x03)
               {
                   0x02, 
                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (FFixedHW, 
                               0x00,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000000000, // Address
                               ,)
                       }, 

                       One, 
                       One, 
                       0x03E8
                   }, 

                   Package (0x04)
                   {
                       ResourceTemplate ()
                       {
                           Register (SystemIO, 
                               0x08,               // Bit Width
                               0x00,               // Bit Offset
                               0x0000000000001014, // Address
                               ,)
                       }, 

                       0x02, 
                       One, 
                       0x01F4
                   }
               })
           }

           Return (Package (0x02)
           {
               One, 
               Package (0x04)
               {
                   ResourceTemplate ()
                   {
                       Register (FFixedHW, 
                           0x00,               // Bit Width
                           0x00,               // Bit Offset
                           0x0000000000000000, // Address
                           ,)
                   }, 

                   One, 
                   One, 
                   0x03E8
               }
           })
       }

 

And with the exception of the SystemIO addresses mentioned above is exactly the same as the one from yeehaa.

 

For reference my DSDT.dsl is attached. Appreciate your time, and it may help me understand it better too.

 

Thanks,

 

Brett

 

 

DSDT_T9300_16_09_09_01.dsl.zip

[yonika]

I had a quick look at your files and looking at it; you have C-State support built in. The first question is: Did you enable it in the BIOS? I ask this because the latencies in the FACP are not good (see post #46) i.e. these values are in fact preventing it from entering C2/3. You might want to do another ACPIdump but this time with the BIOS settings enabled for it.

 

Also, you should be able to boot without CST related errors. And this without any CST related modification in your DSDT. And when this is not the case, then we simply have to figure out how to make it work.

 

P-State related modifications like frequencies and what not can be done by only adding a _PSS object to the first Processor declaration. The rest of the files will use it, and when not, then they are not loading. Which would be another problem to solve, but one that can be solved already.

 

p.s. You couldn't find NPSS simply because it does not exist. In fact your _PSS object represents the actually NPSS

 

 

Yup me too (see post #65) but p-states are easy, unlike c-states.

 

 

I can't really answer this because I don't use any disabler since... I can't even remember when. However, a higher temperature appears to be normal (might be due to another kext however).

 

 

 

I was talking about the average power consumption, in milliwatts, of the processor when in the corresponding C State, as in 1000mW for C2 and 500mW for C3. Now back to the correlation between the two, because what does it take to lower the power usage of the CPU? Right, a reduced voltage and thus enter CPU-i

 

First of all, I must say that from my point of view this is not an argument but an interesting discussion, and now that I cleared that up, I can say this:

 

power is calculated in one of three ways:

1. Power = Voltage x Current

2. Power = Voltage^2 / Resistance

3. Power = Current^2 * Resistance

 

At first look, it seems like if you reduce voltage, power will drop, but no one promises that current stays the same, if load is increased power can be left the same and might even be higher.

 

But that's not the issue, the issue is, that I still don't understand when and what I should see if I have c-states working on my system ? Should I look at the voltages ? should they drop below the lowest p-state voltage - in my settings 1.132v ? or should I look in another place in cpu-i for a real power measurement in milli Watts ?

 

I honestly don't understand what I should look for, So please help me, a screen shot would be really appreciated.

 

Thanks,

Jonathan

 

That's amazing!

 

Do you have Xcode installed? If yes, then please use IORegistryExplorer to see if the SSDT tables are loaded (see post #186). Or try boot argument dropSSDT=y (see post #1/Chameleon manual). And if you still don't see any errors after these steps, then I simply don't know how it works.

 

 

I also don't have CST error when c-states are enabled in bios,see post #125, I can also add that using the dropSSDT=y flag does not change the absence of cst errors on boot.

 

Jonathan

[WinstonAce]

That's amazing!

 

Do you have Xcode installed? If yes, then please use IORegistryExplorer to see if the SSDT tables are loaded (see post #186). Or try boot argument dropSSDT=y (see post #1/Chameleon manual). And if you still don't see any errors after these steps, then I simply don't know how it works.

 

Attached are my ioreg output, with and without ssdt tables

both work just fine

Archive.zip

[yeehaa]

Correct. And here are a few quotes from the ACPI specification, that should make clear as to what we are trying to do:

 

"_CST is an optional object that provides an alternative method to declare the supported processor power states (C States). Values provided by the _CST object override P_LVLx values in P_BLK and P_LVLx_LAT values in the FADT."

 

"The platform must expose a _CST object for either all or none of its processors"

 

"If the _CST object exists, OSPM uses the C state information specified in the _CST object in lieu of P_LVL2 and P_LVL3 registers defined in P_BLK and the P_LVLx_LAT values defined in the FADT"

 

You can use the IORegistryExplorer of Xcode (developer tools) to check and see if SSDT tables are loaded; look under AppleACPIPlatformExpert/ACPI Tables.

 

Edit: This is interesting; I just checked this with IORegistryExplorer and I don't seem to have any tables loaded either. I did start all over to see what I did, to reproduce and document it, but I and seem to have broken it. Great. More work.

 

 

@Master Chief:

ok. after removing all the ssdt tables from the dsdt and booting normally with chameleon, i have just 2 ssdt tables in the ACPI (checked with IORegExplorer). four tables are missing and they are the IST and CST tables for CPU0 and CPU1. so as per your advise i am trying to change to the CFGD value and booting and checking whether the tables get loaded. But i need some help here to understand the process.

 

an excerpt from my ssdt which gets loaded: (this is the code to load one of the missing 4 tables. the missing tables have the cst method in them)

 

			If (And (CFGD, One))
		  {
			  If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC0, 
				  0x09), 0x09)), LNot (And (SDTL, One))))
			  {
				  Or (SDTL, One, SDTL)
				  OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02
					  )))
				  Load (IST0, HI0)
			  }
		  }

now my CFGD value is 0x053969F1 and you suggested i start trying with 0x01000131. assuming that the PDC and SDTL conditions are working, the statement within the "if" clause should get loaded with any one of the CFGD values above. but ofcourse it does not, because the IST table is not loaded. do you have any idea why? or do you need more information? i have dumped the data at the address locations referenced in that locations and they are indeed correct. so it is not a "hardcoded table missing" problem.

[blade5502]

Hello!

 

Tryed to follow your Guide but I didn't get c-states working - always get "ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized" at boot! I've attached Linux ACPI Dumps, DSDT from DSDTPatcher and my merged DSDT - I've an Intel T7500 Core Duo CPU/ICH8 Chipset (Dell Inspiron 1720)

 

Would be very Happy if somebody, who knows more about DSDT Patching as I could help my fix my C-States!

ACPI_Tables_linux_.zip

DSDTs.zip