SA22C Posted September 10, 2009 Share Posted September 10, 2009 I changed the P-States as directed, but still no stepping. I've attached my merged DSDT to see if anyone here can help me figure out what I'm missing. Thanks for all the help thus far. dsdt.dsl.txt Link to comment Share on other sites More sharing options...
FKA Posted September 10, 2009 Author Share Posted September 10, 2009 MacPro2,1 Then you need to ammend the ACPI_SMC_PlatformPlugin.kext info.plist with MacPro2,1, as described earlier in the thread. D. I changed the P-States as directed, but still no stepping. I've attached my merged DSDT to see if anyone here can help me figure out what I'm missing. Thanks for all the help thus far. Your CPU cores are labeled CPU1,2,3,4 They should be CPU0, 1, 2, 3 no? also make the edit to ACPI_SMC_PlatformPlugin.kext info.plist if not done already. D. Link to comment Share on other sites More sharing options...
Master Chief Posted September 10, 2009 Share Posted September 10, 2009 I changed the P-States as directed, but still no stepping. I've attached my merged DSDT to see if anyone here can help me figure out what I'm missing. Thanks for all the help thus far. Ah, that is more like it (the one in your PM was garbled). Now, don't you worry about the CPUn identifier, which is fine (Asus just doesn't like calling the first CPU 0). However, I do see that you have two cores (see NCPU) yet you included 4 Processor declarations! Please remove the last two. One other thing is that the _CST object is still missing, and then this coding style: Return (^^CPU1._PSS ()) Return (^^CPU1._PPC) Which I personally would replace by: Return (\_PR.CPU1._PSS()) Just to make things more logical. And when you include _CST then don't forget to call it from the second CPU like this: Return (\_PR.CPU1._CST ()) Also replace the two PDC0's with TYPE in your _CST object (to match your DSDT). Link to comment Share on other sites More sharing options...
SA22C Posted September 10, 2009 Share Posted September 10, 2009 Ah, that is more like it (the one in your PM was garbled). Now, don't you worry about the CPUn identifier, which is fine (Asus just doesn't like calling the first CPU 0). However, I do see that you have two cores (see NCPU) yet you included 4 Processor declarations! Please remove the last two. One other thing is that the _CST object is still missing, and then this coding style: Return (^^CPU1._PSS ()) Return (^^CPU1._PPC) Which I personally would replace by: Return (\_PR.CPU1._PSS()) Just to make things more logical. And when you include _CST then don't forget to call it from the second CPU like this: Return (\_PR.CPU1._CST ()) Also replace the two PDC0's with TYPE in your _CST object (to match your DSDT). Now I don't have any CST code available from my dumps, so I'm still a little fuzzy on how to use the CST code from another machine (like the MacPro3,1 for example) and make it work. I've tried a simple append to my current DSDT and I still see no evidence of stepping or use of the C-state code. Is there a site with example code, or a manual I can read? Link to comment Share on other sites More sharing options...
Master Chief Posted September 10, 2009 Share Posted September 10, 2009 Now I don't have any CST code available from my dumps, so I'm still a little fuzzy on how to use the CST code from another machine (like the MacPro3,1 for example) and make it work. I've tried a simple append to my current DSDT and I still see no evidence of stepping or use of the C-state code. Is there a site with example code, or a manual I can read? You are using Snow Leopard, correct (sig might be wrong)? What model identifier do you see in System Profiler? Does that match with any of the models in the ACPI_SMC_PlatformPlugin.kext info.plist? Where and how did you add _CST() p.s. The first post has some links (me ducks). Link to comment Share on other sites More sharing options...
WinstonAce Posted September 10, 2009 Share Posted September 10, 2009 Then you need to ammend the ACPI_SMC_PlatformPlugin.kext info.plist with MacPro2,1, as described earlier in the thread. Thanks What entries in the plist do I need to change? if I use smbios.plist with IMac9,1 (for example) do I still need to edit this plist? (because MacPro2,1 isn't in the plis but IMac9,1 is) Link to comment Share on other sites More sharing options...
FKA Posted September 10, 2009 Author Share Posted September 10, 2009 Thanks What entries in the plist do I need to change? if I use smbios.plist with IMac9,1 (for example) do I still need to edit this plist? See post #15 for Leo and #53 for SL As Chief told you - Enter the model that's shown in System Profiler. D. Link to comment Share on other sites More sharing options...
William Parker Posted September 10, 2009 Share Posted September 10, 2009 Hello & Thanks for the interest. I have not used any unmodified DSDT. There is only one patched DSDT.aml which I use on the 10.5.7 version (working fully) and same DSDT on a separate spare HDD (in same machine) with 10.6 install to test. In 10.5.7 AppleIntelCPU...kext initializes properly but same DSDT in 10.6 causes KP with AppleIntelCPU...kext. Can you beat that? DSDT.aml Attached here. Please take a peek. Exactly! BTW: The version of CPU-i that I compiled for Snow Leopard (32-bit) works here – unlike that ugly MSRTools tools thing. Even for my computer, which still shows up as: "P5K PRO" in System Profiler (I changed the ACPI plugin Info.plist). And not only that. because the 7.5 multiplier (0x4720 in my _PSS) works too!!! I am however still looking for the value for the 6.5 multiplier; the reported value in CPU-i (0x461C) doesn't seem to work here (no 6.5 showing up in CPU-i). I take it that the unmodified dsdt.dsl works with Snow Leopard? As in it fails after your changed it? Then attach both the original (working) and modified dsdt.dsl because how else should anyone here help you? What kind of "Model Identifier:" do you see in System Profiler? Mine still reports: "P5K PRO" and thus I modified ACPI_SMC_PlatformPlugin.kext (I simply replaced MacPro3,1" and "MacPro4,1" with "P5K PRO" in the Info.plist) to get P-stepping working. DSDT.aml.zip Link to comment Share on other sites More sharing options...
SA22C Posted September 10, 2009 Share Posted September 10, 2009 You are using Snow Leopard, correct (sig might be wrong)?What model identifier do you see in System Profiler? Does that match with any of the models in the ACPI_SMC_PlatformPlugin.kext info.plist? Where and how did you add _CST() p.s. The first post has some links (me ducks). Yep, I'm using SL. I've set my model to MacPro3,1, so I shouldn't have to modify the ACPI_SMC_PlatformPlugin plist, right? Here is how I've added the CST object, does that appear correct to you? Processor (CPU1, 0x01, 0x00000810, 0x06) { OperationRegion (STBL, SystemMemory, 0xCFF8E0D0, 0x01D2) Name (NCPU, 0x02) Name (TYPE, 0x80000000) Name (HNDL, 0x80000000) Name (CFGD, 0x01000009) Name (TBLD, 0x80) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, Zero, REVS) CreateDWordField (Arg0, 0x04, SIZE) Store (SizeOf (Arg0), Local0) Store (Subtract (Local0, 0x08), Local1) CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) Concatenate (STS0, TEMP, Local2) _OSC (Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }, REVS, SIZE, Local2) } Name (NPCT, Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x40, // Bit Width 0x00, // Bit Offset 0x0000000000000199, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000198, // Address ,) } }) Name (SPCT, Package (0x02) { ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000900, // Address ,) }, ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000902, // Address ,) } }) Method (_PCT, 0, NotSerialized) { If (LEqual (And (TYPE, One), One)) { Return (NPCT) } Else { Return (SPCT) } } Name (XPSS, 0x02) Name (_PPC, Zero) Name (SPSS, Package (0x02) { Package (0x06) { 0x0850, 0xDFF2, 0x6E, 0x0A, 0x0817, 0x0817 }, Package (0x06) { 0x063C, 0x9912, 0x6E, 0x0A, 0x0611, 0x0611 } }) Name (NPSS, Package (0x02) { Package (0x06) { 0x0850, 0xDFF2, 0x0A, 0x0A, 0x0817, 0x0817 }, Package (0x06) { 0x063C, 0x9912, 0x0A, 0x0A, 0x0611, 0x0611 } }) Method (_PSS, 0, NotSerialized) { If (LEqual (And (TYPE, One), One)) { Return (NPSS) } Else { Return (SPSS) } } Method (_PSD, 0, NotSerialized) { If (And (CFGD, 0x01000000)) { If (And (TYPE, 0x0800)) { Return (Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFE, NCPU } }) } Return (Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFC, NCPU } }) } Return (Package (0x01) { Package (0x05) { 0x05, Zero, Zero, 0xFC, NCPU } }) } Method (_CST, 0, NotSerialized) { If (LAnd (And (CFGD, 0x01000000), LNot (And (TYPE, 0x10 )))) { Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x9D, 0x03E8 } }) } If (And (TYPE, 0x0300)) { If (And (CFGD, 0x20)) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000010, // Address ,) }, 0x02, One, 0x01F4 } }) } } If (And (CFGD, 0x20)) { Return (Package (0x03) { 0x02, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x000000000000000C, // Address ,) }, 0x02, One, 0x01F4 } }) } Return (Package (0x02) { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address ,) }, One, One, 0x03E8 } }) } Method (_OSC, 4, NotSerialized) { CreateDWordField (Arg3, Zero, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, Zero, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }) CreateDWordField (UID0, Zero, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3))))) { Store (0x06, STS0) Return (Arg3) } If (LNotEqual (Arg1, One)) { Store (0x0A, STS0) Return (Arg3) } Or (And (TYPE, 0x7FFFFFFF), CAP0, TYPE) If (And (CFGD, One)) { If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (TYPE, 0x09), 0x09)), LNot (And (TBLD, One)))) { Or (TBLD, One, TBLD) Load (STBL, HNDL) } } If (And (CFGD, 0xF0)) { If (LAnd (LAnd (And (CFGD, 0x01000000), And (TYPE, 0x18 )), LNot (And (TBLD, 0x02)))) { Or (TBLD, 0x02, TBLD) } } Return (Arg3) } } } I've attached the full file below. P5K_E_dsdt.dsl.txt Link to comment Share on other sites More sharing options...
FKA Posted September 10, 2009 Author Share Posted September 10, 2009 Yep, I'm using SL. I've set my model to MacPro3,1, so I shouldn't have to modify the ACPI_SMC_PlatformPlugin plist, right? You still need to make the edit . I'm set to MacPro3,1 also and had to do this. ##EDit## CST looks fine but as I said in an earlyer post the MacPro3,1 only has arguments for C1 and C2. See if you can get this working and I'll post the _cst I have with C1, C2 and C3 when I get bacik from work this evening. D. Link to comment Share on other sites More sharing options...
SA22C Posted September 10, 2009 Share Posted September 10, 2009 You still need to make the edit . I'm set to MacPro3,1 also and had to do this. D. {censored}. Well that probably explains why nothing's happening then. Link to comment Share on other sites More sharing options...
FKA Posted September 10, 2009 Author Share Posted September 10, 2009 {censored}. Well that probably explains why nothing's happening then. it's a fiddly isn't it .. NB edit above ^^^ ##ALSO## still to be proved - if MacPro only has C1 and C2 - and we set model to MacPro in ACPI_SMC, will C3 be supported ?? Link to comment Share on other sites More sharing options...
SA22C Posted September 10, 2009 Share Posted September 10, 2009 Well I can't test until tonight now, but I'll be sure and report back ASAP. I'm getting excited now. Link to comment Share on other sites More sharing options...
Master Chief Posted September 10, 2009 Share Posted September 10, 2009 {censored}. Well that probably explains why nothing's happening then. See post # 99 Link to comment Share on other sites More sharing options...
westwaerts Posted September 10, 2009 Share Posted September 10, 2009 Thanks! CPU-I is working and showing that Speedstepping is working CPU-I is showing the lowest p-state under "status" (x6 multiplier). Strange thing is, it doesn't update once i have high cpu load. Is that normal? It should be showing x7 or even x8 once CPU gets hit. Without any SSDT-Editing i have the same results in CPU-i as you. But here it seems to report correct temp and frequency, though changes only happen x6 to x8 and viceversa. Link to comment Share on other sites More sharing options...
Master Chief Posted September 10, 2009 Share Posted September 10, 2009 Yep, I'm using SL. I've set my model to MacPro3,1, so I shouldn't have to modify the ACPI_SMC_PlatformPlugin plist, right? Here is how I've added the CST object, does that appear correct to you? ... I've attached the full file below. I wonder why you have all the extra bits (NPCT, SPCT, XPSS, PCT, PPC, SPSS and PSD) in it. I mean you normally only need the objects: PDC, OSC and CST because the former will be read from SystemMemory (see OperationRegion). Sure, you need to add PSS to change/enhance the P-Stepping, but that's about it. Without any SSDT-Editing i have the same results in CPU-i as you.But here it seems to report correct temp and frequency, though changes only happen x6 to x8 and viceversa. I wonder what multipliers you and ApexDE are using. N.b. Please note that this might be caused by incorrectly specified power values (second argument) in your PSS object. TIP: You might want to check your system.log on Leopard or kernel.log on Snow Leopard; look for CPU-i buffer related errors! Link to comment Share on other sites More sharing options...
tapper00` Posted September 10, 2009 Share Posted September 10, 2009 @formerlyknownas Great thread, but is there another app besides p-state calculator that will allow fractional multipliers? The Q9550 has six p-states. with multipliers of 6, 6.5, 7, 7.5, 8 and 8.5. Without any editing of the dsdt and with nullcpupm in my extra folder CPU-i is showing a change from 6x at idle to 8.5 under load. The multiplier/freq is changing but the voltage always remains at the highest p-state. @william parker I am just delving into the speedstep myself. Also with the Q9550 processor. Since p-state setting are processor dependent... Please keep posted if you make any progress. Link to comment Share on other sites More sharing options...
Master Chief Posted September 10, 2009 Share Posted September 10, 2009 ... is there another app besides p-state calculator that will allow fractional multipliers? The Q9550 has six p-states. with multipliers of 6, 6.5, 7, 7.5, 8 and 8.5. Seems like bit 14 (0x4000/16384) is set for all fractional multipliers i.e. add a 4 in front of the values supplied by the P-States Calculator (0x4720 is working here for 7.5). Update: I checked the source code of CPU-i and that appears to be correct. Have a look: #define FID(ctl) (((ctl) & 0xff00) >> 8) #define VID(ctl) ((ctl) & 0x00ff) columnIdentifier = [NSString stringWithFormat:@"x %d%s", fid & 0x1F, fid & 0x40 ? ".5" : ".0" ]; PStatesArray[i].Multiplier = (fid & 0x0f) + (fid & 0x1F, fid & 0x40 ? 0.5 : 0.0); But the error checking is... well there is none so I don't know what the API returns. Link to comment Share on other sites More sharing options...
yonika Posted September 10, 2009 Share Posted September 10, 2009 Hello, Help is needed here I followed FormerlyKnownAs's guide at the first post, It took me quite some time and I'm not sure I know exactly what to add to my DSDT, so I have a few questions that will help me clarify things a bit: I used ubuntu to dump my ssdt tables, and I got 3 ssdt files, 2xcpuist and 1xcpupm, I guess i do not have c-states ? I read the guide for combining the ssdt's into the dsdt at http://s2.enemy.org/~zaunmayc/speedstep8.04.html How far do i have to go along with the guide ? do i just need to stop after cat'ing the ssdt's to the dsdt ? The guy over there says something about setting the correct register adress for the PERF_CTL and the PERF_STATUS registers, do I have to do that ? I opened FormerlyKnownAs's combined dsdt file and tried to match the end of the file to my own ssdt's, I saw that on FormerlyKnownAs's dsdt there was this code: Method (_PCT, 0, NotSerialized) { If (LEqual (And (CFGD, 0x00060000), 0x00020000)) { Return (Package (0x02) { ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000199, // Address ,) }, ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000198, // Address ,) } }) } on my ssdt there was this code: Method (_PCT, 0, NotSerialized) { If (LEqual (And (CFGD, 0x00060000), 0x00020000)) { Return (Package (0x02) { ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000880, // Address ,) }, ResourceTemplate () { Register (SystemIO, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000882, // Address ,) } }) } Why there's a difference between the addresses of the two ? do I have to change mine to 199 and 198 like on FormerlyKnownAs's dsdt ? or do I need to leave it as it is as long as it's not 000000 ? is that what the guy meant by fixing the PERF_CTL and the PERF_STATUS registers ? By looking on FormerlyKnownAs's DSDT it looks like the CST section from the Mac Pro is inserted before the CPUIST code inside the SCOPE (_PR.CPU0), is that correct ? Is there anywhere an official info by intel on the speed steps for each of it's cpu's ? If not, does anyone know what info should be inserted to the PSS for Intel C2D E8400 (3GHz) ? currently I have only 2 steps on the ACPI. 10x anyone in advance, Jonathan Link to comment Share on other sites More sharing options...
FKA Posted September 11, 2009 Author Share Posted September 11, 2009 Here's DSDT with C1, 2 and 3 for my MB that does not support C-states DSDT11_09_09.dsl.zip Note: I've tried with cst memory address left as zero and with (as posted) arbitrary consecutive addresses. Maybe these addresses are already occupied for this Gigabyte MB?? suggestions welcome. and here is dmesg having booted with voodoo kernel (NB voodoo kernel does not like fakeSMC !!) Note I get same result with memory addresses set to 0 and arbitrary! version_variant = 0 version = Darwin Kernel Version 9.5.0: Sat Dec 6 19:39:54 IST 2008; Voodoo; Release 1.0 :xnu-1228.7.58/ EM64T supported and will be enabled EFI region: type = 7/7, base = 0x0, top = 0x9c EFI region: type = 0/0, base = 0xf0, top = 0xff EFI region: type = 0/0, base = 0xfec00, top = 0xfffff EFI region: type = 0/0, base = 0xf0000, top = 0xf3fff EFI region: type = 0/0, base = 0x9f, top = 0x9e EFI region: type = 0/0, base = 0xdfef0, top = 0xdfeff EFI region: type = 7/7, base = 0x100, top = 0xdfedf EFI region: type = 9/9, base = 0xdfee3, top = 0xdfeef EFI region: type = 10/10, base = 0xdfee0, top = 0xdfee2 EFI region: type = 7/7, base = 0x100000, top = 0x11ffff Physical memory 4096 MB npvhash=4095 HIGH_MEM_BASE 0xffe00000 fixed per-cpu begin 0xffe17000 tramp: 0xffe00000, hi mem tramps at 0xffe00000 GDT: 0xffe02000, LDT: 0xffe04000, IDT: 0xffe03000, KTSS: 0xffe14000, DFTSS: 0xffe15000 MCTSS: 0xffe15000 gdt/idt reloaded, tr reset to KERNEL_TSS Kernel virtual space from 0x0 to 0xfe7fffff. PAE enabled 64 bit mode enabled 64 bit mode enabled Available physical space from 0x1c6d000 to 0xdfedf000 EFI_FSB_frequency: read FSBFrequency value: 420009100 BUS: Frequency = 420.9100MHz, cvtt2n = 00000002.6182B6E8, cvtn2t = 00000000.6B85B764, cvtInt = 00245464.CB7271DC rtclock_init: Taking bus ratio path 4 (Intel / Apple) timerValue 3 intermediate 0x0000002991dec868 saveTime 0x0000002987db7ab8 TSC: Verification of clock speed PASSED. TSC: Frequency = 3360.72800MHz, FSB frequency = 420.9100MHz, bus ratio = 8 DBG: RCBA: vaddr = 01C83000, paddr = FED1C001 DBG: current RCBA.HPTC: 00000080 DBG: HPET: vaddr = 01C87000, paddr = FED00000 DBG: HPET: Frequency = 14.318179MHz, cvtt2n = 00000045.D75E0F7F, cvtn2t = 00000000.03AA5B32 DBG: CVT: TSC to HPET = 00000000.01174442 DBG: CVT: HPET to TSC = 000000EA.ABF9E5BB DBG: CVT: BUS to HPET = 00000000.08BA2212 DBG: CVT: HPET to BUS = 0000001D.557F3C94 initialize_screen: b=E0000000, w=00000400, h=00000300, r=00001000, d=00000001 Darwin Kernel Version 9.5.0: Sat Dec 6 19:39:54 IST 2008; Voodoo; Release 1.0 :xnu-1228.7.58/BUILD/obj/RELEASE_I386 standard timeslicing quantum is 10000 us pmap_steal_memory: 01F8B000 - 01F8C000; size=00001000 pmap_steal_memory: 01F8C000 - 02453000; size=004C7000 pmap_steal_memory: 02453000 - 02460000; size=0000D000 pmap_steal_memory: 02460000 - 02860000; size=00400000 pmap_steal_memory: 02860000 - 04E10340; size=025B0340 vm_page_bootstrap: 898028 free pages and 150548 wired pages mig_table_max_displ = 79 CPU identification: Intel® Core™2 Quad CPU Q9450 @ 2.66GHz CPU features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV P>>removed HTT: 4 cores per package; 4 logical cpus per package CPU extended features: XD EM64T Initializing EFI runtime services Boot args version 1 revision 5 mode 32 Processing 32-bit EFI tables at 0x1a61000 RuntimeServices table at 0x1a61048 MSR_IA32_APIC_BASE 0xfee00000 enabled BSP Boot cpu local APIC id 0x0 [RTCLOCK] frequency 3360000000 (3360072800) maxDec: 5112945521 tscFreq: 3360072800 Kernel boot args: 'boot-uuid=************************************************* rd=*uuid DropSSDT=y kprintf=1 -x -v' warning: skipping personalities in blacklisted kext com.apple.driver.AppleIntelCPUPowerManagement com.apple.kpi.unsupported: Undefined in symbol set: _sha1_hardware_hook IOResources: not registry member at registerService() ACPI: RSDP @ 0x1a6a000/0x0014 (v000 GBT ) ACPI: RSDT @ 0x1a6b000/0x0034 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) ACPI: FACP @ 0x1a6c000/0x0074 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) ACPI: DSDT @ 0x1a64000/0x50FC (v001 GBT GBTUACPI 0x00001000 INTL 0x20080926) ACPI: FACS @ 0xdfee0000/0x0040 ACPI: HPET @ 0xdfee7e00/0x0038 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x00000098) ACPI: MCFG @ 0xdfee7e80/0x003C (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) ACPI: APIC @ 0xdfee7d00/0x0084 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) AppleACPICPU: ProcessorApicId=0 LocalApicId=0 Enabled AppleACPICPU: ProcessorApicId=1 LocalApicId=1 Enabled AppleACPICPU: ProcessorApicId=2 LocalApicId=3 Enabled AppleACPICPU: ProcessorApicId=3 LocalApicId=2 Enabled Loading security extension com.apple.nke.applicationfirewall Loading security extension com.apple.security.seatbelt calling mpo_policy_init for mb Seatbelt MACF policy initialized Security policy loaded: Seatbelt Policy (mb) Loading security extension com.apple.security.TMSafetyNet calling mpo_policy_init for TMSafetyNet Security policy loaded: Safety net for Time Machine (TMSafetyNet) Copyright © 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. MAC Framework successfully initialized using 16384 buffer headers and 4096 cluster IO buffer headers cpu_data_alloc(1) 0x54ccd000 desc_table: 0x54cd2000 ldt: 0x54cd5000 int_stack: 0x54cce000-0x54cd2000 cpu_data_alloc(2) 0x54cfd000 desc_table: 0x54d02000 ldt: 0x54d05000 int_stack: 0x54cfe000-0x54d02000 cpu_data_alloc(3) 0x54d2d000 desc_table: 0x54d32000 ldt: 0x54d35000 int_stack: 0x54d2e000-0x54d32000 cpu_datap(2):0x54d2d000 local apic id 0x2 remapped from 3 cpu_datap(3):0x54cfd000 local apic id 0x3 remapped from 2 S[tTaSrtCe]d declptua : 312 ,( lsakippipci ngi dsy nc0hr0o0n0iz0a0t0i1o)n . (CPU1) Started[TScCpu] 2d e(lltaap:i c id 030,0 0s0k0i0p2p)ing synchronization. (CPU2) Sta[TStCed] cdpeul t3a lapic- 2i,d s0k0i0p0p0i0n0g3 )synchronization. (CPU3) IOAPIC: Version 0x20 Vectors 64:87 ACPI: System State [s0 S3 S4 S5] (S3) OpenHaltRestart: 2008 \M-B\M-) COPYRIGHT PSYSTAR CORPORATION (www.psystar.com) mbinit: done Security auditing service present BSM auditing present bsd_autoconf: calling kminit extension "com.apple.driver.AppleHDAController" cannot be found can't find extension com.apple.driver.AppleHDAController Can't determine dependencies for com.apple.driver.AppleHDAController. Couldn't alloc class "AppleHDAController" extension "com.apple.driver.AppleHDAController" cannot be found can't find extension com.apple.driver.AppleHDAController Can't determine dependencies for com.apple.driver.AppleHDAController. From path: "uuid", Couldn't alloc class "AppleHDAController" Waiting for boot volume with UUID 9D259768-B2D3-3FC0-BABE-641E5D593030 Waiting on <dict ID="0"><key>IOProviderClass</key><string ID="1">IOResources</string> >>removed AppleUSBEHCI::setPowerState(0x6578800, 0 -> 4) took 115 ms AppleUSBEHCI::setPowerState(0x64d6000, 0 -> 4) took 120 ms Got boot device = IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/SATA@1F,2 >> removed BSD root: disk4s2, major 14, minor 14 FireWire (OHCI) TI ID 8024 PCI now active, GUID 000f896300001d7d; max speed s400. IOFireWireController::setPowerState(0x6579000, 0 -> 2) took 170 ms Extension "com.apple.driver.iTunesPhoneDriver" has no explicit kernel dependency; using version 6.0. BT_USB Controller: isInactive()=0 mDevice->isInactive()=0 [HCIController][configurePM] power parent ready after 1 tries Jettisoning kernel linker. Resetting IOCatalogue. warning: skipping personalities in blacklisted kext com.apple.driver.AppleHWSensor warning: skipping personalities in blacklisted kext com.apple.Dont_Steal_Mac_OS_X GFX0: family specific matching fails Matching service count = 0 GFX0: family specific matching fails GFX0: family specific matching fails [GFX0] strict ordering enforced [GFX0] strict ordering enforcedGFX0: family specific matching fails ACPI_SMC_PlatformPlugin::start - waitForService(resourceMatching(AppleIntelCPUPowerManagement) timed out systemShutdown false com_psystar_RealtekR1000: Ethernet address 00:1d:7d:06:38:83 BT_USB Controller: isInactive()=0 mDevice->isInactive()=0 CSRUSBBluetoothHCIController::setPowerState(0x6851600, 0 -> 2) async took 54 ms kPEDisableScreen -1 initialize_screen: b=5D98D000, w=00000280, h=000001E0, r=00000C00, d=00000001 kPEEnableScreen 1 kPEEnableScreen 1 ATY_Megalodon::powerStateWillChangeTo(0x6464000, ATY_Megalodon, 0 -> 2) took 477 ms kPEEnableScreen 1 kPEEnableScreen 1 kPEDisableScreen 1 kPEEnableScreen 1 kPEEnableScreen 1 NTFS driver 2.1 [Flags: R/O]. NTFS volume name Windows 7 Boot, version 3.1. NTFS volume name Windows 7 x64, versio Current conclusion - If it is possible to fix ACPI for MB that do not support C-states, I'm not smart enough to do it! Have fun D. Link to comment Share on other sites More sharing options...
Master Chief Posted September 11, 2009 Share Posted September 11, 2009 Here's DSDT with C1, 2 and 3 for my MB that does not support C-states... Current conclusion - If it is possible to fix ACPI for MB that do not support C-states, I'm not smart enough to do it! Huh? I am confused. You mean that this CST object �" the one in the attachment file �" wasn't obtained from your BIOS? Or are you saying that it doesn't work for you? Anyway. Let's just have a look at some part of your dsdt.dsl: Scope (_PR.CPU0) { Name (HI0, Zero) Name (HC0, Zero) Name (TLD0, Zero) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x08, CAP0) Store (CAP0, PDC0) If (LEqual (TLD0, Zero)) // Is TLD0 Zero? Which is true. { If (LEqual (And (PDC0, 0x0A), 0x0A)) // Is bit 2 of PDC0 set? Which must be true, or it won't load the IST table. { If (And (CFGD, 0x02)) // Is bit 1 of CFGD set? Which is true for the provided value of 0x04030302. { // Point IST0 to the provided memory area OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, One)), DerefOf (Index (SSDT, 0x02 ))) Load (IST0, HI0) // Load the IST0 table �" HI0 is a handle which can be used to unload the table. } Store (One, TLD0) // Preserve state information across S1-S3 sleep. } } } } And in particular the following snippet, which is part of all but the first PDC object: If (And (CFGD, 0x10)) // Is bit 4 of CFGD set? Which is NOT true for the provided value of 0x04030302. { OperationRegion (CSTn, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B))) Load (CSTn, HC1) // Load the CSTn table. } This code is responsible for loading the CST tables, on MB's with CST tables that is. Now note the CFGD value in your DSDT, which is 0x4030302. Got it? Yes, that bit is not set. You might want to change it to 0x4030312 and remove the CST object from your DSDT. That should (also) work, or at least make it the same Note that the PDC object is evaluated only once, and prior to evaluation of any other processor power management objects returning configuration information. And PDC objects are normally called with three arguments, being: RevisionID, Count and CapabilitiesDWORD1. However, not in your case it seems. Time for me to change my PDC object to see what I am getting Link to comment Share on other sites More sharing options...
FKA Posted September 11, 2009 Author Share Posted September 11, 2009 Huh? I am confused. You mean that this CST object �" the one in the attachment file �" wasn't obtained from your BIOS? Or are you saying that it doesn't work for you? Anyway. Let's just have a look at some part of your dsdt.dsl: This code is responsible for loading the CST tables, on MB's with CST tables that is. Now note the CFGD value in your DSDT, which is 0x4030312. Got it? Yes, that bit is not set. You might want to change it to 0x4030312 and remove the CST object from your DSDT. That should (also) work, or at least make it the same Note that the PDC object is evaluated only once, and prior to evaluation of any other processor power management objects returning configuration information. And PDC objects are normally called with three arguments, being: RevisionID, Count and CapabilitiesDWORD1. However, not in your case it seems. Time for me to change my PDC object to see what I am getting I've tried changing CFGD value to 0x4030312 and I still dont see any cst loaded in dmesg. In fact if you look at previous output from dmesg there is no ist loaded either???? OR in fact any SSDT !! ACPI: RSDP @ 0xc6b000/0x0014 (v000 GBT ) ACPI: RSDT @ 0xc6c000/0x0034 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) ACPI: FACP @ 0xc6d000/0x0074 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) ACPI: DSDT @ 0xc65000/0x50EC (v001 GBT GBTUACPI 0x00001000 INTL 0x20080926) ACPI: FACS @ 0xdfee0000/0x0040 ACPI: HPET @ 0xdfee7e00/0x0038 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x00000098) ACPI: MCFG @ 0xdfee7e80/0x003C (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) ACPI: APIC @ 0xdfee7d00/0x0084 (v001 GBT GBTUACPI 0x42302E31 GBTU 0x01010101) And yes I have no cst table and have borrowed from, initially MacPro3,1 and now from HP530 but have edited C-state values to suit my latency requirements. I'm stepping away from this for a week or so. Be interesting to see where you get to. I'm still sceptical that it is possible to achive c-state support if it is not native to your MB. Enjoy D. **EDIT** please not with DSDT11-09-09.dsl (post No.120) and with CFGD value set to 0x4030312, my p-states are still working and I still don't have any cst evaluation errors !! Link to comment Share on other sites More sharing options...
Master Chief Posted September 11, 2009 Share Posted September 11, 2009 I've tried changing CFGD value to 0x4030312 and I still dont see any cst loaded in dmesg.In fact if you look at previous output from dmesg there is no ist loaded either???? OR in fact any SSDT!! Dave, I would say because of this: "PDC objects are normally called with three arguments, being: RevisionID, Count and CapabilitiesDWORD1." I mean, just have a look at the original MacPro3,1 files and note the three arguments there. Not to mention the missing OSC objects in your DSDT. **EDIT** please not with DSDT11-09-09.dsl (post No.120) and with CFGD value set to 0x4030312, my p-states are still working and I still don't have any cst evaluation errors !!I wonder if it still works when you restore the original kext – the one without any modifications – and/or remove the (calls to) PSS object in your DSDT. If that still works... then it must be the native Intel SpeedStep Technology kicking in. Link to comment Share on other sites More sharing options...
SA22C Posted September 11, 2009 Share Posted September 11, 2009 Ok, so I tested the DSDT I attached earlier with the P-states and the C-state object added and I dont' see any evidence of stepping and I'm getting garbled playback in iTunes unless I'm moving the mouse around like a mad-man. Where do I set the C-state latency values in the CST object with the ones dumped in my FACP table? Link to comment Share on other sites More sharing options...
yonika Posted September 11, 2009 Share Posted September 11, 2009 Hellooo ? Could someone help with the following question ? Yesterday i fixed my hpet on the dsdt to use the cpupm kext, then i've seen what you guys are talking about with the _cst error. later on I found in my bios that there are options to enable c2,c3,c4 and maybe c5 states, so I enabled it, and there was no cst error on boot. I did not alter my dsdt in any other way nor made any change to the SMC plugin, does it mean that my system now works with c-states ? Do I have to do anything else ? I did notice with cpu-i that my system is now on full power (multiplier is on x9) before the change I had 2 steps out of the box x6 and x9 and most of the time was x6. Do I have to do anything else in order to bring speed stepping back to operation ? do i still need to add the PSS to my DSDT ? 10x in advance, Jonathan Link to comment Share on other sites More sharing options...
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