Beerkex'd Posted April 14, 2010 Share Posted April 14, 2010 I just want to know why I don't see the ICH10 in the profiler when I know the DSDT has been loaded. Changing the device IDs of your USB controllers doesn't change ICH9 to ICH10. Link to comment Share on other sites More sharing options...
thomlx Posted April 15, 2010 Share Posted April 15, 2010 Hi, Hey kidamnesiac, you are lucky! I still get nothing (a blank line) in System Profiler with the two SATA devices I have, despite adding a Method in the device (IDE1) with address 0x001F0002 (that's how my DSDT reports the device). My board has controller id 0x27C0 which is ICH7. This id is present in AppleIntelPIIXATA.kext too (Info.plist) but it's still not detected. So please tell us, what code you've included and where? Device (SATA) // Intel 82801GB/GR/GH (ICH7 Family) SATA IDE Controller { Name (_ADR, 0x001F0002) OperationRegion (PCI, PCI_Config, 0x40, 0x20) Field (PCI, DWordAcc, NoLock, Preserve) { blah-blah } [b] // Added method for AppleIntelPIIXATA.kext detection Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0xC0, 0x27, 0x00, 0x00 // Needed device ID is [27C0] } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) }[/b] Device (PRIM) { (code continues here...) Many thanks. I have the same problem and am still searching for a solution on this. MacKonsti - did you made any progress here? thomlx Link to comment Share on other sites More sharing options...
MacKonsti Posted April 15, 2010 Share Posted April 15, 2010 Hi,I have the same problem and am still searching for a solution on this. MacKonsti - did you made any progress here? thomlx Hello thomlx, still the same. I tried the IOAHCIsomething injector in /Extra/Extensions, fixed its Info.plist file inside to reflect my ICH7 controller, nothing. I have managed to fix -more or less- everything else on my mobo, not this one! Even injected modes/names in DSDT (like e.g. graphics card) but it's not read, anywhere. Changed from MacPro3,1 to MacPro4,1.plist and my system hung (KP) so back to MacPro3,1. I thought it could be the computer description that would help... I can't figure out where the heck System Profiler reads the SATA controller name/model! Anyone who care to give a hint?!? Link to comment Share on other sites More sharing options...
thomlx Posted April 15, 2010 Share Posted April 15, 2010 Hi, I bet that it has something to do with the model identifier. It just comes to my mind that the Mac Mini based on the Intel Chipset (Model Identifier Macmini2,1 -> see also http://www.everymac.com/systems/apple/mac_...2.0-specs.html) and also the old white MacBook (with CoreDuo) has the same ICH built in like in our boards while the MacPro Models have ICH10 (to my knowledge). Maybe it would be worth a try to set Macmini2,1 in the boot.plist - Unfortunately I am at work currently and can not check right now if this might help... BTW: My graphics card is displayed correctly via System Profiler - it is only the ICH7 SATA which is missing. thomlx Link to comment Share on other sites More sharing options...
Yippee Ki Yay Posted April 17, 2010 Share Posted April 17, 2010 Changing the device IDs of your USB controllers doesn't change ICH9 to ICH10.If the OS still thinks it's ICH9 then how does this work? I thought the point of changing the device IDs was to trick the OS into thinking it was using an ICH10. Link to comment Share on other sites More sharing options...
s.goten Posted April 19, 2010 Share Posted April 19, 2010 Hi, my sleep works fine (thanks for this guide). Instead the safe sleep doesn't work. my snow goes to normal sleep even if I set hibernate mode to 1 (only hibernate), and the strange thing is that the hard disk should load a little time to write the ram status into sleepimage file, but it doesn't happens to me. so I have a sleepimage file that is probably fake and the system fails to wake up (after reboot I get "incorrect image signature"). anyone can help me? i don't understand why the system does not write the sleepimage file before going to sleep. thanks Link to comment Share on other sites More sharing options...
pentiumpc Posted April 22, 2010 Share Posted April 22, 2010 For all of you with nonfunctional USB and FireWire: try to delete AppleHPET.kext from S/L/E (backup first!) Worked for me on 10.6.2 and on 10.6.3 as well. you can keep AppleHPET.kext if you fix your USB ID and delete device "FWHD" from your DSDT.aml. Link to comment Share on other sites More sharing options...
Jonas_S Posted May 8, 2010 Share Posted May 8, 2010 I'm having troubling applying this same concept to patching my ICH8-based laptop. The relevant output from lspci is: 00:1a.0 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Contoller #4 [8086:2834] (rev 03) 00:1a.1 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #5 [8086:2835] (rev 03) 00:1a.7 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #2 [8086:283a] (rev 03) 00:1d.0 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #1 [8086:2830] (rev 03) 00:1d.1 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #2 [8086:2831] (rev 03) 00:1d.2 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #3 [8086:2832] (rev 03) 00:1d.7 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 [8086:2836] (rev 03) Using the same convention as the first post, this is cross referenced as follows: USB 1: 1D 2830 USB 2: 1D, 1: 2831 USB 3: 1D, 2: 2832 USB 4: 1A: 2834 USB 5: 1A,1: 2835 EHCI 1: 1D, 7: 2836 EHCI 2: 1A, 7: 283a I changed my DSDT code to the following: Device (USB1) { Name (_ADR, 0x001D0000) OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Name (_PRW, Package (0x02) { 0x03, 0x03 }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U1EN) } Else { Store (Zero, U1EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x34, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (USB2) { Name (_ADR, 0x001D0001) OperationRegion (U2CS, PCI_Config, 0xC4, 0x04) Field (U2CS, DWordAcc, NoLock, Preserve) { U2EN, 2 } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x35, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (USB3) { Name (_ADR, 0x001D0002) OperationRegion (U3CS, PCI_Config, 0xC4, 0x04) Field (U3CS, DWordAcc, NoLock, Preserve) { U3EN, 2 } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x36, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (USB4) { Name (_ADR, 0x001A0000) OperationRegion (U4CS, PCI_Config, 0xC4, 0x04) Field (U4CS, DWordAcc, NoLock, Preserve) { U4EN, 2 } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x37, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (USB5) { Name (_ADR, 0x001A0001) OperationRegion (U5CS, PCI_Config, 0xC4, 0x04) Field (U5CS, DWordAcc, NoLock, Preserve) { U5EN, 2 } Name (_PRW, Package (0x02) { 0x05, 0x03 }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U5EN) } Else { Store (Zero, U5EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x38, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (EHC1) { Name (_ADR, 0x001D0007) OperationRegion (U7CS, PCI_Config, 0x54, 0x04) Field (U7CS, DWordAcc, NoLock, Preserve) { , 15, PMES, 1 } Device (HUB7) { Name (_ADR, Zero) Device (PRT1) { Name (_ADR, One) } Device (PRT2) { Name (_ADR, 0x02) } Device (PRT3) { Name (_ADR, 0x03) } Device (PRT4) { Name (_ADR, 0x04) } Device (PRT5) { Name (_ADR, 0x05) } Device (PRT6) { Name (_ADR, 0x06) } } Name (_PRW, Package (0x02) { 0x0D, 0x03 }) Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x39, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } Device (EHC2) { Name (_ADR, 0x001A0007) OperationRegion (UFCS, PCI_Config, 0x54, 0x04) Field (UFCS, DWordAcc, NoLock, Preserve) { , 15, PMES, 1 } Device (HUB7) { Name (_ADR, Zero) Device (PRT1) { Name (_ADR, One) } Device (PRT2) { Name (_ADR, 0x02) } Device (PRT3) { Name (_ADR, 0x03) } Device (PRT4) { Name (_ADR, 0x04) } } Name (_PRW, Package (0x02) { 0x0D, 0x03 }) Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Method (_DSM, 4, NotSerialized) { Store (Package (0x02) { "device-id", Buffer (0x04) { 0x39, 0x3A, 0x00, 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } } I have the DTGP Method defined earlier in my DSDT. But, there is no effect on sleep! If I let the laptop go into "sleep" on its own, it only has "display sleep" and will waken upon keyboard or mouse. If I manually sleep through the Apple menu, it goes into some form of pseudosleep, but doesn't wake up, having to be powered off and then on. I'm not sure if its real sleep that it goes into, because this is a laptop that, at least on Windows, has a logo that is lit when on, and off when sleeping or powered down. That logo remains lit even with manual sleep. Can anyone give me any ideas? I saw this other post about applying a similar fix for ICH8, but it wouldn't compile for me. Link to comment Share on other sites More sharing options...
MacKonsti Posted May 13, 2010 Share Posted May 13, 2010 Jonas_S mate, for every Device (USBxx) you should insert (via DTGP) the corresponding device-id. Namely, for ICH8 devices that you posted: USB1 - UHCI Controller #1 = "device-id" 0x30, 0x28, 0x00, 0x00 USB2 - UHCI Controller #2 = "device-id" 0x31, 0x28, 0x00, 0x00 USB3 - UHCI Controller #3 = "device-id" 0x32, 0x28, 0x00, 0x00 USB4 - UHCI Controller #4 = "device-id" 0x34, 0x28, 0x00, 0x00 USB5 - UHCI Controller #5 = "device-id" 0x35, 0x28, 0x00, 0x00 EHC1 - EHCI Controller #1 = "device-id" 0x36, 0x28, 0x00, 0x00 EHC2 - EHCI Controller #2 = "device-id" 0x3A, 0x28, 0x00, 0x00 ...and not the IDs you've inserted in your code. They are wrong... You're also missing another piece of code for each EHCI controller 1 & 2 (as I did in my DSDT). This is the code inserted in one of the EHCI controllers: Method (_DSM, 4, NotSerialized) // Added method for native ACPI support { Store (Package (0x06) { "AAPL,clock-id", Buffer (0x01) {One}, "device_type", Buffer (0x05) {"EHCI"}, "device-id", Buffer (0x04) {0x36, 0x28, 0x00, 0x00} // Device ID for ICH8 is [2836] }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } Link to comment Share on other sites More sharing options...
Jonas_S Posted May 17, 2010 Share Posted May 17, 2010 You're also missing another piece of code for each EHCI controller 1 & 2 (as I did in my DSDT). This is the code inserted in one of the EHCI controllers: Method (_DSM, 4, NotSerialized) // Added method for native ACPI support { Store (Package (0x06) { "AAPL,clock-id", Buffer (0x01) {One}, "device_type", Buffer (0x05) {"EHCI"}, "device-id", Buffer (0x04) {0x36, 0x28, 0x00, 0x00} // Device ID for ICH8 is [2836] }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } MacKonsti, thanks for the reply man. Adding that last bit of code causes a bunch of compile errors: 649: If (\_SB.PCI0.EHC2.PMES) Error 4064 - Object does not exist ^ (\_SB.PCI0.EHC2.PMES) 651: Store (0x01, \_SB.PCI0.EHC2.PMES) Error 4064 - Object does not exist ^ (\_SB.PCI0.EHC2.PMES) 652: Notify (\_SB.PCI0.EHC2, 0x02) Error 4064 - Object does not exist ^ (\_SB.PCI0.EHC2) 6365: Device (EHC2) Error 4096 - syntax error, unexpected PARSEOP_DEVICE, expecting '{' ^ 7497: Notify (\_SB.PCI0.EHC2, 0x00) Error 4064 - Object does not exist ^ (\_SB.PCI0.EHC2) Any ideas? I've attached my dsdt without the additional EHCI code if you can take a look.... Thanks! dsdt.zip Link to comment Share on other sites More sharing options...
kizwan Posted May 17, 2010 Share Posted May 17, 2010 Hi Jonas_S, Your dsdt wouldn't compile. You should fix the errors first before proceed to add any additional code in your dsdt. Sorry, my mistake. Your dsdt compiled successfully with iasl for ACPI rev 4. Link to comment Share on other sites More sharing options...
Jonas_S Posted May 17, 2010 Share Posted May 17, 2010 Hi Jonas_S,Your dsdt wouldn't compile. You should fix the errors first before proceed to add any additional code in your dsdt. Sorry, my mistake. Your dsdt compiled successfully with iasl for ACPI rev 4. Thanks for checking... It does indeed compile correctly without the additional EHCI code. I've attached both DSDTs: one without the EHCI code that does compile correctly, and the other with the EHCI code that gives all the errors. I hope someone better at this than me can help sort it out! Thanks again! dsdt_wo_EHCI_code.zip dsdt_with_EHCI_code.zip Link to comment Share on other sites More sharing options...
kizwan Posted May 17, 2010 Share Posted May 17, 2010 Thanks for checking... It does indeed compile correctly without the additional EHCI code. I've attached both DSDTs: one without the EHCI code that does compile correctly, and the other with the EHCI code that gives all the errors. I hope someone better at this than me can help sort it out! Thanks again! Your problem is, there is already "Method (_DSM...." exist in EHC1 & EHC2 devices. iasl can't compile it because there is duplicate entry of "Method (_DSM..." in EHC1 & EHC2 devices.. Make sure there is only one "Method (_DSM..." exist. Link to comment Share on other sites More sharing options...
Jonas_S Posted May 18, 2010 Share Posted May 18, 2010 Your problem is, there is already "Method (_DSM...." exist in EHC1 & EHC2 devices. iasl can't compile it because there is duplicate entry of "Method (_DSM..." in EHC1 & EHC2 devices.. Make sure there is only one "Method (_DSM..." exist. Dammit... did that, still have compilation errors. See revised code attached. dsdt_w_EHCI_2.zip Link to comment Share on other sites More sharing options...
kizwan Posted May 18, 2010 Share Posted May 18, 2010 Dammit... did that, still have compilation errors. See revised code attached. Please cleanup your dsdt first. Which tool did you use to extract your dsdt? Did you manually add the entry for "Device (EHC1)" & "Device (EHC2)" in your dsdt? It looks like copied from somewhere else. I can't troubleshoot it because the content is not properly "formatted". Link to comment Share on other sites More sharing options...
Jonas_S Posted May 20, 2010 Share Posted May 20, 2010 Kizwan, Thanks for looking at my code. I used DSDTSE to extract my DSDT file. I didn't copy and paste anything into the EHCI section -- in fact, I typed in the _DSM code because I was afraid of introducing non-ASCII characters -- I used tabs for spacing, maybe I should have used spaces? Anyway, it looks fine on my end, both in DSDTSE and textedit, so I'm unsure of what formatting to change. I've attached my original DSDT extract (without any edits) to this message as well. Thanks again! dsdt_original.zip Link to comment Share on other sites More sharing options...
kizwan Posted May 20, 2010 Share Posted May 20, 2010 Kizwan, Thanks for looking at my code. I used DSDTSE to extract my DSDT file. I didn't copy and paste anything into the EHCI section -- in fact, I typed in the _DSM code because I was afraid of introducing non-ASCII characters -- I used tabs for spacing, maybe I should have used spaces? Anyway, it looks fine on my end, both in DSDTSE and textedit, so I'm unsure of what formatting to change. I've attached my original DSDT extract (without any edits) to this message as well. Thanks again! Copy & paste from DSDTSE should be just find. This is your modified DSDT. I already add the EHCI injection codes & compiled it for you (dsdt.aml). Please search for "// start" & "// add return" in dsdt_modified.dsl file (in Debug folder) to see what has been added in your dsdt. http://www.mediafire.com/?mxtjgmt5eto Link to comment Share on other sites More sharing options...
Zprood Posted June 17, 2010 Share Posted June 17, 2010 Kizwan, Thanks for looking at my code. I used DSDTSE to extract my DSDT file. I didn't copy and paste anything into the EHCI section -- in fact, I typed in the _DSM code because I was afraid of introducing non-ASCII characters -- I used tabs for spacing, maybe I should have used spaces? Anyway, it looks fine on my end, both in DSDTSE and textedit, so I'm unsure of what formatting to change. I've attached my original DSDT extract (without any edits) to this message as well. Thanks again! My chip have some common with you ,the same ID like this USB1 - UHCI Controller #1 = "device-id" 0x30, 0x28, 0x00, 0x00 USB2 - UHCI Controller #2 = "device-id" 0x31, 0x28, 0x00, 0x00 USB3 - UHCI Controller #3 = "device-id" 0x32, 0x28, 0x00, 0x00 USB4 - UHCI Controller #4 = "device-id" 0x34, 0x28, 0x00, 0x00 USB5 - UHCI Controller #5 = "device-id" 0x35, 0x28, 0x00, 0x00 EHC1 - EHCI Controller #1 = "device-id" 0x36, 0x28, 0x00, 0x00 EHC2 - EHCI Controller #2 = "device-id" 0x3A, 0x28, 0x00, 0x00 I introduce my conditions: First ,I rename the Device (USB1) to Device (UHC1).....(USB5) to Device (UHC5),and other place when you get errors.So I just rename "USB" t o "UHC",and add the code under the Device (EHC1) and Device (EHC2) like this Method (_DSM, 4, NotSerialized) { Store (Package (0x0B) { "AAPL,clock-id", Buffer (One) { 0x01 }, "device_type", Buffer (0x05) { "EHCI" }, "AAPL,current-available", 0x04B0, "AAPL,current-extra", 0x02BC, "AAPL,current-in-sleep", 0x03E8, Buffer (One) { 0x00 } }, Local0) DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) Return (Local0) } ,then I can get computer sleep as well .Here is my DSDT:dsdt.aml.zip Link to comment Share on other sites More sharing options...
sharewind Posted July 5, 2010 Share Posted July 5, 2010 what should I do to make sleep enable? my dsdt file can't find the method dtgp and isn't like the others; the usb part of dsdt Device (USB0) { Name (_ADR, 0x001D0000) Name (_S3D, 0x02) Name (RID, Zero) OperationRegion (U0CS, PCI_Config, 0xC4, 0x04) Field (U0CS, DWordAcc, NoLock, Preserve) { U0EN, 2, Offset (0x04) } Name (_PR0, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR1, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR2, Package (0x01) { ^LPC.EC.PUBS }) Name (_PRW, Package (0x03) { 0x03, 0x03, ^LPC.EC.PUBS }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U0EN) } Else { Store (Zero, U0EN) } } Device (URTH) { Name (_ADR, Zero) Device (PRT0) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x51, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (PRT1) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x51, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } } } Device (USB1) { Name (_ADR, 0x001D0001) Name (RID, Zero) Device (URTH) { Name (_ADR, Zero) Device (PRT2) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT3) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } Device (USB2) { Name (_ADR, 0x001D0002) Name (RID, Zero) Device (URTH) { Name (_ADR, Zero) Device (PRT4) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT5) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } Device (USB3) { Name (_ADR, 0x001A0000) Name (_S3D, 0x02) Name (RID, Zero) OperationRegion (U3CS, PCI_Config, 0xC4, 0x04) Field (U3CS, DWordAcc, NoLock, Preserve) { U3EN, 2, Offset (0x04) } Name (_PR0, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR1, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR2, Package (0x01) { ^LPC.EC.PUBS }) Name (_PRW, Package (0x03) { 0x0E, 0x03, ^LPC.EC.PUBS }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U3EN) } Else { Store (Zero, U3EN) } } Device (URTH) { Name (_ADR, Zero) Device (PRT6) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x59, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (UPEX) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, 0x02, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x11, 0x12, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } } } Device (USB4) { Name (_ADR, 0x001A0001) Name (RID, Zero) Device (URTH) { Name (_ADR, Zero) Device (PRT8) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT9) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } Device (USB5) { Name (_ADR, 0x001A0002) Name (_S3D, 0x02) Name (RID, Zero) OperationRegion (U5CS, PCI_Config, 0xC4, 0x04) Field (U5CS, DWordAcc, NoLock, Preserve) { U5EN, 2, Offset (0x04) } Name (_PR0, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR1, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR2, Package (0x01) { ^LPC.EC.PUBS }) Name (_PRW, Package (0x03) { 0x20, 0x03, ^LPC.EC.PUBS }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U5EN) } Else { Store (Zero, U5EN) } } Device (URTH) { Name (_ADR, Zero) Device (UPDK) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x6B, 0x11, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (PRTB) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } Device (EHC0) { Name (_ADR, 0x001D0007) Name (_S3D, 0x03) Name (RID, Zero) OperationRegion (U7CS, PCI_Config, 0x60, 0x04) Field (U7CS, DWordAcc, NoLock, Preserve) { Offset (0x02), PWKI, 1, PWUC, 6, Offset (0x04) } Name (_PR0, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR1, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR2, Package (0x01) { ^LPC.EC.PUBS }) Method (_INI, 0, NotSerialized) { Store (One, PWKI) Store (0x0F, PWUC) } Name (_PRW, Package (0x03) { 0x0D, 0x03, ^LPC.EC.PUBS }) Device (URTH) { Name (_ADR, Zero) Device (PRT0) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x51, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (PRT1) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x51, 0x0D, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (PRT2) { Name (_ADR, 0x03) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT3) { Name (_ADR, 0x04) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT4) { Name (_ADR, 0x05) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT5) { Name (_ADR, 0x06) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } Device (EHC1) { Name (_ADR, 0x001A0007) Name (_S3D, 0x03) Name (RID, Zero) OperationRegion (U8CS, PCI_Config, 0x60, 0x04) Field (U8CS, DWordAcc, NoLock, Preserve) { Offset (0x02), PWKI, 1, PWUC, 4, Offset (0x04) } Name (_PR0, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR1, Package (0x01) { ^LPC.EC.PUBS }) Name (_PR2, Package (0x01) { ^LPC.EC.PUBS }) Method (_INI, 0, NotSerialized) { Store (One, PWKI) Store (0x0F, PWUC) } Name (_PRW, Package (0x03) { 0x0D, 0x03, ^LPC.EC.PUBS }) Device (URTH) { Name (_ADR, Zero) Device (PRT6) { Name (_ADR, One) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x59, 0x0E, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (UPEX) { Name (_ADR, 0x02) Name (_UPC, Package (0x04) { 0xFF, 0x02, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x11, 0x12, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (PRT8) { Name (_ADR, 0x03) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (PRT9) { Name (_ADR, 0x04) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } Device (UPDK) { Name (_ADR, 0x05) Name (_UPC, Package (0x04) { 0xFF, Zero, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x6B, 0x11, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00 }) } Device (PRTB) { Name (_ADR, 0x06) Name (_UPC, Package (0x04) { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, Buffer (0x10) { /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) } } } dsdt.zip Link to comment Share on other sites More sharing options...
oldnapalm Posted July 5, 2010 Share Posted July 5, 2010 Hello guys, you can easily apply this patch to your DSDT using this editor. Here is the patch in the automated patcher format USB___ICH9_sleep_fix.txt.zip Regards. Link to comment Share on other sites More sharing options...
Noodle09 Posted July 19, 2010 Share Posted July 19, 2010 Hi All, I'm still learning how to patch DSDT to make AHCI and speedstep work on my ABit IB9 motherboard with Q6600 CPU. ABit IB9 using ICH8 chipset. so: For AHCI, I tried both ESB 2 (2681) and ICH8MAHCI (2829), but both give me KP. I attached screen shot. For speedstep, I keep getting KP as "CPU 1 has no HPET assigned to it" without NullCPUManagement.kext. I'm using MacPro3,1 model in my smbios.plist. Running 10.6.4 with all latest update. Attached is my current DSDT (without AHCI device-id). lspci -nn 00:00.0 Host bridge [0600]: Intel Corporation 82P965/G965 Memory Controller Hub [8086:29a0] (rev 02) 00:01.0 PCI bridge [0604]: Intel Corporation 82P965/G965 PCI Express Root Port [8086:29a1] (rev 02) 00:1a.0 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #4 [8086:2834] (rev 02) 00:1a.1 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #5 [8086:2835] (rev 02) 00:1a.7 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #2 [8086:283a] (rev 02) 00:1b.0 Audio device [0403]: Intel Corporation 82801H (ICH8 Family) HD Audio Controller [8086:284b] (rev 02) 00:1d.0 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #1 [8086:2830] (rev 02) 00:1d.1 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #2 [8086:2831] (rev 02) 00:1d.2 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #3 [8086:2832] (rev 02) 00:1d.7 USB Controller [0c03]: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 [8086:2836] (rev 02) 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev f2) 00:1f.0 ISA bridge [0601]: Intel Corporation 82801HB/HR (ICH8/R) LPC Interface Controller [8086:2810] (rev 02) 00:1f.2 IDE interface [0101]: Intel Corporation 82801H (ICH8 Family) 4 port SATA IDE Controller [8086:2820] (rev 02) 00:1f.3 SMBus [0c05]: Intel Corporation 82801H (ICH8 Family) SMBus Controller [8086:283e] (rev 02) 00:1f.5 IDE interface [0101]: Intel Corporation 82801H (ICH8 Family) 2 port SATA IDE Controller [8086:2825] (rev 02) 01:00.0 VGA compatible controller [0300]: nVidia Corporation G84 [GeForce 8600 GTS] [10de:0400] (rev a1) 02:01.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet [10ec:8167] (rev 10) kextstat | grep LPC 59 0 0xffffff7f80f52000 0x3000 0x3000 com.apple.driver.AppleLPC (1.4.12) <9 5 4 3> Can somebody please help me to take a look? Let me know if you need more information. Thanks a lot Noodle DSDT.zip Link to comment Share on other sites More sharing options...
Apacalypse Posted August 25, 2010 Share Posted August 25, 2010 I am trying to get my Graphics card working can someone give me a hand? I have tried a few things I don't know if i am going in the right direction. I want to enable Full QE/CI But i don't know how to use DSDTSE and the tutorial and not really descriptive. I have 2 nVidia Quadro FX 4800. I would really appreciate the help. Link to comment Share on other sites More sharing options...
TheOriginalPol Posted December 15, 2010 Share Posted December 15, 2010 You're in the wrong place, buddy... this thread is about something completely different :-) Link to comment Share on other sites More sharing options...
fingerr Posted February 15, 2011 Share Posted February 15, 2011 Hi all, I'd like to ask if someone can help me figure it out how to make sleep work. I have Asus U30JC HM55 based and my USB devices are 8086:3b34 and 8086:3b34. I was trying to modify my DSDT but after modding I still can see errata 0x0 in IOReg. Below is my EHC1/2 section. Can someone have a look and help me please? Device (EHC1) { Name (_ADR, 0x001D0000) OperationRegion (U20P, PCI_Config, 0x00, 0x0100) Field (U20P, ByteAcc, NoLock, Preserve) { Offset (0x04), , 1, MSPE, 1, Offset (0x06), Offset (0x10), MBAS, 32, Offset (0x54), PSTA, 2, Offset (0x55), PMEE, 1, , 6, PMES, 1 } Method (_PSW, 1, NotSerialized) { Store (MBAS, Local0) If (LEqual (Local0, 0xFFFFFFFF)) {} Else { And (Local0, 0xFFFFFFF0, Local0) OperationRegion (MMIO, SystemMemory, Local0, 0x0100) Field (MMIO, ByteAcc, NoLock, Preserve) { Offset (0x64), P0SC, 32, P1SC, 32, P2SC, 32, P3SC, 32, P4SC, 32, P5SC, 32 } If (LNot (Local0)) { Store (PSTA, Local2) Store (Zero, PSTA) Store (MSPE, Local3) Store (One, MSPE) If (Arg0) { Store (P0SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P0SC) Store (P1SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P1SC) Store (P2SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P2SC) Store (P3SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P3SC) Store (P4SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P4SC) Store (P5SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P5SC) Store (One, PMES) Store (One, PMEE) } Else { Store (P0SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P0SC) Store (P1SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P1SC) Store (P2SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P2SC) Store (P3SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P3SC) Store (P4SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P4SC) Store (P5SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P5SC) Store (One, PMES) Store (Zero, PMEE) } Store (Local3, MSPE) Store (Local2, PSTA) } } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0D, 0x03)) } } Device (USB1) { Name (_ADR, 0x001D0001) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x03, 0x03)) } } Device (USB2) { Name (_ADR, 0x001D0002) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x04, 0x03)) } } Device (USB3) { Name (_ADR, 0x001D0003) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0C, 0x03)) } } Device (USB4) { Name (_ADR, 0x001D0004) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x03)) } } Device (EHC2) { Name (_ADR, 0x001A0000) OperationRegion (U20P, PCI_Config, 0x00, 0x0100) Field (U20P, ByteAcc, NoLock, Preserve) { Offset (0x04), , 1, MSPE, 1, Offset (0x06), Offset (0x10), MBAS, 32, Offset (0x54), PSTA, 2, Offset (0x55), PMEE, 1, , 6, PMES, 1 } Method (_PSW, 1, NotSerialized) { Store (MBAS, Local0) If (LEqual (Local0, 0xFFFFFFFF)) {} Else { And (Local0, 0xFFFFFFF0, Local0) OperationRegion (MMIO, SystemMemory, Local0, 0x0100) Field (MMIO, ByteAcc, NoLock, Preserve) { Offset (0x64), P0SC, 32, P1SC, 32, P2SC, 32, P3SC, 32, P4SC, 32, P5SC, 32 } If (LNot (Local0)) { Store (PSTA, Local2) Store (Zero, PSTA) Store (MSPE, Local3) Store (One, MSPE) If (Arg0) { Store (P0SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P0SC) Store (P1SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P1SC) Store (P2SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P2SC) Store (P3SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P3SC) Store (P4SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P4SC) Store (P5SC, Local4) Or (Local4, 0x00300000, Local4) Store (Local4, P5SC) Store (One, PMES) Store (One, PMEE) } Else { Store (P0SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P0SC) Store (P1SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P1SC) Store (P2SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P2SC) Store (P3SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P3SC) Store (P4SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P4SC) Store (P5SC, Local4) And (Local4, 0xFFCFFFFF, Local4) Store (Local4, P5SC) Store (One, PMES) Store (Zero, PMEE) } Store (Local3, MSPE) Store (Local2, PSTA) } } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0D, 0x03)) } } Device (USB5) { Name (_ADR, 0x001A0001) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x03)) } } Device (USB6) { Name (_ADR, 0x001A0002) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x20, 0x03)) } } Device (USB7) { Name (_ADR, 0x001A0003) OperationRegion (BAR0, PCI_Config, 0xC0, 0x05) Field (BAR0, ByteAcc, NoLock, Preserve) { UBL1, 16, Offset (0x04), P0WE, 1, P1WE, 1, Offset (0x05) } Method (_S3D, 0, NotSerialized) { If (LOr (LOr (LEqual (\MSOS (), \OS9X), LEqual (\MSOS (), \OS98)), LEqual ( \MSOS (), \OSME))) { Return (0x02) } Else { Return (0x03) } } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x01, P0WE) Store (0x01, P1WE) } Else { Store (0x00, P0WE) Store (0x00, P1WE) } } Method (UPAC, 1, NotSerialized) { Store (Zero, Local0) If (LEqual (OSFG, OS9X)) { Store (One, Local0) } Else { If (LEqual (OSFG, OS98)) { Store (One, Local0) } } If (Local0) { If (LEqual (Arg0, 0x03)) { Return (One) } } Return (Zero) } OperationRegion (UPCI, PCI_Config, 0x20, 0x04) Field (UPCI, ByteAcc, NoLock, Preserve) { UBAS, 32 } Name (BASA, 0xB400) Name (P0ST, Zero) Name (P1ST, Zero) Method (SSTA, 0, NotSerialized) { Store (UBAS, BASA) And (BASA, 0xFFFFFFFE, BASA) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } Store (CCS0, P0ST) Store (CCS1, P1ST) } Method (RSTA, 0, NotSerialized) { Store (BASA, UBAS) OperationRegion (UHCI, SystemIO, BASA, 0x20) Field (UHCI, ByteAcc, NoLock, Preserve) { RSTP, 1, HRST, 1, GRST, 1, Offset (0x10), CCS0, 1, CSC0, 1, PED0, 1, Offset (0x12), CCS1, 1, CSC1, 1, PED1, 1 } } Method (USBS, 1, NotSerialized) { If (UPAC (Arg0)) { SSTA () } } Method (USBW, 1, NotSerialized) { If (UPAC (Arg0)) { RSTA () } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x25, 0x03)) } } p.s. I'm using MacBookPro6,2 in my smbios.plist. (as this one is closest to mine http://www.everymac.com/systems/apple/macb...ody-specs.html) --- EDIT--- I've attached pure DSDT from everest. I can't compile it in untouched form (201 errors). I've made it able to compile using some autopacher but can't remember which one.... If someone can have a look and try to compile, please. Thanks in advance, fingerr. acpi_dsdt.zip Link to comment Share on other sites More sharing options...
MaLd0n Posted February 15, 2011 Share Posted February 15, 2011 Hi all,I'd like to ask if someone can help me figure it out how to make sleep work. try it dsdt.fingerr.zip NativePM and restart fix use Chameleon RC5 Link to comment Share on other sites More sharing options...
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